diff options
Diffstat (limited to 'arch/sparc/include')
32 files changed, 238 insertions, 187 deletions
diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild index 3c93f08ce187..2c2e38821f60 100644 --- a/arch/sparc/include/asm/Kbuild +++ b/arch/sparc/include/asm/Kbuild | |||
@@ -16,3 +16,8 @@ header-y += traps.h | |||
16 | header-y += uctx.h | 16 | header-y += uctx.h |
17 | header-y += utrap.h | 17 | header-y += utrap.h |
18 | header-y += watchdog.h | 18 | header-y += watchdog.h |
19 | |||
20 | generic-y += div64.h | ||
21 | generic-y += local64.h | ||
22 | generic-y += irq_regs.h | ||
23 | generic-y += local.h | ||
diff --git a/arch/sparc/include/asm/atomic_32.h b/arch/sparc/include/asm/atomic_32.h index 7ae128b19d3f..5c3c8b69884d 100644 --- a/arch/sparc/include/asm/atomic_32.h +++ b/arch/sparc/include/asm/atomic_32.h | |||
@@ -22,7 +22,7 @@ | |||
22 | extern int __atomic_add_return(int, atomic_t *); | 22 | extern int __atomic_add_return(int, atomic_t *); |
23 | extern int atomic_cmpxchg(atomic_t *, int, int); | 23 | extern int atomic_cmpxchg(atomic_t *, int, int); |
24 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | 24 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) |
25 | extern int atomic_add_unless(atomic_t *, int, int); | 25 | extern int __atomic_add_unless(atomic_t *, int, int); |
26 | extern void atomic_set(atomic_t *, int); | 26 | extern void atomic_set(atomic_t *, int); |
27 | 27 | ||
28 | #define atomic_read(v) (*(volatile int *)&(v)->counter) | 28 | #define atomic_read(v) (*(volatile int *)&(v)->counter) |
@@ -52,7 +52,6 @@ extern void atomic_set(atomic_t *, int); | |||
52 | #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) | 52 | #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) |
53 | #define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) | 53 | #define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) |
54 | 54 | ||
55 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | ||
56 | 55 | ||
57 | /* This is the old 24-bit implementation. It's still used internally | 56 | /* This is the old 24-bit implementation. It's still used internally |
58 | * by some sparc-specific code, notably the semaphore implementation. | 57 | * by some sparc-specific code, notably the semaphore implementation. |
@@ -161,5 +160,4 @@ static inline int __atomic24_sub(int i, atomic24_t *v) | |||
161 | 160 | ||
162 | #endif /* !(__KERNEL__) */ | 161 | #endif /* !(__KERNEL__) */ |
163 | 162 | ||
164 | #include <asm-generic/atomic-long.h> | ||
165 | #endif /* !(__ARCH_SPARC_ATOMIC__) */ | 163 | #endif /* !(__ARCH_SPARC_ATOMIC__) */ |
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h index bdb2ff880bdd..9f421df46aec 100644 --- a/arch/sparc/include/asm/atomic_64.h +++ b/arch/sparc/include/asm/atomic_64.h | |||
@@ -70,7 +70,7 @@ extern long atomic64_sub_ret(long, atomic64_t *); | |||
70 | #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) | 70 | #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) |
71 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | 71 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) |
72 | 72 | ||
73 | static inline int atomic_add_unless(atomic_t *v, int a, int u) | 73 | static inline int __atomic_add_unless(atomic_t *v, int a, int u) |
74 | { | 74 | { |
75 | int c, old; | 75 | int c, old; |
76 | c = atomic_read(v); | 76 | c = atomic_read(v); |
@@ -82,10 +82,9 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u) | |||
82 | break; | 82 | break; |
83 | c = old; | 83 | c = old; |
84 | } | 84 | } |
85 | return c != (u); | 85 | return c; |
86 | } | 86 | } |
87 | 87 | ||
88 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | ||
89 | 88 | ||
90 | #define atomic64_cmpxchg(v, o, n) \ | 89 | #define atomic64_cmpxchg(v, o, n) \ |
91 | ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) | 90 | ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) |
@@ -114,5 +113,4 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u) | |||
114 | #define smp_mb__before_atomic_inc() barrier() | 113 | #define smp_mb__before_atomic_inc() barrier() |
115 | #define smp_mb__after_atomic_inc() barrier() | 114 | #define smp_mb__after_atomic_inc() barrier() |
116 | 115 | ||
117 | #include <asm-generic/atomic-long.h> | ||
118 | #endif /* !(__ARCH_SPARC64_ATOMIC__) */ | 116 | #endif /* !(__ARCH_SPARC64_ATOMIC__) */ |
diff --git a/arch/sparc/include/asm/bitops_64.h b/arch/sparc/include/asm/bitops_64.h index 38e9aa1b2cea..29011cc0e4be 100644 --- a/arch/sparc/include/asm/bitops_64.h +++ b/arch/sparc/include/asm/bitops_64.h | |||
@@ -26,61 +26,28 @@ extern void change_bit(unsigned long nr, volatile unsigned long *addr); | |||
26 | #define smp_mb__before_clear_bit() barrier() | 26 | #define smp_mb__before_clear_bit() barrier() |
27 | #define smp_mb__after_clear_bit() barrier() | 27 | #define smp_mb__after_clear_bit() barrier() |
28 | 28 | ||
29 | #include <asm-generic/bitops/ffz.h> | ||
30 | #include <asm-generic/bitops/__ffs.h> | ||
31 | #include <asm-generic/bitops/fls.h> | 29 | #include <asm-generic/bitops/fls.h> |
32 | #include <asm-generic/bitops/__fls.h> | 30 | #include <asm-generic/bitops/__fls.h> |
33 | #include <asm-generic/bitops/fls64.h> | 31 | #include <asm-generic/bitops/fls64.h> |
34 | 32 | ||
35 | #ifdef __KERNEL__ | 33 | #ifdef __KERNEL__ |
36 | 34 | ||
35 | extern int ffs(int x); | ||
36 | extern unsigned long __ffs(unsigned long); | ||
37 | |||
38 | #include <asm-generic/bitops/ffz.h> | ||
37 | #include <asm-generic/bitops/sched.h> | 39 | #include <asm-generic/bitops/sched.h> |
38 | #include <asm-generic/bitops/ffs.h> | ||
39 | 40 | ||
40 | /* | 41 | /* |
41 | * hweightN: returns the hamming weight (i.e. the number | 42 | * hweightN: returns the hamming weight (i.e. the number |
42 | * of bits set) of a N-bit word | 43 | * of bits set) of a N-bit word |
43 | */ | 44 | */ |
44 | 45 | ||
45 | #ifdef ULTRA_HAS_POPULATION_COUNT | 46 | extern unsigned long __arch_hweight64(__u64 w); |
46 | 47 | extern unsigned int __arch_hweight32(unsigned int w); | |
47 | static inline unsigned int __arch_hweight64(unsigned long w) | 48 | extern unsigned int __arch_hweight16(unsigned int w); |
48 | { | 49 | extern unsigned int __arch_hweight8(unsigned int w); |
49 | unsigned int res; | ||
50 | |||
51 | __asm__ ("popc %1,%0" : "=r" (res) : "r" (w)); | ||
52 | return res; | ||
53 | } | ||
54 | |||
55 | static inline unsigned int __arch_hweight32(unsigned int w) | ||
56 | { | ||
57 | unsigned int res; | ||
58 | |||
59 | __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffffffff)); | ||
60 | return res; | ||
61 | } | ||
62 | 50 | ||
63 | static inline unsigned int __arch_hweight16(unsigned int w) | ||
64 | { | ||
65 | unsigned int res; | ||
66 | |||
67 | __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffff)); | ||
68 | return res; | ||
69 | } | ||
70 | |||
71 | static inline unsigned int __arch_hweight8(unsigned int w) | ||
72 | { | ||
73 | unsigned int res; | ||
74 | |||
75 | __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xff)); | ||
76 | return res; | ||
77 | } | ||
78 | |||
79 | #else | ||
80 | |||
81 | #include <asm-generic/bitops/arch_hweight.h> | ||
82 | |||
83 | #endif | ||
84 | #include <asm-generic/bitops/const_hweight.h> | 51 | #include <asm-generic/bitops/const_hweight.h> |
85 | #include <asm-generic/bitops/lock.h> | 52 | #include <asm-generic/bitops/lock.h> |
86 | #endif /* __KERNEL__ */ | 53 | #endif /* __KERNEL__ */ |
@@ -91,10 +58,7 @@ static inline unsigned int __arch_hweight8(unsigned int w) | |||
91 | 58 | ||
92 | #include <asm-generic/bitops/le.h> | 59 | #include <asm-generic/bitops/le.h> |
93 | 60 | ||
94 | #define ext2_set_bit_atomic(lock,nr,addr) \ | 61 | #include <asm-generic/bitops/ext2-atomic-setbit.h> |
95 | test_and_set_bit((nr) ^ 0x38,(unsigned long *)(addr)) | ||
96 | #define ext2_clear_bit_atomic(lock,nr,addr) \ | ||
97 | test_and_clear_bit((nr) ^ 0x38,(unsigned long *)(addr)) | ||
98 | 62 | ||
99 | #endif /* __KERNEL__ */ | 63 | #endif /* __KERNEL__ */ |
100 | 64 | ||
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h index 6f57325bb883..b8be20d42a0a 100644 --- a/arch/sparc/include/asm/compat.h +++ b/arch/sparc/include/asm/compat.h | |||
@@ -134,7 +134,8 @@ struct compat_statfs { | |||
134 | compat_fsid_t f_fsid; | 134 | compat_fsid_t f_fsid; |
135 | int f_namelen; /* SunOS ignores this field. */ | 135 | int f_namelen; /* SunOS ignores this field. */ |
136 | int f_frsize; | 136 | int f_frsize; |
137 | int f_spare[5]; | 137 | int f_flags; |
138 | int f_spare[4]; | ||
138 | }; | 139 | }; |
139 | 140 | ||
140 | #define COMPAT_RLIM_INFINITY 0x7fffffff | 141 | #define COMPAT_RLIM_INFINITY 0x7fffffff |
diff --git a/arch/sparc/include/asm/div64.h b/arch/sparc/include/asm/div64.h deleted file mode 100644 index 6cd978cefb28..000000000000 --- a/arch/sparc/include/asm/div64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/div64.h> | ||
diff --git a/arch/sparc/include/asm/elf_64.h b/arch/sparc/include/asm/elf_64.h index e67880381b84..7df8b7f544d4 100644 --- a/arch/sparc/include/asm/elf_64.h +++ b/arch/sparc/include/asm/elf_64.h | |||
@@ -59,15 +59,33 @@ | |||
59 | #define R_SPARC_6 45 | 59 | #define R_SPARC_6 45 |
60 | 60 | ||
61 | /* Bits present in AT_HWCAP, primarily for Sparc32. */ | 61 | /* Bits present in AT_HWCAP, primarily for Sparc32. */ |
62 | 62 | #define HWCAP_SPARC_FLUSH 0x00000001 | |
63 | #define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ | 63 | #define HWCAP_SPARC_STBAR 0x00000002 |
64 | #define HWCAP_SPARC_STBAR 2 | 64 | #define HWCAP_SPARC_SWAP 0x00000004 |
65 | #define HWCAP_SPARC_SWAP 4 | 65 | #define HWCAP_SPARC_MULDIV 0x00000008 |
66 | #define HWCAP_SPARC_MULDIV 8 | 66 | #define HWCAP_SPARC_V9 0x00000010 |
67 | #define HWCAP_SPARC_V9 16 | 67 | #define HWCAP_SPARC_ULTRA3 0x00000020 |
68 | #define HWCAP_SPARC_ULTRA3 32 | 68 | #define HWCAP_SPARC_BLKINIT 0x00000040 |
69 | #define HWCAP_SPARC_BLKINIT 64 | 69 | #define HWCAP_SPARC_N2 0x00000080 |
70 | #define HWCAP_SPARC_N2 128 | 70 | |
71 | /* Solaris compatible AT_HWCAP bits. */ | ||
72 | #define AV_SPARC_MUL32 0x00000100 /* 32x32 multiply is efficient */ | ||
73 | #define AV_SPARC_DIV32 0x00000200 /* 32x32 divide is efficient */ | ||
74 | #define AV_SPARC_FSMULD 0x00000400 /* 'fsmuld' is efficient */ | ||
75 | #define AV_SPARC_V8PLUS 0x00000800 /* v9 insn available to 32bit */ | ||
76 | #define AV_SPARC_POPC 0x00001000 /* 'popc' is efficient */ | ||
77 | #define AV_SPARC_VIS 0x00002000 /* VIS insns available */ | ||
78 | #define AV_SPARC_VIS2 0x00004000 /* VIS2 insns available */ | ||
79 | #define AV_SPARC_ASI_BLK_INIT 0x00008000 /* block init ASIs available */ | ||
80 | #define AV_SPARC_FMAF 0x00010000 /* fused multiply-add */ | ||
81 | #define AV_SPARC_VIS3 0x00020000 /* VIS3 insns available */ | ||
82 | #define AV_SPARC_HPC 0x00040000 /* HPC insns available */ | ||
83 | #define AV_SPARC_RANDOM 0x00080000 /* 'random' insn available */ | ||
84 | #define AV_SPARC_TRANS 0x00100000 /* transaction insns available */ | ||
85 | #define AV_SPARC_FJFMAU 0x00200000 /* unfused multiply-add */ | ||
86 | #define AV_SPARC_IMA 0x00400000 /* integer multiply-add */ | ||
87 | #define AV_SPARC_ASI_CACHE_SPARING \ | ||
88 | 0x00800000 /* cache sparing ASIs available */ | ||
71 | 89 | ||
72 | #define CORE_DUMP_USE_REGSET | 90 | #define CORE_DUMP_USE_REGSET |
73 | 91 | ||
@@ -162,31 +180,8 @@ typedef struct { | |||
162 | #define ELF_ET_DYN_BASE 0x0000010000000000UL | 180 | #define ELF_ET_DYN_BASE 0x0000010000000000UL |
163 | #define COMPAT_ELF_ET_DYN_BASE 0x0000000070000000UL | 181 | #define COMPAT_ELF_ET_DYN_BASE 0x0000000070000000UL |
164 | 182 | ||
165 | 183 | extern unsigned long sparc64_elf_hwcap; | |
166 | /* This yields a mask that user programs can use to figure out what | 184 | #define ELF_HWCAP sparc64_elf_hwcap |
167 | instruction set this cpu supports. */ | ||
168 | |||
169 | /* On Ultra, we support all of the v8 capabilities. */ | ||
170 | static inline unsigned int sparc64_elf_hwcap(void) | ||
171 | { | ||
172 | unsigned int cap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | | ||
173 | HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV | | ||
174 | HWCAP_SPARC_V9); | ||
175 | |||
176 | if (tlb_type == cheetah || tlb_type == cheetah_plus) | ||
177 | cap |= HWCAP_SPARC_ULTRA3; | ||
178 | else if (tlb_type == hypervisor) { | ||
179 | if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || | ||
180 | sun4v_chip_type == SUN4V_CHIP_NIAGARA2) | ||
181 | cap |= HWCAP_SPARC_BLKINIT; | ||
182 | if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2) | ||
183 | cap |= HWCAP_SPARC_N2; | ||
184 | } | ||
185 | |||
186 | return cap; | ||
187 | } | ||
188 | |||
189 | #define ELF_HWCAP sparc64_elf_hwcap(); | ||
190 | 185 | ||
191 | /* This yields a string that ld.so will use to load implementation | 186 | /* This yields a string that ld.so will use to load implementation |
192 | specific libraries for optimization. This is more specific in | 187 | specific libraries for optimization. This is more specific in |
diff --git a/arch/sparc/include/asm/hypervisor.h b/arch/sparc/include/asm/hypervisor.h index 75686409be24..015a761eaa32 100644 --- a/arch/sparc/include/asm/hypervisor.h +++ b/arch/sparc/include/asm/hypervisor.h | |||
@@ -2927,6 +2927,13 @@ extern unsigned long sun4v_ncs_request(unsigned long request, | |||
2927 | #define HV_FAST_FIRE_GET_PERFREG 0x120 | 2927 | #define HV_FAST_FIRE_GET_PERFREG 0x120 |
2928 | #define HV_FAST_FIRE_SET_PERFREG 0x121 | 2928 | #define HV_FAST_FIRE_SET_PERFREG 0x121 |
2929 | 2929 | ||
2930 | #define HV_FAST_REBOOT_DATA_SET 0x172 | ||
2931 | |||
2932 | #ifndef __ASSEMBLY__ | ||
2933 | extern unsigned long sun4v_reboot_data_set(unsigned long ra, | ||
2934 | unsigned long len); | ||
2935 | #endif | ||
2936 | |||
2930 | /* Function numbers for HV_CORE_TRAP. */ | 2937 | /* Function numbers for HV_CORE_TRAP. */ |
2931 | #define HV_CORE_SET_VER 0x00 | 2938 | #define HV_CORE_SET_VER 0x00 |
2932 | #define HV_CORE_PUTCHAR 0x01 | 2939 | #define HV_CORE_PUTCHAR 0x01 |
@@ -2940,16 +2947,23 @@ extern unsigned long sun4v_ncs_request(unsigned long request, | |||
2940 | #define HV_GRP_CORE 0x0001 | 2947 | #define HV_GRP_CORE 0x0001 |
2941 | #define HV_GRP_INTR 0x0002 | 2948 | #define HV_GRP_INTR 0x0002 |
2942 | #define HV_GRP_SOFT_STATE 0x0003 | 2949 | #define HV_GRP_SOFT_STATE 0x0003 |
2950 | #define HV_GRP_TM 0x0080 | ||
2943 | #define HV_GRP_PCI 0x0100 | 2951 | #define HV_GRP_PCI 0x0100 |
2944 | #define HV_GRP_LDOM 0x0101 | 2952 | #define HV_GRP_LDOM 0x0101 |
2945 | #define HV_GRP_SVC_CHAN 0x0102 | 2953 | #define HV_GRP_SVC_CHAN 0x0102 |
2946 | #define HV_GRP_NCS 0x0103 | 2954 | #define HV_GRP_NCS 0x0103 |
2947 | #define HV_GRP_RNG 0x0104 | 2955 | #define HV_GRP_RNG 0x0104 |
2956 | #define HV_GRP_PBOOT 0x0105 | ||
2957 | #define HV_GRP_TPM 0x0107 | ||
2958 | #define HV_GRP_SDIO 0x0108 | ||
2959 | #define HV_GRP_SDIO_ERR 0x0109 | ||
2960 | #define HV_GRP_REBOOT_DATA 0x0110 | ||
2948 | #define HV_GRP_NIAG_PERF 0x0200 | 2961 | #define HV_GRP_NIAG_PERF 0x0200 |
2949 | #define HV_GRP_FIRE_PERF 0x0201 | 2962 | #define HV_GRP_FIRE_PERF 0x0201 |
2950 | #define HV_GRP_N2_CPU 0x0202 | 2963 | #define HV_GRP_N2_CPU 0x0202 |
2951 | #define HV_GRP_NIU 0x0204 | 2964 | #define HV_GRP_NIU 0x0204 |
2952 | #define HV_GRP_VF_CPU 0x0205 | 2965 | #define HV_GRP_VF_CPU 0x0205 |
2966 | #define HV_GRP_KT_CPU 0x0209 | ||
2953 | #define HV_GRP_DIAG 0x0300 | 2967 | #define HV_GRP_DIAG 0x0300 |
2954 | 2968 | ||
2955 | #ifndef __ASSEMBLY__ | 2969 | #ifndef __ASSEMBLY__ |
diff --git a/arch/sparc/include/asm/irq_regs.h b/arch/sparc/include/asm/irq_regs.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/arch/sparc/include/asm/irq_regs.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/irq_regs.h> | ||
diff --git a/arch/sparc/include/asm/irqflags_32.h b/arch/sparc/include/asm/irqflags_32.h index d4d0711de0f9..14848909e0de 100644 --- a/arch/sparc/include/asm/irqflags_32.h +++ b/arch/sparc/include/asm/irqflags_32.h | |||
@@ -18,7 +18,7 @@ extern void arch_local_irq_restore(unsigned long); | |||
18 | extern unsigned long arch_local_irq_save(void); | 18 | extern unsigned long arch_local_irq_save(void); |
19 | extern void arch_local_irq_enable(void); | 19 | extern void arch_local_irq_enable(void); |
20 | 20 | ||
21 | static inline unsigned long arch_local_save_flags(void) | 21 | static inline notrace unsigned long arch_local_save_flags(void) |
22 | { | 22 | { |
23 | unsigned long flags; | 23 | unsigned long flags; |
24 | 24 | ||
@@ -26,17 +26,17 @@ static inline unsigned long arch_local_save_flags(void) | |||
26 | return flags; | 26 | return flags; |
27 | } | 27 | } |
28 | 28 | ||
29 | static inline void arch_local_irq_disable(void) | 29 | static inline notrace void arch_local_irq_disable(void) |
30 | { | 30 | { |
31 | arch_local_irq_save(); | 31 | arch_local_irq_save(); |
32 | } | 32 | } |
33 | 33 | ||
34 | static inline bool arch_irqs_disabled_flags(unsigned long flags) | 34 | static inline notrace bool arch_irqs_disabled_flags(unsigned long flags) |
35 | { | 35 | { |
36 | return (flags & PSR_PIL) != 0; | 36 | return (flags & PSR_PIL) != 0; |
37 | } | 37 | } |
38 | 38 | ||
39 | static inline bool arch_irqs_disabled(void) | 39 | static inline notrace bool arch_irqs_disabled(void) |
40 | { | 40 | { |
41 | return arch_irqs_disabled_flags(arch_local_save_flags()); | 41 | return arch_irqs_disabled_flags(arch_local_save_flags()); |
42 | } | 42 | } |
diff --git a/arch/sparc/include/asm/irqflags_64.h b/arch/sparc/include/asm/irqflags_64.h index aab969c82c2b..23cd27f6beb4 100644 --- a/arch/sparc/include/asm/irqflags_64.h +++ b/arch/sparc/include/asm/irqflags_64.h | |||
@@ -14,7 +14,7 @@ | |||
14 | 14 | ||
15 | #ifndef __ASSEMBLY__ | 15 | #ifndef __ASSEMBLY__ |
16 | 16 | ||
17 | static inline unsigned long arch_local_save_flags(void) | 17 | static inline notrace unsigned long arch_local_save_flags(void) |
18 | { | 18 | { |
19 | unsigned long flags; | 19 | unsigned long flags; |
20 | 20 | ||
@@ -26,7 +26,7 @@ static inline unsigned long arch_local_save_flags(void) | |||
26 | return flags; | 26 | return flags; |
27 | } | 27 | } |
28 | 28 | ||
29 | static inline void arch_local_irq_restore(unsigned long flags) | 29 | static inline notrace void arch_local_irq_restore(unsigned long flags) |
30 | { | 30 | { |
31 | __asm__ __volatile__( | 31 | __asm__ __volatile__( |
32 | "wrpr %0, %%pil" | 32 | "wrpr %0, %%pil" |
@@ -36,7 +36,7 @@ static inline void arch_local_irq_restore(unsigned long flags) | |||
36 | ); | 36 | ); |
37 | } | 37 | } |
38 | 38 | ||
39 | static inline void arch_local_irq_disable(void) | 39 | static inline notrace void arch_local_irq_disable(void) |
40 | { | 40 | { |
41 | __asm__ __volatile__( | 41 | __asm__ __volatile__( |
42 | "wrpr %0, %%pil" | 42 | "wrpr %0, %%pil" |
@@ -46,7 +46,7 @@ static inline void arch_local_irq_disable(void) | |||
46 | ); | 46 | ); |
47 | } | 47 | } |
48 | 48 | ||
49 | static inline void arch_local_irq_enable(void) | 49 | static inline notrace void arch_local_irq_enable(void) |
50 | { | 50 | { |
51 | __asm__ __volatile__( | 51 | __asm__ __volatile__( |
52 | "wrpr 0, %%pil" | 52 | "wrpr 0, %%pil" |
@@ -56,17 +56,17 @@ static inline void arch_local_irq_enable(void) | |||
56 | ); | 56 | ); |
57 | } | 57 | } |
58 | 58 | ||
59 | static inline int arch_irqs_disabled_flags(unsigned long flags) | 59 | static inline notrace int arch_irqs_disabled_flags(unsigned long flags) |
60 | { | 60 | { |
61 | return (flags > 0); | 61 | return (flags > 0); |
62 | } | 62 | } |
63 | 63 | ||
64 | static inline int arch_irqs_disabled(void) | 64 | static inline notrace int arch_irqs_disabled(void) |
65 | { | 65 | { |
66 | return arch_irqs_disabled_flags(arch_local_save_flags()); | 66 | return arch_irqs_disabled_flags(arch_local_save_flags()); |
67 | } | 67 | } |
68 | 68 | ||
69 | static inline unsigned long arch_local_irq_save(void) | 69 | static inline notrace unsigned long arch_local_irq_save(void) |
70 | { | 70 | { |
71 | unsigned long flags, tmp; | 71 | unsigned long flags, tmp; |
72 | 72 | ||
diff --git a/arch/sparc/include/asm/leon_pci.h b/arch/sparc/include/asm/leon_pci.h index 42b4b31a82fe..f48527ebdd8f 100644 --- a/arch/sparc/include/asm/leon_pci.h +++ b/arch/sparc/include/asm/leon_pci.h | |||
@@ -12,7 +12,7 @@ struct leon_pci_info { | |||
12 | struct pci_ops *ops; | 12 | struct pci_ops *ops; |
13 | struct resource io_space; | 13 | struct resource io_space; |
14 | struct resource mem_space; | 14 | struct resource mem_space; |
15 | int (*map_irq)(struct pci_dev *dev, u8 slot, u8 pin); | 15 | int (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin); |
16 | }; | 16 | }; |
17 | 17 | ||
18 | extern void leon_pci_init(struct platform_device *ofdev, | 18 | extern void leon_pci_init(struct platform_device *ofdev, |
diff --git a/arch/sparc/include/asm/local.h b/arch/sparc/include/asm/local.h deleted file mode 100644 index bc80815a435c..000000000000 --- a/arch/sparc/include/asm/local.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _SPARC_LOCAL_H | ||
2 | #define _SPARC_LOCAL_H | ||
3 | |||
4 | #include <asm-generic/local.h> | ||
5 | |||
6 | #endif | ||
diff --git a/arch/sparc/include/asm/local64.h b/arch/sparc/include/asm/local64.h deleted file mode 100644 index 36c93b5cc239..000000000000 --- a/arch/sparc/include/asm/local64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/local64.h> | ||
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h index 862e3ce92b15..02939abd356c 100644 --- a/arch/sparc/include/asm/pci_32.h +++ b/arch/sparc/include/asm/pci_32.h | |||
@@ -42,9 +42,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, | |||
42 | } | 42 | } |
43 | #endif | 43 | #endif |
44 | 44 | ||
45 | struct device_node; | ||
46 | extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); | ||
47 | |||
48 | #endif /* __KERNEL__ */ | 45 | #endif /* __KERNEL__ */ |
49 | 46 | ||
50 | #ifndef CONFIG_LEON_PCI | 47 | #ifndef CONFIG_LEON_PCI |
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h index 948b686ec089..2614d96141c9 100644 --- a/arch/sparc/include/asm/pci_64.h +++ b/arch/sparc/include/asm/pci_64.h | |||
@@ -91,9 +91,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) | |||
91 | return PCI_IRQ_NONE; | 91 | return PCI_IRQ_NONE; |
92 | } | 92 | } |
93 | 93 | ||
94 | struct device_node; | ||
95 | extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); | ||
96 | |||
97 | #define HAVE_ARCH_PCI_RESOURCE_TO_USER | 94 | #define HAVE_ARCH_PCI_RESOURCE_TO_USER |
98 | extern void pci_resource_to_user(const struct pci_dev *dev, int bar, | 95 | extern void pci_resource_to_user(const struct pci_dev *dev, int bar, |
99 | const struct resource *rsrc, | 96 | const struct resource *rsrc, |
diff --git a/arch/sparc/include/asm/pgalloc_64.h b/arch/sparc/include/asm/pgalloc_64.h index 4e5e0878144f..40b2d7a7023d 100644 --- a/arch/sparc/include/asm/pgalloc_64.h +++ b/arch/sparc/include/asm/pgalloc_64.h | |||
@@ -5,7 +5,6 @@ | |||
5 | #include <linux/sched.h> | 5 | #include <linux/sched.h> |
6 | #include <linux/mm.h> | 6 | #include <linux/mm.h> |
7 | #include <linux/slab.h> | 7 | #include <linux/slab.h> |
8 | #include <linux/quicklist.h> | ||
9 | 8 | ||
10 | #include <asm/spitfire.h> | 9 | #include <asm/spitfire.h> |
11 | #include <asm/cpudata.h> | 10 | #include <asm/cpudata.h> |
@@ -14,71 +13,114 @@ | |||
14 | 13 | ||
15 | /* Page table allocation/freeing. */ | 14 | /* Page table allocation/freeing. */ |
16 | 15 | ||
16 | extern struct kmem_cache *pgtable_cache; | ||
17 | |||
17 | static inline pgd_t *pgd_alloc(struct mm_struct *mm) | 18 | static inline pgd_t *pgd_alloc(struct mm_struct *mm) |
18 | { | 19 | { |
19 | return quicklist_alloc(0, GFP_KERNEL, NULL); | 20 | return kmem_cache_alloc(pgtable_cache, GFP_KERNEL); |
20 | } | 21 | } |
21 | 22 | ||
22 | static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) | 23 | static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) |
23 | { | 24 | { |
24 | quicklist_free(0, NULL, pgd); | 25 | kmem_cache_free(pgtable_cache, pgd); |
25 | } | 26 | } |
26 | 27 | ||
27 | #define pud_populate(MM, PUD, PMD) pud_set(PUD, PMD) | 28 | #define pud_populate(MM, PUD, PMD) pud_set(PUD, PMD) |
28 | 29 | ||
29 | static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) | 30 | static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) |
30 | { | 31 | { |
31 | return quicklist_alloc(0, GFP_KERNEL, NULL); | 32 | return kmem_cache_alloc(pgtable_cache, |
33 | GFP_KERNEL|__GFP_REPEAT); | ||
32 | } | 34 | } |
33 | 35 | ||
34 | static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) | 36 | static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) |
35 | { | 37 | { |
36 | quicklist_free(0, NULL, pmd); | 38 | kmem_cache_free(pgtable_cache, pmd); |
37 | } | 39 | } |
38 | 40 | ||
39 | static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, | 41 | static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, |
40 | unsigned long address) | 42 | unsigned long address) |
41 | { | 43 | { |
42 | return quicklist_alloc(0, GFP_KERNEL, NULL); | 44 | return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); |
43 | } | 45 | } |
44 | 46 | ||
45 | static inline pgtable_t pte_alloc_one(struct mm_struct *mm, | 47 | static inline pgtable_t pte_alloc_one(struct mm_struct *mm, |
46 | unsigned long address) | 48 | unsigned long address) |
47 | { | 49 | { |
48 | struct page *page; | 50 | struct page *page; |
49 | void *pg; | 51 | pte_t *pte; |
50 | 52 | ||
51 | pg = quicklist_alloc(0, GFP_KERNEL, NULL); | 53 | pte = pte_alloc_one_kernel(mm, address); |
52 | if (!pg) | 54 | if (!pte) |
53 | return NULL; | 55 | return NULL; |
54 | page = virt_to_page(pg); | 56 | page = virt_to_page(pte); |
55 | pgtable_page_ctor(page); | 57 | pgtable_page_ctor(page); |
56 | return page; | 58 | return page; |
57 | } | 59 | } |
58 | 60 | ||
59 | static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) | 61 | static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) |
60 | { | 62 | { |
61 | quicklist_free(0, NULL, pte); | 63 | free_page((unsigned long)pte); |
62 | } | 64 | } |
63 | 65 | ||
64 | static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage) | 66 | static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage) |
65 | { | 67 | { |
66 | pgtable_page_dtor(ptepage); | 68 | pgtable_page_dtor(ptepage); |
67 | quicklist_free_page(0, NULL, ptepage); | 69 | __free_page(ptepage); |
68 | } | 70 | } |
69 | 71 | ||
70 | |||
71 | #define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE) | 72 | #define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE) |
72 | #define pmd_populate(MM,PMD,PTE_PAGE) \ | 73 | #define pmd_populate(MM,PMD,PTE_PAGE) \ |
73 | pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE)) | 74 | pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE)) |
74 | #define pmd_pgtable(pmd) pmd_page(pmd) | 75 | #define pmd_pgtable(pmd) pmd_page(pmd) |
75 | 76 | ||
76 | static inline void check_pgt_cache(void) | 77 | #define check_pgt_cache() do { } while (0) |
78 | |||
79 | static inline void pgtable_free(void *table, bool is_page) | ||
80 | { | ||
81 | if (is_page) | ||
82 | free_page((unsigned long)table); | ||
83 | else | ||
84 | kmem_cache_free(pgtable_cache, table); | ||
85 | } | ||
86 | |||
87 | #ifdef CONFIG_SMP | ||
88 | |||
89 | struct mmu_gather; | ||
90 | extern void tlb_remove_table(struct mmu_gather *, void *); | ||
91 | |||
92 | static inline void pgtable_free_tlb(struct mmu_gather *tlb, void *table, bool is_page) | ||
93 | { | ||
94 | unsigned long pgf = (unsigned long)table; | ||
95 | if (is_page) | ||
96 | pgf |= 0x1UL; | ||
97 | tlb_remove_table(tlb, (void *)pgf); | ||
98 | } | ||
99 | |||
100 | static inline void __tlb_remove_table(void *_table) | ||
101 | { | ||
102 | void *table = (void *)((unsigned long)_table & ~0x1UL); | ||
103 | bool is_page = false; | ||
104 | |||
105 | if ((unsigned long)_table & 0x1UL) | ||
106 | is_page = true; | ||
107 | pgtable_free(table, is_page); | ||
108 | } | ||
109 | #else /* CONFIG_SMP */ | ||
110 | static inline void pgtable_free_tlb(struct mmu_gather *tlb, void *table, bool is_page) | ||
77 | { | 111 | { |
78 | quicklist_trim(0, NULL, 25, 16); | 112 | pgtable_free(table, is_page); |
113 | } | ||
114 | #endif /* !CONFIG_SMP */ | ||
115 | |||
116 | static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *ptepage, | ||
117 | unsigned long address) | ||
118 | { | ||
119 | pgtable_page_dtor(ptepage); | ||
120 | pgtable_free_tlb(tlb, page_address(ptepage), true); | ||
79 | } | 121 | } |
80 | 122 | ||
81 | #define __pte_free_tlb(tlb, pte, addr) pte_free((tlb)->mm, pte) | 123 | #define __pmd_free_tlb(tlb, pmd, addr) \ |
82 | #define __pmd_free_tlb(tlb, pmd, addr) pmd_free((tlb)->mm, pmd) | 124 | pgtable_free_tlb(tlb, pmd, false) |
83 | 125 | ||
84 | #endif /* _SPARC64_PGALLOC_H */ | 126 | #endif /* _SPARC64_PGALLOC_H */ |
diff --git a/arch/sparc/include/asm/pgtable_32.h b/arch/sparc/include/asm/pgtable_32.h index 5b31a8e89823..a790cc657476 100644 --- a/arch/sparc/include/asm/pgtable_32.h +++ b/arch/sparc/include/asm/pgtable_32.h | |||
@@ -431,10 +431,6 @@ extern unsigned long *sparc_valid_addr_bitmap; | |||
431 | #define kern_addr_valid(addr) \ | 431 | #define kern_addr_valid(addr) \ |
432 | (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) | 432 | (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) |
433 | 433 | ||
434 | extern int io_remap_pfn_range(struct vm_area_struct *vma, | ||
435 | unsigned long from, unsigned long pfn, | ||
436 | unsigned long size, pgprot_t prot); | ||
437 | |||
438 | /* | 434 | /* |
439 | * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in | 435 | * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in |
440 | * its high 4 bits. These macros/functions put it there or get it from there. | 436 | * its high 4 bits. These macros/functions put it there or get it from there. |
@@ -443,6 +439,22 @@ extern int io_remap_pfn_range(struct vm_area_struct *vma, | |||
443 | #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) | 439 | #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) |
444 | #define GET_PFN(pfn) (pfn & 0x0fffffffUL) | 440 | #define GET_PFN(pfn) (pfn & 0x0fffffffUL) |
445 | 441 | ||
442 | extern int remap_pfn_range(struct vm_area_struct *, unsigned long, unsigned long, | ||
443 | unsigned long, pgprot_t); | ||
444 | |||
445 | static inline int io_remap_pfn_range(struct vm_area_struct *vma, | ||
446 | unsigned long from, unsigned long pfn, | ||
447 | unsigned long size, pgprot_t prot) | ||
448 | { | ||
449 | unsigned long long offset, space, phys_base; | ||
450 | |||
451 | offset = ((unsigned long long) GET_PFN(pfn)) << PAGE_SHIFT; | ||
452 | space = GET_IOSPACE(pfn); | ||
453 | phys_base = offset | (space << 32ULL); | ||
454 | |||
455 | return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot); | ||
456 | } | ||
457 | |||
446 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS | 458 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
447 | #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ | 459 | #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ |
448 | ({ \ | 460 | ({ \ |
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h index 1e03c5a6b4f7..38ebb2c60137 100644 --- a/arch/sparc/include/asm/pgtable_64.h +++ b/arch/sparc/include/asm/pgtable_64.h | |||
@@ -95,6 +95,10 @@ | |||
95 | /* PTE bits which are the same in SUN4U and SUN4V format. */ | 95 | /* PTE bits which are the same in SUN4U and SUN4V format. */ |
96 | #define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */ | 96 | #define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */ |
97 | #define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit uptodate*/ | 97 | #define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit uptodate*/ |
98 | #define _PAGE_SPECIAL _AC(0x0200000000000000,UL) /* Special page */ | ||
99 | |||
100 | /* Advertise support for _PAGE_SPECIAL */ | ||
101 | #define __HAVE_ARCH_PTE_SPECIAL | ||
98 | 102 | ||
99 | /* SUN4U pte bits... */ | 103 | /* SUN4U pte bits... */ |
100 | #define _PAGE_SZ4MB_4U _AC(0x6000000000000000,UL) /* 4MB Page */ | 104 | #define _PAGE_SZ4MB_4U _AC(0x6000000000000000,UL) /* 4MB Page */ |
@@ -104,6 +108,7 @@ | |||
104 | #define _PAGE_NFO_4U _AC(0x1000000000000000,UL) /* No Fault Only */ | 108 | #define _PAGE_NFO_4U _AC(0x1000000000000000,UL) /* No Fault Only */ |
105 | #define _PAGE_IE_4U _AC(0x0800000000000000,UL) /* Invert Endianness */ | 109 | #define _PAGE_IE_4U _AC(0x0800000000000000,UL) /* Invert Endianness */ |
106 | #define _PAGE_SOFT2_4U _AC(0x07FC000000000000,UL) /* Software bits, set 2 */ | 110 | #define _PAGE_SOFT2_4U _AC(0x07FC000000000000,UL) /* Software bits, set 2 */ |
111 | #define _PAGE_SPECIAL_4U _AC(0x0200000000000000,UL) /* Special page */ | ||
107 | #define _PAGE_RES1_4U _AC(0x0002000000000000,UL) /* Reserved */ | 112 | #define _PAGE_RES1_4U _AC(0x0002000000000000,UL) /* Reserved */ |
108 | #define _PAGE_SZ32MB_4U _AC(0x0001000000000000,UL) /* (Panther) 32MB page */ | 113 | #define _PAGE_SZ32MB_4U _AC(0x0001000000000000,UL) /* (Panther) 32MB page */ |
109 | #define _PAGE_SZ256MB_4U _AC(0x2001000000000000,UL) /* (Panther) 256MB page */ | 114 | #define _PAGE_SZ256MB_4U _AC(0x2001000000000000,UL) /* (Panther) 256MB page */ |
@@ -133,6 +138,7 @@ | |||
133 | #define _PAGE_ACCESSED_4V _AC(0x1000000000000000,UL) /* Accessed (ref'd) */ | 138 | #define _PAGE_ACCESSED_4V _AC(0x1000000000000000,UL) /* Accessed (ref'd) */ |
134 | #define _PAGE_READ_4V _AC(0x0800000000000000,UL) /* Readable SW Bit */ | 139 | #define _PAGE_READ_4V _AC(0x0800000000000000,UL) /* Readable SW Bit */ |
135 | #define _PAGE_WRITE_4V _AC(0x0400000000000000,UL) /* Writable SW Bit */ | 140 | #define _PAGE_WRITE_4V _AC(0x0400000000000000,UL) /* Writable SW Bit */ |
141 | #define _PAGE_SPECIAL_4V _AC(0x0200000000000000,UL) /* Special page */ | ||
136 | #define _PAGE_PADDR_4V _AC(0x00FFFFFFFFFFE000,UL) /* paddr[55:13] */ | 142 | #define _PAGE_PADDR_4V _AC(0x00FFFFFFFFFFE000,UL) /* paddr[55:13] */ |
137 | #define _PAGE_IE_4V _AC(0x0000000000001000,UL) /* Invert Endianness */ | 143 | #define _PAGE_IE_4V _AC(0x0000000000001000,UL) /* Invert Endianness */ |
138 | #define _PAGE_E_4V _AC(0x0000000000000800,UL) /* side-Effect */ | 144 | #define _PAGE_E_4V _AC(0x0000000000000800,UL) /* side-Effect */ |
@@ -302,10 +308,10 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t prot) | |||
302 | : "=r" (mask), "=r" (tmp) | 308 | : "=r" (mask), "=r" (tmp) |
303 | : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U | | 309 | : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U | |
304 | _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U | | 310 | _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U | |
305 | _PAGE_SZBITS_4U), | 311 | _PAGE_SZBITS_4U | _PAGE_SPECIAL), |
306 | "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V | | 312 | "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V | |
307 | _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V | | 313 | _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V | |
308 | _PAGE_SZBITS_4V)); | 314 | _PAGE_SZBITS_4V | _PAGE_SPECIAL)); |
309 | 315 | ||
310 | return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask)); | 316 | return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask)); |
311 | } | 317 | } |
@@ -502,6 +508,7 @@ static inline pte_t pte_mkyoung(pte_t pte) | |||
502 | 508 | ||
503 | static inline pte_t pte_mkspecial(pte_t pte) | 509 | static inline pte_t pte_mkspecial(pte_t pte) |
504 | { | 510 | { |
511 | pte_val(pte) |= _PAGE_SPECIAL; | ||
505 | return pte; | 512 | return pte; |
506 | } | 513 | } |
507 | 514 | ||
@@ -607,9 +614,9 @@ static inline unsigned long pte_present(pte_t pte) | |||
607 | return val; | 614 | return val; |
608 | } | 615 | } |
609 | 616 | ||
610 | static inline int pte_special(pte_t pte) | 617 | static inline unsigned long pte_special(pte_t pte) |
611 | { | 618 | { |
612 | return 0; | 619 | return pte_val(pte) & _PAGE_SPECIAL; |
613 | } | 620 | } |
614 | 621 | ||
615 | #define pmd_set(pmdp, ptep) \ | 622 | #define pmd_set(pmdp, ptep) \ |
@@ -750,10 +757,6 @@ static inline bool kern_addr_valid(unsigned long addr) | |||
750 | 757 | ||
751 | extern int page_in_phys_avail(unsigned long paddr); | 758 | extern int page_in_phys_avail(unsigned long paddr); |
752 | 759 | ||
753 | extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, | ||
754 | unsigned long pfn, | ||
755 | unsigned long size, pgprot_t prot); | ||
756 | |||
757 | /* | 760 | /* |
758 | * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in | 761 | * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in |
759 | * its high 4 bits. These macros/functions put it there or get it from there. | 762 | * its high 4 bits. These macros/functions put it there or get it from there. |
@@ -762,6 +765,22 @@ extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, | |||
762 | #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) | 765 | #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) |
763 | #define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL) | 766 | #define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL) |
764 | 767 | ||
768 | extern int remap_pfn_range(struct vm_area_struct *, unsigned long, unsigned long, | ||
769 | unsigned long, pgprot_t); | ||
770 | |||
771 | static inline int io_remap_pfn_range(struct vm_area_struct *vma, | ||
772 | unsigned long from, unsigned long pfn, | ||
773 | unsigned long size, pgprot_t prot) | ||
774 | { | ||
775 | unsigned long offset = GET_PFN(pfn) << PAGE_SHIFT; | ||
776 | int space = GET_IOSPACE(pfn); | ||
777 | unsigned long phys_base; | ||
778 | |||
779 | phys_base = offset | (((unsigned long) space) << 32UL); | ||
780 | |||
781 | return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot); | ||
782 | } | ||
783 | |||
765 | #include <asm-generic/pgtable.h> | 784 | #include <asm-generic/pgtable.h> |
766 | 785 | ||
767 | /* We provide our own get_unmapped_area to cope with VA holes and | 786 | /* We provide our own get_unmapped_area to cope with VA holes and |
diff --git a/arch/sparc/include/asm/pgtsrmmu.h b/arch/sparc/include/asm/pgtsrmmu.h index 1407c07bdade..f6ae2b2b6870 100644 --- a/arch/sparc/include/asm/pgtsrmmu.h +++ b/arch/sparc/include/asm/pgtsrmmu.h | |||
@@ -280,7 +280,7 @@ static inline unsigned long srmmu_hwprobe(unsigned long vaddr) | |||
280 | return retval; | 280 | return retval; |
281 | } | 281 | } |
282 | #else | 282 | #else |
283 | #define srmmu_hwprobe(addr) (srmmu_swprobe(addr, 0) & SRMMU_PTE_PMASK) | 283 | #define srmmu_hwprobe(addr) srmmu_swprobe(addr, 0) |
284 | #endif | 284 | #endif |
285 | 285 | ||
286 | static inline int | 286 | static inline int |
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h index 56bbaadef646..edd3d3cde460 100644 --- a/arch/sparc/include/asm/prom.h +++ b/arch/sparc/include/asm/prom.h | |||
@@ -21,7 +21,7 @@ | |||
21 | #include <linux/of_pdt.h> | 21 | #include <linux/of_pdt.h> |
22 | #include <linux/proc_fs.h> | 22 | #include <linux/proc_fs.h> |
23 | #include <linux/mutex.h> | 23 | #include <linux/mutex.h> |
24 | #include <asm/atomic.h> | 24 | #include <linux/atomic.h> |
25 | 25 | ||
26 | #define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 2 | 26 | #define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 2 |
27 | #define OF_ROOT_NODE_SIZE_CELLS_DEFAULT 1 | 27 | #define OF_ROOT_NODE_SIZE_CELLS_DEFAULT 1 |
diff --git a/arch/sparc/include/asm/ptrace.h b/arch/sparc/include/asm/ptrace.h index c7ad3fe2b252..a0e1bcf843a1 100644 --- a/arch/sparc/include/asm/ptrace.h +++ b/arch/sparc/include/asm/ptrace.h | |||
@@ -205,6 +205,7 @@ do { current_thread_info()->syscall_noerror = 1; \ | |||
205 | } while (0) | 205 | } while (0) |
206 | #define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) | 206 | #define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) |
207 | #define instruction_pointer(regs) ((regs)->tpc) | 207 | #define instruction_pointer(regs) ((regs)->tpc) |
208 | #define instruction_pointer_set(regs, val) ((regs)->tpc = (val)) | ||
208 | #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) | 209 | #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) |
209 | #define regs_return_value(regs) ((regs)->u_regs[UREG_I0]) | 210 | #define regs_return_value(regs) ((regs)->u_regs[UREG_I0]) |
210 | #ifdef CONFIG_SMP | 211 | #ifdef CONFIG_SMP |
@@ -212,7 +213,6 @@ extern unsigned long profile_pc(struct pt_regs *); | |||
212 | #else | 213 | #else |
213 | #define profile_pc(regs) instruction_pointer(regs) | 214 | #define profile_pc(regs) instruction_pointer(regs) |
214 | #endif | 215 | #endif |
215 | extern void show_regs(struct pt_regs *); | ||
216 | #endif /* (__KERNEL__) */ | 216 | #endif /* (__KERNEL__) */ |
217 | 217 | ||
218 | #else /* __ASSEMBLY__ */ | 218 | #else /* __ASSEMBLY__ */ |
@@ -256,7 +256,6 @@ static inline bool pt_regs_clear_syscall(struct pt_regs *regs) | |||
256 | #define instruction_pointer(regs) ((regs)->pc) | 256 | #define instruction_pointer(regs) ((regs)->pc) |
257 | #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) | 257 | #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) |
258 | unsigned long profile_pc(struct pt_regs *); | 258 | unsigned long profile_pc(struct pt_regs *); |
259 | extern void show_regs(struct pt_regs *); | ||
260 | #endif /* (__KERNEL__) */ | 259 | #endif /* (__KERNEL__) */ |
261 | 260 | ||
262 | #else /* (!__ASSEMBLY__) */ | 261 | #else /* (!__ASSEMBLY__) */ |
diff --git a/arch/sparc/include/asm/sigcontext.h b/arch/sparc/include/asm/sigcontext.h index a1607d180354..69914d748130 100644 --- a/arch/sparc/include/asm/sigcontext.h +++ b/arch/sparc/include/asm/sigcontext.h | |||
@@ -45,6 +45,19 @@ typedef struct { | |||
45 | int si_mask; | 45 | int si_mask; |
46 | } __siginfo32_t; | 46 | } __siginfo32_t; |
47 | 47 | ||
48 | #define __SIGC_MAXWIN 7 | ||
49 | |||
50 | typedef struct { | ||
51 | unsigned long locals[8]; | ||
52 | unsigned long ins[8]; | ||
53 | } __siginfo_reg_window; | ||
54 | |||
55 | typedef struct { | ||
56 | int wsaved; | ||
57 | __siginfo_reg_window reg_window[__SIGC_MAXWIN]; | ||
58 | unsigned long rwbuf_stkptrs[__SIGC_MAXWIN]; | ||
59 | } __siginfo_rwin_t; | ||
60 | |||
48 | #ifdef CONFIG_SPARC64 | 61 | #ifdef CONFIG_SPARC64 |
49 | typedef struct { | 62 | typedef struct { |
50 | unsigned int si_float_regs [64]; | 63 | unsigned int si_float_regs [64]; |
@@ -73,6 +86,7 @@ struct sigcontext { | |||
73 | unsigned long ss_size; | 86 | unsigned long ss_size; |
74 | } sigc_stack; | 87 | } sigc_stack; |
75 | unsigned long sigc_mask; | 88 | unsigned long sigc_mask; |
89 | __siginfo_rwin_t * sigc_rwin_save; | ||
76 | }; | 90 | }; |
77 | 91 | ||
78 | #else | 92 | #else |
diff --git a/arch/sparc/include/asm/smp_32.h b/arch/sparc/include/asm/smp_32.h index 093f10843ff2..01c51c704341 100644 --- a/arch/sparc/include/asm/smp_32.h +++ b/arch/sparc/include/asm/smp_32.h | |||
@@ -22,7 +22,7 @@ | |||
22 | 22 | ||
23 | #include <asm/ptrace.h> | 23 | #include <asm/ptrace.h> |
24 | #include <asm/asi.h> | 24 | #include <asm/asi.h> |
25 | #include <asm/atomic.h> | 25 | #include <linux/atomic.h> |
26 | 26 | ||
27 | /* | 27 | /* |
28 | * Private routines/data | 28 | * Private routines/data |
diff --git a/arch/sparc/include/asm/smp_64.h b/arch/sparc/include/asm/smp_64.h index 20bca8950710..29862a9e9065 100644 --- a/arch/sparc/include/asm/smp_64.h +++ b/arch/sparc/include/asm/smp_64.h | |||
@@ -27,7 +27,7 @@ | |||
27 | */ | 27 | */ |
28 | 28 | ||
29 | #include <linux/bitops.h> | 29 | #include <linux/bitops.h> |
30 | #include <asm/atomic.h> | 30 | #include <linux/atomic.h> |
31 | #include <asm/percpu.h> | 31 | #include <asm/percpu.h> |
32 | 32 | ||
33 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); | 33 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); |
diff --git a/arch/sparc/include/asm/spinlock_32.h b/arch/sparc/include/asm/spinlock_32.h index 5f5b8bf3f50d..bcc98fc35281 100644 --- a/arch/sparc/include/asm/spinlock_32.h +++ b/arch/sparc/include/asm/spinlock_32.h | |||
@@ -131,6 +131,15 @@ static inline void arch_write_lock(arch_rwlock_t *rw) | |||
131 | *(volatile __u32 *)&lp->lock = ~0U; | 131 | *(volatile __u32 *)&lp->lock = ~0U; |
132 | } | 132 | } |
133 | 133 | ||
134 | static void inline arch_write_unlock(arch_rwlock_t *lock) | ||
135 | { | ||
136 | __asm__ __volatile__( | ||
137 | " st %%g0, [%0]" | ||
138 | : /* no outputs */ | ||
139 | : "r" (lock) | ||
140 | : "memory"); | ||
141 | } | ||
142 | |||
134 | static inline int arch_write_trylock(arch_rwlock_t *rw) | 143 | static inline int arch_write_trylock(arch_rwlock_t *rw) |
135 | { | 144 | { |
136 | unsigned int val; | 145 | unsigned int val; |
@@ -175,8 +184,6 @@ static inline int __arch_read_trylock(arch_rwlock_t *rw) | |||
175 | res; \ | 184 | res; \ |
176 | }) | 185 | }) |
177 | 186 | ||
178 | #define arch_write_unlock(rw) do { (rw)->lock = 0; } while(0) | ||
179 | |||
180 | #define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock) | 187 | #define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock) |
181 | #define arch_read_lock_flags(rw, flags) arch_read_lock(rw) | 188 | #define arch_read_lock_flags(rw, flags) arch_read_lock(rw) |
182 | #define arch_write_lock_flags(rw, flags) arch_write_lock(rw) | 189 | #define arch_write_lock_flags(rw, flags) arch_write_lock(rw) |
diff --git a/arch/sparc/include/asm/spinlock_64.h b/arch/sparc/include/asm/spinlock_64.h index 073936a8b275..968917694978 100644 --- a/arch/sparc/include/asm/spinlock_64.h +++ b/arch/sparc/include/asm/spinlock_64.h | |||
@@ -210,14 +210,8 @@ static int inline arch_write_trylock(arch_rwlock_t *lock) | |||
210 | return result; | 210 | return result; |
211 | } | 211 | } |
212 | 212 | ||
213 | #define arch_read_lock(p) arch_read_lock(p) | ||
214 | #define arch_read_lock_flags(p, f) arch_read_lock(p) | 213 | #define arch_read_lock_flags(p, f) arch_read_lock(p) |
215 | #define arch_read_trylock(p) arch_read_trylock(p) | ||
216 | #define arch_read_unlock(p) arch_read_unlock(p) | ||
217 | #define arch_write_lock(p) arch_write_lock(p) | ||
218 | #define arch_write_lock_flags(p, f) arch_write_lock(p) | 214 | #define arch_write_lock_flags(p, f) arch_write_lock(p) |
219 | #define arch_write_unlock(p) arch_write_unlock(p) | ||
220 | #define arch_write_trylock(p) arch_write_trylock(p) | ||
221 | 215 | ||
222 | #define arch_read_can_lock(rw) (!((rw)->lock & 0x80000000UL)) | 216 | #define arch_read_can_lock(rw) (!((rw)->lock & 0x80000000UL)) |
223 | #define arch_write_can_lock(rw) (!(rw)->lock) | 217 | #define arch_write_can_lock(rw) (!(rw)->lock) |
diff --git a/arch/sparc/include/asm/spitfire.h b/arch/sparc/include/asm/spitfire.h index f0d0c40c44da..d06a26601753 100644 --- a/arch/sparc/include/asm/spitfire.h +++ b/arch/sparc/include/asm/spitfire.h | |||
@@ -42,6 +42,9 @@ | |||
42 | #define SUN4V_CHIP_INVALID 0x00 | 42 | #define SUN4V_CHIP_INVALID 0x00 |
43 | #define SUN4V_CHIP_NIAGARA1 0x01 | 43 | #define SUN4V_CHIP_NIAGARA1 0x01 |
44 | #define SUN4V_CHIP_NIAGARA2 0x02 | 44 | #define SUN4V_CHIP_NIAGARA2 0x02 |
45 | #define SUN4V_CHIP_NIAGARA3 0x03 | ||
46 | #define SUN4V_CHIP_NIAGARA4 0x04 | ||
47 | #define SUN4V_CHIP_NIAGARA5 0x05 | ||
45 | #define SUN4V_CHIP_UNKNOWN 0xff | 48 | #define SUN4V_CHIP_UNKNOWN 0xff |
46 | 49 | ||
47 | #ifndef __ASSEMBLY__ | 50 | #ifndef __ASSEMBLY__ |
diff --git a/arch/sparc/include/asm/termios.h b/arch/sparc/include/asm/termios.h index e8ba95399643..e2f46705a210 100644 --- a/arch/sparc/include/asm/termios.h +++ b/arch/sparc/include/asm/termios.h | |||
@@ -40,7 +40,6 @@ struct winsize { | |||
40 | }; | 40 | }; |
41 | 41 | ||
42 | #ifdef __KERNEL__ | 42 | #ifdef __KERNEL__ |
43 | #include <linux/module.h> | ||
44 | 43 | ||
45 | /* | 44 | /* |
46 | * c_cc characters in the termio structure. Oh, how I love being | 45 | * c_cc characters in the termio structure. Oh, how I love being |
diff --git a/arch/sparc/include/asm/tsb.h b/arch/sparc/include/asm/tsb.h index 83c571d8c8a7..1a8afd1ad04f 100644 --- a/arch/sparc/include/asm/tsb.h +++ b/arch/sparc/include/asm/tsb.h | |||
@@ -133,29 +133,6 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; | |||
133 | sub TSB, 0x8, TSB; \ | 133 | sub TSB, 0x8, TSB; \ |
134 | TSB_STORE(TSB, TAG); | 134 | TSB_STORE(TSB, TAG); |
135 | 135 | ||
136 | #define KTSB_LOAD_QUAD(TSB, REG) \ | ||
137 | ldda [TSB] ASI_NUCLEUS_QUAD_LDD, REG; | ||
138 | |||
139 | #define KTSB_STORE(ADDR, VAL) \ | ||
140 | stxa VAL, [ADDR] ASI_N; | ||
141 | |||
142 | #define KTSB_LOCK_TAG(TSB, REG1, REG2) \ | ||
143 | 99: lduwa [TSB] ASI_N, REG1; \ | ||
144 | sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\ | ||
145 | andcc REG1, REG2, %g0; \ | ||
146 | bne,pn %icc, 99b; \ | ||
147 | nop; \ | ||
148 | casa [TSB] ASI_N, REG1, REG2;\ | ||
149 | cmp REG1, REG2; \ | ||
150 | bne,pn %icc, 99b; \ | ||
151 | nop; \ | ||
152 | |||
153 | #define KTSB_WRITE(TSB, TTE, TAG) \ | ||
154 | add TSB, 0x8, TSB; \ | ||
155 | stxa TTE, [TSB] ASI_N; \ | ||
156 | sub TSB, 0x8, TSB; \ | ||
157 | stxa TAG, [TSB] ASI_N; | ||
158 | |||
159 | /* Do a kernel page table walk. Leaves physical PTE pointer in | 136 | /* Do a kernel page table walk. Leaves physical PTE pointer in |
160 | * REG1. Jumps to FAIL_LABEL on early page table walk termination. | 137 | * REG1. Jumps to FAIL_LABEL on early page table walk termination. |
161 | * VADDR will not be clobbered, but REG2 will. | 138 | * VADDR will not be clobbered, but REG2 will. |
@@ -239,6 +216,8 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; | |||
239 | (KERNEL_TSB_SIZE_BYTES / 16) | 216 | (KERNEL_TSB_SIZE_BYTES / 16) |
240 | #define KERNEL_TSB4M_NENTRIES 4096 | 217 | #define KERNEL_TSB4M_NENTRIES 4096 |
241 | 218 | ||
219 | #define KTSB_PHYS_SHIFT 15 | ||
220 | |||
242 | /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL | 221 | /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL |
243 | * on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries | 222 | * on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries |
244 | * and the found TTE will be left in REG1. REG3 and REG4 must | 223 | * and the found TTE will be left in REG1. REG3 and REG4 must |
@@ -247,13 +226,22 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; | |||
247 | * VADDR and TAG will be preserved and not clobbered by this macro. | 226 | * VADDR and TAG will be preserved and not clobbered by this macro. |
248 | */ | 227 | */ |
249 | #define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ | 228 | #define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ |
250 | sethi %hi(swapper_tsb), REG1; \ | 229 | 661: sethi %hi(swapper_tsb), REG1; \ |
251 | or REG1, %lo(swapper_tsb), REG1; \ | 230 | or REG1, %lo(swapper_tsb), REG1; \ |
231 | .section .swapper_tsb_phys_patch, "ax"; \ | ||
232 | .word 661b; \ | ||
233 | .previous; \ | ||
234 | 661: nop; \ | ||
235 | .section .tsb_ldquad_phys_patch, "ax"; \ | ||
236 | .word 661b; \ | ||
237 | sllx REG1, KTSB_PHYS_SHIFT, REG1; \ | ||
238 | sllx REG1, KTSB_PHYS_SHIFT, REG1; \ | ||
239 | .previous; \ | ||
252 | srlx VADDR, PAGE_SHIFT, REG2; \ | 240 | srlx VADDR, PAGE_SHIFT, REG2; \ |
253 | and REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \ | 241 | and REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \ |
254 | sllx REG2, 4, REG2; \ | 242 | sllx REG2, 4, REG2; \ |
255 | add REG1, REG2, REG2; \ | 243 | add REG1, REG2, REG2; \ |
256 | KTSB_LOAD_QUAD(REG2, REG3); \ | 244 | TSB_LOAD_QUAD(REG2, REG3); \ |
257 | cmp REG3, TAG; \ | 245 | cmp REG3, TAG; \ |
258 | be,a,pt %xcc, OK_LABEL; \ | 246 | be,a,pt %xcc, OK_LABEL; \ |
259 | mov REG4, REG1; | 247 | mov REG4, REG1; |
@@ -263,12 +251,21 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; | |||
263 | * we can make use of that for the index computation. | 251 | * we can make use of that for the index computation. |
264 | */ | 252 | */ |
265 | #define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ | 253 | #define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ |
266 | sethi %hi(swapper_4m_tsb), REG1; \ | 254 | 661: sethi %hi(swapper_4m_tsb), REG1; \ |
267 | or REG1, %lo(swapper_4m_tsb), REG1; \ | 255 | or REG1, %lo(swapper_4m_tsb), REG1; \ |
256 | .section .swapper_4m_tsb_phys_patch, "ax"; \ | ||
257 | .word 661b; \ | ||
258 | .previous; \ | ||
259 | 661: nop; \ | ||
260 | .section .tsb_ldquad_phys_patch, "ax"; \ | ||
261 | .word 661b; \ | ||
262 | sllx REG1, KTSB_PHYS_SHIFT, REG1; \ | ||
263 | sllx REG1, KTSB_PHYS_SHIFT, REG1; \ | ||
264 | .previous; \ | ||
268 | and TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \ | 265 | and TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \ |
269 | sllx REG2, 4, REG2; \ | 266 | sllx REG2, 4, REG2; \ |
270 | add REG1, REG2, REG2; \ | 267 | add REG1, REG2, REG2; \ |
271 | KTSB_LOAD_QUAD(REG2, REG3); \ | 268 | TSB_LOAD_QUAD(REG2, REG3); \ |
272 | cmp REG3, TAG; \ | 269 | cmp REG3, TAG; \ |
273 | be,a,pt %xcc, OK_LABEL; \ | 270 | be,a,pt %xcc, OK_LABEL; \ |
274 | mov REG4, REG1; | 271 | mov REG4, REG1; |
diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h index 6260d5deeabc..c7cb0af0eb59 100644 --- a/arch/sparc/include/asm/unistd.h +++ b/arch/sparc/include/asm/unistd.h | |||
@@ -406,8 +406,10 @@ | |||
406 | #define __NR_syncfs 335 | 406 | #define __NR_syncfs 335 |
407 | #define __NR_sendmmsg 336 | 407 | #define __NR_sendmmsg 336 |
408 | #define __NR_setns 337 | 408 | #define __NR_setns 337 |
409 | #define __NR_process_vm_readv 338 | ||
410 | #define __NR_process_vm_writev 339 | ||
409 | 411 | ||
410 | #define NR_syscalls 338 | 412 | #define NR_syscalls 340 |
411 | 413 | ||
412 | #ifdef __32bit_syscall_numbers__ | 414 | #ifdef __32bit_syscall_numbers__ |
413 | /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, | 415 | /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, |
diff --git a/arch/sparc/include/asm/xor_64.h b/arch/sparc/include/asm/xor_64.h index bee4bf4be3af..ee8edc68423e 100644 --- a/arch/sparc/include/asm/xor_64.h +++ b/arch/sparc/include/asm/xor_64.h | |||
@@ -65,6 +65,9 @@ static struct xor_block_template xor_block_niagara = { | |||
65 | #define XOR_SELECT_TEMPLATE(FASTEST) \ | 65 | #define XOR_SELECT_TEMPLATE(FASTEST) \ |
66 | ((tlb_type == hypervisor && \ | 66 | ((tlb_type == hypervisor && \ |
67 | (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \ | 67 | (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \ |
68 | sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \ | 68 | sun4v_chip_type == SUN4V_CHIP_NIAGARA2 || \ |
69 | sun4v_chip_type == SUN4V_CHIP_NIAGARA3 || \ | ||
70 | sun4v_chip_type == SUN4V_CHIP_NIAGARA4 || \ | ||
71 | sun4v_chip_type == SUN4V_CHIP_NIAGARA5)) ? \ | ||
69 | &xor_block_niagara : \ | 72 | &xor_block_niagara : \ |
70 | &xor_block_VIS) | 73 | &xor_block_VIS) |