diff options
Diffstat (limited to 'arch/sparc/include/asm/spinlock_32.h')
-rw-r--r-- | arch/sparc/include/asm/spinlock_32.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/sparc/include/asm/spinlock_32.h b/arch/sparc/include/asm/spinlock_32.h index 9b0f2f53c81c..06d37e588fde 100644 --- a/arch/sparc/include/asm/spinlock_32.h +++ b/arch/sparc/include/asm/spinlock_32.h | |||
@@ -65,7 +65,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) | |||
65 | * Sort of like atomic_t's on Sparc, but even more clever. | 65 | * Sort of like atomic_t's on Sparc, but even more clever. |
66 | * | 66 | * |
67 | * ------------------------------------ | 67 | * ------------------------------------ |
68 | * | 24-bit counter | wlock | raw_rwlock_t | 68 | * | 24-bit counter | wlock | arch_rwlock_t |
69 | * ------------------------------------ | 69 | * ------------------------------------ |
70 | * 31 8 7 0 | 70 | * 31 8 7 0 |
71 | * | 71 | * |
@@ -76,9 +76,9 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) | |||
76 | * | 76 | * |
77 | * Unfortunately this scheme limits us to ~16,000,000 cpus. | 77 | * Unfortunately this scheme limits us to ~16,000,000 cpus. |
78 | */ | 78 | */ |
79 | static inline void arch_read_lock(raw_rwlock_t *rw) | 79 | static inline void arch_read_lock(arch_rwlock_t *rw) |
80 | { | 80 | { |
81 | register raw_rwlock_t *lp asm("g1"); | 81 | register arch_rwlock_t *lp asm("g1"); |
82 | lp = rw; | 82 | lp = rw; |
83 | __asm__ __volatile__( | 83 | __asm__ __volatile__( |
84 | "mov %%o7, %%g4\n\t" | 84 | "mov %%o7, %%g4\n\t" |
@@ -96,9 +96,9 @@ do { unsigned long flags; \ | |||
96 | local_irq_restore(flags); \ | 96 | local_irq_restore(flags); \ |
97 | } while(0) | 97 | } while(0) |
98 | 98 | ||
99 | static inline void arch_read_unlock(raw_rwlock_t *rw) | 99 | static inline void arch_read_unlock(arch_rwlock_t *rw) |
100 | { | 100 | { |
101 | register raw_rwlock_t *lp asm("g1"); | 101 | register arch_rwlock_t *lp asm("g1"); |
102 | lp = rw; | 102 | lp = rw; |
103 | __asm__ __volatile__( | 103 | __asm__ __volatile__( |
104 | "mov %%o7, %%g4\n\t" | 104 | "mov %%o7, %%g4\n\t" |
@@ -116,9 +116,9 @@ do { unsigned long flags; \ | |||
116 | local_irq_restore(flags); \ | 116 | local_irq_restore(flags); \ |
117 | } while(0) | 117 | } while(0) |
118 | 118 | ||
119 | static inline void __raw_write_lock(raw_rwlock_t *rw) | 119 | static inline void __raw_write_lock(arch_rwlock_t *rw) |
120 | { | 120 | { |
121 | register raw_rwlock_t *lp asm("g1"); | 121 | register arch_rwlock_t *lp asm("g1"); |
122 | lp = rw; | 122 | lp = rw; |
123 | __asm__ __volatile__( | 123 | __asm__ __volatile__( |
124 | "mov %%o7, %%g4\n\t" | 124 | "mov %%o7, %%g4\n\t" |
@@ -130,7 +130,7 @@ static inline void __raw_write_lock(raw_rwlock_t *rw) | |||
130 | *(volatile __u32 *)&lp->lock = ~0U; | 130 | *(volatile __u32 *)&lp->lock = ~0U; |
131 | } | 131 | } |
132 | 132 | ||
133 | static inline int __raw_write_trylock(raw_rwlock_t *rw) | 133 | static inline int __raw_write_trylock(arch_rwlock_t *rw) |
134 | { | 134 | { |
135 | unsigned int val; | 135 | unsigned int val; |
136 | 136 | ||
@@ -150,9 +150,9 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw) | |||
150 | return (val == 0); | 150 | return (val == 0); |
151 | } | 151 | } |
152 | 152 | ||
153 | static inline int arch_read_trylock(raw_rwlock_t *rw) | 153 | static inline int arch_read_trylock(arch_rwlock_t *rw) |
154 | { | 154 | { |
155 | register raw_rwlock_t *lp asm("g1"); | 155 | register arch_rwlock_t *lp asm("g1"); |
156 | register int res asm("o0"); | 156 | register int res asm("o0"); |
157 | lp = rw; | 157 | lp = rw; |
158 | __asm__ __volatile__( | 158 | __asm__ __volatile__( |