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-rw-r--r--arch/sparc/include/asm/memreg.h51
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/memreg.h b/arch/sparc/include/asm/memreg.h
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1#ifndef _SPARC_MEMREG_H
2#define _SPARC_MEMREG_H
3/* memreg.h: Definitions of the values found in the synchronous
4 * and asynchronous memory error registers when a fault
5 * occurs on the sun4c.
6 *
7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
8 */
9
10/* First the synchronous error codes, these are usually just
11 * normal page faults.
12 */
13
14#define SUN4C_SYNC_WDRESET 0x0001 /* watchdog reset */
15#define SUN4C_SYNC_SIZE 0x0002 /* bad access size? whuz this? */
16#define SUN4C_SYNC_PARITY 0x0008 /* bad ram chips caused a parity error */
17#define SUN4C_SYNC_SBUS 0x0010 /* the SBUS had some problems... */
18#define SUN4C_SYNC_NOMEM 0x0020 /* translation to non-existent ram */
19#define SUN4C_SYNC_PROT 0x0040 /* access violated pte protections */
20#define SUN4C_SYNC_NPRESENT 0x0080 /* pte said that page was not present */
21#define SUN4C_SYNC_BADWRITE 0x8000 /* while writing something went bogus */
22
23#define SUN4C_SYNC_BOLIXED \
24 (SUN4C_SYNC_WDRESET | SUN4C_SYNC_SIZE | SUN4C_SYNC_SBUS | \
25 SUN4C_SYNC_NOMEM | SUN4C_SYNC_PARITY)
26
27/* Now the asynchronous error codes, these are almost always produced
28 * by the cache writing things back to memory and getting a bad translation.
29 * Bad DVMA transactions can cause these faults too.
30 */
31
32#define SUN4C_ASYNC_BADDVMA 0x0010 /* error during DVMA access */
33#define SUN4C_ASYNC_NOMEM 0x0020 /* write back pointed to bad phys addr */
34#define SUN4C_ASYNC_BADWB 0x0080 /* write back points to non-present page */
35
36/* Memory parity error register with associated bit constants. */
37#ifndef __ASSEMBLY__
38extern __volatile__ unsigned long __iomem *sun4c_memerr_reg;
39#endif
40
41#define SUN4C_MPE_ERROR 0x80 /* Parity error detected. (ro) */
42#define SUN4C_MPE_MULTI 0x40 /* Multiple parity errors detected. (ro) */
43#define SUN4C_MPE_TEST 0x20 /* Write inverse parity. (rw) */
44#define SUN4C_MPE_CHECK 0x10 /* Enable parity checking. (rw) */
45#define SUN4C_MPE_ERR00 0x08 /* Parity error in bits 0-7. (ro) */
46#define SUN4C_MPE_ERR08 0x04 /* Parity error in bits 8-15. (ro) */
47#define SUN4C_MPE_ERR16 0x02 /* Parity error in bits 16-23. (ro) */
48#define SUN4C_MPE_ERR24 0x01 /* Parity error in bits 24-31. (ro) */
49#define SUN4C_MPE_ERRS 0x0F /* Bit mask for the error bits. (ro) */
50
51#endif /* !(_SPARC_MEMREG_H) */