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-rw-r--r--arch/sh/include/asm/dma-mapping.h15
-rw-r--r--arch/sh/include/asm/ioctls.h2
-rw-r--r--arch/sh/include/asm/page.h2
-rw-r--r--arch/sh/include/asm/scatterlist.h2
4 files changed, 3 insertions, 18 deletions
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
index bea3337a426a..1a73c3e759a7 100644
--- a/arch/sh/include/asm/dma-mapping.h
+++ b/arch/sh/include/asm/dma-mapping.h
@@ -42,21 +42,6 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
42#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 42#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
43#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 43#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
44 44
45#ifdef CONFIG_DMA_COHERENT
46#define dma_is_consistent(d, h) (1)
47#else
48#define dma_is_consistent(d, h) (0)
49#endif
50
51static inline int dma_get_cache_alignment(void)
52{
53 /*
54 * Each processor family will define its own L1_CACHE_SHIFT,
55 * L1_CACHE_BYTES wraps to this, so this is always safe.
56 */
57 return L1_CACHE_BYTES;
58}
59
60static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 45static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
61{ 46{
62 struct dma_map_ops *ops = get_dma_ops(dev); 47 struct dma_map_ops *ops = get_dma_ops(dev);
diff --git a/arch/sh/include/asm/ioctls.h b/arch/sh/include/asm/ioctls.h
index c212c371a4a5..eb6c4c687972 100644
--- a/arch/sh/include/asm/ioctls.h
+++ b/arch/sh/include/asm/ioctls.h
@@ -69,6 +69,7 @@
69# define TIOCPKT_START 8 69# define TIOCPKT_START 8
70# define TIOCPKT_NOSTOP 16 70# define TIOCPKT_NOSTOP 16
71# define TIOCPKT_DOSTOP 32 71# define TIOCPKT_DOSTOP 32
72# define TIOCPKT_IOCTL 64
72 73
73 74
74#define TIOCNOTTY _IO('T', 34) /* 0x5422 */ 75#define TIOCNOTTY _IO('T', 34) /* 0x5422 */
@@ -84,6 +85,7 @@
84#define TCSETSF2 _IOW('T', 45, struct termios2) 85#define TCSETSF2 _IOW('T', 45, struct termios2)
85#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 86#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
86#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 87#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
88#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
87 89
88#define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */ 90#define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */
89#define TIOCSERGWILD _IOR('T', 84, int) /* 0x5454 */ 91#define TIOCSERGWILD _IOR('T', 84, int) /* 0x5454 */
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index fb703d120d09..c4e0b3d472b9 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -180,7 +180,7 @@ typedef struct page *pgtable_t;
180 * Some drivers need to perform DMA into kmalloc'ed buffers 180 * Some drivers need to perform DMA into kmalloc'ed buffers
181 * and so we have to increase the kmalloc minalign for this. 181 * and so we have to increase the kmalloc minalign for this.
182 */ 182 */
183#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES 183#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
184 184
185#ifdef CONFIG_SUPERH64 185#ifdef CONFIG_SUPERH64
186/* 186/*
diff --git a/arch/sh/include/asm/scatterlist.h b/arch/sh/include/asm/scatterlist.h
index e38d1d4c7f6f..98dfc3510f10 100644
--- a/arch/sh/include/asm/scatterlist.h
+++ b/arch/sh/include/asm/scatterlist.h
@@ -1,8 +1,6 @@
1#ifndef __ASM_SH_SCATTERLIST_H 1#ifndef __ASM_SH_SCATTERLIST_H
2#define __ASM_SH_SCATTERLIST_H 2#define __ASM_SH_SCATTERLIST_H
3 3
4#define ISA_DMA_THRESHOLD phys_addr_mask()
5
6#include <asm-generic/scatterlist.h> 4#include <asm-generic/scatterlist.h>
7 5
8#endif /* __ASM_SH_SCATTERLIST_H */ 6#endif /* __ASM_SH_SCATTERLIST_H */