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-rw-r--r--arch/sh/Kconfig11
-rw-r--r--arch/sh/Makefile2
-rw-r--r--arch/sh/boards/bigsur/Makefile6
-rw-r--r--arch/sh/boards/bigsur/io.c120
-rw-r--r--arch/sh/boards/bigsur/irq.c334
-rw-r--r--arch/sh/boards/bigsur/led.c54
-rw-r--r--arch/sh/boards/bigsur/setup.c88
-rw-r--r--arch/sh/boards/ec3104/Makefile6
-rw-r--r--arch/sh/boards/ec3104/io.c81
-rw-r--r--arch/sh/boards/ec3104/irq.c196
-rw-r--r--arch/sh/boards/ec3104/setup.c65
-rw-r--r--arch/sh/drivers/pci/Makefile1
-rw-r--r--arch/sh/drivers/pci/ops-bigsur.c83
-rw-r--r--arch/sh/drivers/pci/pci-sh7751.c9
-rw-r--r--arch/sh/tools/mach-types1
15 files changed, 1 insertions, 1056 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 90c8c42e7e8b..4d16d8917074 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -135,12 +135,6 @@ config SH_HP6XX
135 More information (hardware only) at 135 More information (hardware only) at
136 <http://www.hp.com/jornada/>. 136 <http://www.hp.com/jornada/>.
137 137
138config SH_EC3104
139 bool "EC3104"
140 help
141 Select EC3104 if configuring for a system with an Eclipse
142 International EC3104 chip, e.g. the Harris AD2000.
143
144config SH_SATURN 138config SH_SATURN
145 bool "Saturn" 139 bool "Saturn"
146 select CPU_SUBTYPE_SH7604 140 select CPU_SUBTYPE_SH7604
@@ -156,9 +150,6 @@ config SH_DREAMCAST
156 <http://www.m17n.org/linux-sh/dreamcast/>. There is a 150 <http://www.m17n.org/linux-sh/dreamcast/>. There is a
157 Dreamcast project is at <http://linuxdc.sourceforge.net/>. 151 Dreamcast project is at <http://linuxdc.sourceforge.net/>.
158 152
159config SH_BIGSUR
160 bool "BigSur"
161
162config SH_MPC1211 153config SH_MPC1211
163 bool "Interface MPC1211" 154 bool "Interface MPC1211"
164 help 155 help
@@ -511,7 +502,7 @@ source "arch/sh/cchips/Kconfig"
511config HEARTBEAT 502config HEARTBEAT
512 bool "Heartbeat LED" 503 bool "Heartbeat LED"
513 depends on SH_MPC1211 || SH_SH03 || \ 504 depends on SH_MPC1211 || SH_SH03 || \
514 SH_BIGSUR || SOLUTION_ENGINE || \ 505 SOLUTION_ENGINE || \
515 SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK || \ 506 SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK || \
516 SH_R7780RP 507 SH_R7780RP
517 help 508 help
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 4903c7c665a9..bd9b1729f8b8 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -94,10 +94,8 @@ machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300
94machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) := se/7343 94machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) := se/7343
95machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180 95machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
96machdir-$(CONFIG_SH_HP6XX) := hp6xx 96machdir-$(CONFIG_SH_HP6XX) := hp6xx
97machdir-$(CONFIG_SH_EC3104) := ec3104
98machdir-$(CONFIG_SH_SATURN) := saturn 97machdir-$(CONFIG_SH_SATURN) := saturn
99machdir-$(CONFIG_SH_DREAMCAST) := dreamcast 98machdir-$(CONFIG_SH_DREAMCAST) := dreamcast
100machdir-$(CONFIG_SH_BIGSUR) := bigsur
101machdir-$(CONFIG_SH_MPC1211) := mpc1211 99machdir-$(CONFIG_SH_MPC1211) := mpc1211
102machdir-$(CONFIG_SH_SH03) := sh03 100machdir-$(CONFIG_SH_SH03) := sh03
103machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear 101machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear
diff --git a/arch/sh/boards/bigsur/Makefile b/arch/sh/boards/bigsur/Makefile
deleted file mode 100644
index 0ff9497ac58e..000000000000
--- a/arch/sh/boards/bigsur/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for the BigSur specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o led.o
6
diff --git a/arch/sh/boards/bigsur/io.c b/arch/sh/boards/bigsur/io.c
deleted file mode 100644
index 23071f97eec3..000000000000
--- a/arch/sh/boards/bigsur/io.c
+++ /dev/null
@@ -1,120 +0,0 @@
1/*
2 * arch/sh/boards/bigsur/io.c
3 *
4 * By Dustin McIntire (dustin@sensoria.com) (c)2001
5 * Derived from io_hd64465.h, which bore the message:
6 * By Greg Banks <gbanks@pocketpenguins.com>
7 * (c) 2000 PocketPenguins Inc.
8 * and from io_hd64461.h, which bore the message:
9 * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
10 *
11 * May be copied or modified under the terms of the GNU General Public
12 * License. See linux/COPYING for more information.
13 *
14 * IO functions for a Hitachi Big Sur Evaluation Board.
15 */
16
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <asm/machvec.h>
20#include <asm/io.h>
21#include <asm/bigsur/bigsur.h>
22
23/* Low iomap maps port 0-1K to addresses in 8byte chunks */
24#define BIGSUR_IOMAP_LO_THRESH 0x400
25#define BIGSUR_IOMAP_LO_SHIFT 3
26#define BIGSUR_IOMAP_LO_MASK ((1<<BIGSUR_IOMAP_LO_SHIFT)-1)
27#define BIGSUR_IOMAP_LO_NMAP (BIGSUR_IOMAP_LO_THRESH>>BIGSUR_IOMAP_LO_SHIFT)
28static u32 bigsur_iomap_lo[BIGSUR_IOMAP_LO_NMAP];
29static u8 bigsur_iomap_lo_shift[BIGSUR_IOMAP_LO_NMAP];
30
31/* High iomap maps port 1K-64K to addresses in 1K chunks */
32#define BIGSUR_IOMAP_HI_THRESH 0x10000
33#define BIGSUR_IOMAP_HI_SHIFT 10
34#define BIGSUR_IOMAP_HI_MASK ((1<<BIGSUR_IOMAP_HI_SHIFT)-1)
35#define BIGSUR_IOMAP_HI_NMAP (BIGSUR_IOMAP_HI_THRESH>>BIGSUR_IOMAP_HI_SHIFT)
36static u32 bigsur_iomap_hi[BIGSUR_IOMAP_HI_NMAP];
37static u8 bigsur_iomap_hi_shift[BIGSUR_IOMAP_HI_NMAP];
38
39void bigsur_port_map(u32 baseport, u32 nports, u32 addr, u8 shift)
40{
41 u32 port, endport = baseport + nports;
42
43 pr_debug("bigsur_port_map(base=0x%0x, n=0x%0x, addr=0x%08x)\n",
44 baseport, nports, addr);
45
46 for (port = baseport ;
47 port < endport && port < BIGSUR_IOMAP_LO_THRESH ;
48 port += (1<<BIGSUR_IOMAP_LO_SHIFT)) {
49 pr_debug(" maplo[0x%x] = 0x%08x\n", port, addr);
50 bigsur_iomap_lo[port>>BIGSUR_IOMAP_LO_SHIFT] = addr;
51 bigsur_iomap_lo_shift[port>>BIGSUR_IOMAP_LO_SHIFT] = shift;
52 addr += (1<<(BIGSUR_IOMAP_LO_SHIFT));
53 }
54
55 for (port = max_t(u32, baseport, BIGSUR_IOMAP_LO_THRESH);
56 port < endport && port < BIGSUR_IOMAP_HI_THRESH ;
57 port += (1<<BIGSUR_IOMAP_HI_SHIFT)) {
58 pr_debug(" maphi[0x%x] = 0x%08x\n", port, addr);
59 bigsur_iomap_hi[port>>BIGSUR_IOMAP_HI_SHIFT] = addr;
60 bigsur_iomap_hi_shift[port>>BIGSUR_IOMAP_HI_SHIFT] = shift;
61 addr += (1<<(BIGSUR_IOMAP_HI_SHIFT));
62 }
63}
64EXPORT_SYMBOL(bigsur_port_map);
65
66void bigsur_port_unmap(u32 baseport, u32 nports)
67{
68 u32 port, endport = baseport + nports;
69
70 pr_debug("bigsur_port_unmap(base=0x%0x, n=0x%0x)\n", baseport, nports);
71
72 for (port = baseport ;
73 port < endport && port < BIGSUR_IOMAP_LO_THRESH ;
74 port += (1<<BIGSUR_IOMAP_LO_SHIFT)) {
75 bigsur_iomap_lo[port>>BIGSUR_IOMAP_LO_SHIFT] = 0;
76 }
77
78 for (port = max_t(u32, baseport, BIGSUR_IOMAP_LO_THRESH);
79 port < endport && port < BIGSUR_IOMAP_HI_THRESH ;
80 port += (1<<BIGSUR_IOMAP_HI_SHIFT)) {
81 bigsur_iomap_hi[port>>BIGSUR_IOMAP_HI_SHIFT] = 0;
82 }
83}
84EXPORT_SYMBOL(bigsur_port_unmap);
85
86unsigned long bigsur_isa_port2addr(unsigned long port)
87{
88 unsigned long addr = 0;
89 unsigned char shift;
90
91 /* Physical address not in P0, do nothing */
92 if (PXSEG(port)) {
93 addr = port;
94 /* physical address in P0, map to P2 */
95 } else if (port >= 0x30000) {
96 addr = P2SEGADDR(port);
97 /* Big Sur I/O + HD64465 registers 0x10000-0x30000 */
98 } else if (port >= BIGSUR_IOMAP_HI_THRESH) {
99 addr = BIGSUR_INTERNAL_BASE + (port - BIGSUR_IOMAP_HI_THRESH);
100 /* Handle remapping of high IO/PCI IO ports */
101 } else if (port >= BIGSUR_IOMAP_LO_THRESH) {
102 addr = bigsur_iomap_hi[port >> BIGSUR_IOMAP_HI_SHIFT];
103 shift = bigsur_iomap_hi_shift[port >> BIGSUR_IOMAP_HI_SHIFT];
104
105 if (addr != 0)
106 addr += (port & BIGSUR_IOMAP_HI_MASK) << shift;
107 } else {
108 /* Handle remapping of low IO ports */
109 addr = bigsur_iomap_lo[port >> BIGSUR_IOMAP_LO_SHIFT];
110 shift = bigsur_iomap_lo_shift[port >> BIGSUR_IOMAP_LO_SHIFT];
111
112 if (addr != 0)
113 addr += (port & BIGSUR_IOMAP_LO_MASK) << shift;
114 }
115
116 pr_debug("%s(0x%08lx) = 0x%08lx\n", __FUNCTION__, port, addr);
117
118 return addr;
119}
120
diff --git a/arch/sh/boards/bigsur/irq.c b/arch/sh/boards/bigsur/irq.c
deleted file mode 100644
index 1ab04da36382..000000000000
--- a/arch/sh/boards/bigsur/irq.c
+++ /dev/null
@@ -1,334 +0,0 @@
1/*
2 *
3 * By Dustin McIntire (dustin@sensoria.com) (c)2001
4 *
5 * Setup and IRQ handling code for the HD64465 companion chip.
6 * by Greg Banks <gbanks@pocketpenguins.com>
7 * Copyright (c) 2000 PocketPenguins Inc
8 *
9 * Derived from setup_hd64465.c which bore the message:
10 * Greg Banks <gbanks@pocketpenguins.com>
11 * Copyright (c) 2000 PocketPenguins Inc and
12 * Copyright (C) 2000 YAEGASHI Takeshi
13 * and setup_cqreek.c which bore message:
14 * Copyright (C) 2000 Niibe Yutaka
15 *
16 * May be copied or modified under the terms of the GNU General Public
17 * License. See linux/COPYING for more information.
18 *
19 * IRQ functions for a Hitachi Big Sur Evaluation Board.
20 *
21 */
22#undef DEBUG
23
24#include <linux/sched.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/param.h>
28#include <linux/ioport.h>
29#include <linux/interrupt.h>
30#include <linux/init.h>
31#include <linux/irq.h>
32#include <linux/bitops.h>
33
34#include <asm/io.h>
35#include <asm/irq.h>
36
37#include <asm/bigsur/io.h>
38#include <asm/hd64465/hd64465.h>
39#include <asm/bigsur/bigsur.h>
40
41//#define BIGSUR_DEBUG 3
42#undef BIGSUR_DEBUG
43
44#ifdef BIGSUR_DEBUG
45#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args)
46#else
47#define DIPRINTK(n, args...)
48#endif /* BIGSUR_DEBUG */
49
50#ifdef CONFIG_HD64465
51extern int hd64465_irq_demux(int irq);
52#endif /* CONFIG_HD64465 */
53
54
55/*===========================================================*/
56// Big Sur CPLD IRQ Routines
57/*===========================================================*/
58
59/* Level 1 IRQ routines */
60static void disable_bigsur_l1irq(unsigned int irq)
61{
62 unsigned char mask;
63 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
64 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
65
66 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
67 pr_debug("Disable L1 IRQ %d\n", irq);
68 DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
69 mask_port, bit);
70
71 /* Disable IRQ - set mask bit */
72 mask = inb(mask_port) | bit;
73 outb(mask, mask_port);
74 return;
75 }
76 pr_debug("disable_bigsur_l1irq: Invalid IRQ %d\n", irq);
77}
78
79static void enable_bigsur_l1irq(unsigned int irq)
80{
81 unsigned char mask;
82 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
83 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
84
85 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
86 pr_debug("Enable L1 IRQ %d\n", irq);
87 DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
88 mask_port, bit);
89 /* Enable L1 IRQ - clear mask bit */
90 mask = inb(mask_port) & ~bit;
91 outb(mask, mask_port);
92 return;
93 }
94 pr_debug("enable_bigsur_l1irq: Invalid IRQ %d\n", irq);
95}
96
97
98/* Level 2 irq masks and registers for L2 decoding */
99/* Level2 bitmasks for each level 1 IRQ */
100const u32 bigsur_l2irq_mask[] =
101 {0x40,0x80,0x08,0x01,0x01,0x3C,0x3E,0xFF,0x40,0x80,0x06,0x03};
102/* Level2 to ISR[n] map for each level 1 IRQ */
103const u32 bigsur_l2irq_reg[] =
104 { 2, 2, 3, 3, 1, 2, 1, 0, 1, 1, 3, 2};
105/* Level2 to Level 1 IRQ map */
106const u32 bigsur_l2_l1_map[] =
107 {7,7,7,7,7,7,7,7, 4,6,6,6,6,6,8,9, 11,11,5,5,5,5,0,1, 3,10,10,2,-1,-1,-1,-1};
108/* IRQ inactive level (high or low) */
109const u32 bigsur_l2_inactv_state[] = {0x00, 0xBE, 0xFC, 0xF7};
110
111/* CPLD external status and mask registers base and offsets */
112static const u32 isr_base = BIGSUR_IRQ0;
113static const u32 isr_offset = BIGSUR_IRQ0 - BIGSUR_IRQ1;
114static const u32 imr_base = BIGSUR_IMR0;
115static const u32 imr_offset = BIGSUR_IMR0 - BIGSUR_IMR1;
116
117#define REG_NUM(irq) ((irq-BIGSUR_2NDLVL_IRQ_LOW)/8 )
118
119/* Level 2 IRQ routines */
120static void disable_bigsur_l2irq(unsigned int irq)
121{
122 unsigned char mask;
123 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
124 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
125
126 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
127 pr_debug("Disable L2 IRQ %d\n", irq);
128 DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
129 mask_port, bit);
130
131 /* Disable L2 IRQ - set mask bit */
132 mask = inb(mask_port) | bit;
133 outb(mask, mask_port);
134 return;
135 }
136 pr_debug("disable_bigsur_l2irq: Invalid IRQ %d\n", irq);
137}
138
139static void enable_bigsur_l2irq(unsigned int irq)
140{
141 unsigned char mask;
142 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
143 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
144
145 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
146 pr_debug("Enable L2 IRQ %d\n", irq);
147 DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
148 mask_port, bit);
149
150 /* Enable L2 IRQ - clear mask bit */
151 mask = inb(mask_port) & ~bit;
152 outb(mask, mask_port);
153 return;
154 }
155 pr_debug("enable_bigsur_l2irq: Invalid IRQ %d\n", irq);
156}
157
158static void mask_and_ack_bigsur(unsigned int irq)
159{
160 pr_debug("mask_and_ack_bigsur IRQ %d\n", irq);
161 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
162 disable_bigsur_l1irq(irq);
163 else
164 disable_bigsur_l2irq(irq);
165}
166
167static void end_bigsur_irq(unsigned int irq)
168{
169 pr_debug("end_bigsur_irq IRQ %d\n", irq);
170 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
171 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
172 enable_bigsur_l1irq(irq);
173 else
174 enable_bigsur_l2irq(irq);
175 }
176}
177
178static unsigned int startup_bigsur_irq(unsigned int irq)
179{
180 u8 mask;
181 u32 reg;
182
183 pr_debug("startup_bigsur_irq IRQ %d\n", irq);
184
185 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
186 /* Enable the L1 IRQ */
187 enable_bigsur_l1irq(irq);
188 /* Enable all L2 IRQs in this L1 IRQ */
189 mask = ~(bigsur_l2irq_mask[irq-BIGSUR_IRQ_LOW]);
190 reg = imr_base - bigsur_l2irq_reg[irq-BIGSUR_IRQ_LOW] * imr_offset;
191 mask &= inb(reg);
192 outb(mask,reg);
193 DIPRINTK(2,"startup_bigsur_irq: IMR=0x%08x mask=0x%x\n",reg,inb(reg));
194 }
195 else {
196 /* Enable the L2 IRQ - clear mask bit */
197 enable_bigsur_l2irq(irq);
198 /* Enable the L1 bit masking this L2 IRQ */
199 enable_bigsur_l1irq(bigsur_l2_l1_map[irq-BIGSUR_2NDLVL_IRQ_LOW]);
200 DIPRINTK(2,"startup_bigsur_irq: L1=%d L2=%d\n",
201 bigsur_l2_l1_map[irq-BIGSUR_2NDLVL_IRQ_LOW],irq);
202 }
203 return 0;
204}
205
206static void shutdown_bigsur_irq(unsigned int irq)
207{
208 pr_debug("shutdown_bigsur_irq IRQ %d\n", irq);
209 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
210 disable_bigsur_l1irq(irq);
211 else
212 disable_bigsur_l2irq(irq);
213}
214
215/* Define the IRQ structures for the L1 and L2 IRQ types */
216static struct hw_interrupt_type bigsur_l1irq_type = {
217 .typename = "BigSur-CPLD-Level1-IRQ",
218 .startup = startup_bigsur_irq,
219 .shutdown = shutdown_bigsur_irq,
220 .enable = enable_bigsur_l1irq,
221 .disable = disable_bigsur_l1irq,
222 .ack = mask_and_ack_bigsur,
223 .end = end_bigsur_irq
224};
225
226static struct hw_interrupt_type bigsur_l2irq_type = {
227 .typename = "BigSur-CPLD-Level2-IRQ",
228 .startup = startup_bigsur_irq,
229 .shutdown =shutdown_bigsur_irq,
230 .enable = enable_bigsur_l2irq,
231 .disable = disable_bigsur_l2irq,
232 .ack = mask_and_ack_bigsur,
233 .end = end_bigsur_irq
234};
235
236
237static void make_bigsur_l1isr(unsigned int irq) {
238
239 /* sanity check first */
240 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
241 /* save the handler in the main description table */
242 irq_desc[irq].chip = &bigsur_l1irq_type;
243 irq_desc[irq].status = IRQ_DISABLED;
244 irq_desc[irq].action = 0;
245 irq_desc[irq].depth = 1;
246
247 disable_bigsur_l1irq(irq);
248 return;
249 }
250 pr_debug("make_bigsur_l1isr: bad irq, %d\n", irq);
251 return;
252}
253
254static void make_bigsur_l2isr(unsigned int irq) {
255
256 /* sanity check first */
257 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
258 /* save the handler in the main description table */
259 irq_desc[irq].chip = &bigsur_l2irq_type;
260 irq_desc[irq].status = IRQ_DISABLED;
261 irq_desc[irq].action = 0;
262 irq_desc[irq].depth = 1;
263
264 disable_bigsur_l2irq(irq);
265 return;
266 }
267 pr_debug("make_bigsur_l2isr: bad irq, %d\n", irq);
268 return;
269}
270
271/* The IRQ's will be decoded as follows:
272 * If a level 2 handler exists and there is an unmasked active
273 * IRQ, the 2nd level handler will be called.
274 * If a level 2 handler does not exist for the active IRQ
275 * the 1st level handler will be called.
276 */
277
278int bigsur_irq_demux(int irq)
279{
280 int dmux_irq = irq;
281 u8 mask, actv_irqs;
282 u32 reg_num;
283
284 DIPRINTK(3,"bigsur_irq_demux, irq=%d\n", irq);
285 /* decode the 1st level IRQ */
286 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
287 /* Get corresponding L2 ISR bitmask and ISR number */
288 mask = bigsur_l2irq_mask[irq-BIGSUR_IRQ_LOW];
289 reg_num = bigsur_l2irq_reg[irq-BIGSUR_IRQ_LOW];
290 /* find the active IRQ's (XOR with inactive level)*/
291 actv_irqs = inb(isr_base-reg_num*isr_offset) ^
292 bigsur_l2_inactv_state[reg_num];
293 /* decode active IRQ's */
294 actv_irqs = actv_irqs & mask & ~(inb(imr_base-reg_num*imr_offset));
295 /* if NEZ then we have an active L2 IRQ */
296 if(actv_irqs) dmux_irq = ffz(~actv_irqs) + reg_num*8+BIGSUR_2NDLVL_IRQ_LOW;
297 /* if no 2nd level IRQ action, but has 1st level, use 1st level handler */
298 if(!irq_desc[dmux_irq].action && irq_desc[irq].action)
299 dmux_irq = irq;
300 DIPRINTK(1,"bigsur_irq_demux: irq=%d dmux_irq=%d mask=0x%04x reg=%d\n",
301 irq, dmux_irq, mask, reg_num);
302 }
303#ifdef CONFIG_HD64465
304 dmux_irq = hd64465_irq_demux(dmux_irq);
305#endif /* CONFIG_HD64465 */
306 DIPRINTK(3,"bigsur_irq_demux, demux_irq=%d\n", dmux_irq);
307
308 return dmux_irq;
309}
310
311/*===========================================================*/
312// Big Sur Init Routines
313/*===========================================================*/
314void __init init_bigsur_IRQ(void)
315{
316 int i;
317
318 if (!MACH_BIGSUR) return;
319
320 /* Create ISR's for Big Sur CPLD IRQ's */
321 /*==============================================================*/
322 for(i=BIGSUR_IRQ_LOW;i<BIGSUR_IRQ_HIGH;i++)
323 make_bigsur_l1isr(i);
324
325 printk(KERN_INFO "Big Sur CPLD L1 interrupts %d to %d.\n",
326 BIGSUR_IRQ_LOW,BIGSUR_IRQ_HIGH);
327
328 for(i=BIGSUR_2NDLVL_IRQ_LOW;i<BIGSUR_2NDLVL_IRQ_HIGH;i++)
329 make_bigsur_l2isr(i);
330
331 printk(KERN_INFO "Big Sur CPLD L2 interrupts %d to %d.\n",
332 BIGSUR_2NDLVL_IRQ_LOW,BIGSUR_2NDLVL_IRQ_HIGH);
333
334}
diff --git a/arch/sh/boards/bigsur/led.c b/arch/sh/boards/bigsur/led.c
deleted file mode 100644
index d221439aafcc..000000000000
--- a/arch/sh/boards/bigsur/led.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * linux/arch/sh/boards/bigsur/led.c
3 *
4 * By Dustin McIntire (dustin@sensoria.com) (c)2001
5 * Derived from led_se.c and led.c, which bore the message:
6 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * This file contains Big Sur specific LED code.
12 */
13
14#include <asm/io.h>
15#include <asm/bigsur/bigsur.h>
16
17static void mach_led(int position, int value)
18{
19 int word;
20
21 word = bigsur_inl(BIGSUR_CSLR);
22 if (value) {
23 bigsur_outl(word & ~BIGSUR_LED, BIGSUR_CSLR);
24 } else {
25 bigsur_outl(word | BIGSUR_LED, BIGSUR_CSLR);
26 }
27}
28
29#ifdef CONFIG_HEARTBEAT
30
31#include <linux/sched.h>
32
33/* Cycle the LED on/off */
34void heartbeat_bigsur(void)
35{
36 static unsigned cnt = 0, period = 0, dist = 0;
37
38 if (cnt == 0 || cnt == dist)
39 mach_led( -1, 1);
40 else if (cnt == 7 || cnt == dist+7)
41 mach_led( -1, 0);
42
43 if (++cnt > period) {
44 cnt = 0;
45 /* The hyperbolic function below modifies the heartbeat period
46 * length in dependency of the current (5min) load. It goes
47 * through the points f(0)=126, f(1)=86, f(5)=51,
48 * f(inf)->30. */
49 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
50 dist = period / 4;
51 }
52}
53#endif /* CONFIG_HEARTBEAT */
54
diff --git a/arch/sh/boards/bigsur/setup.c b/arch/sh/boards/bigsur/setup.c
deleted file mode 100644
index 9711c20fc9e4..000000000000
--- a/arch/sh/boards/bigsur/setup.c
+++ /dev/null
@@ -1,88 +0,0 @@
1/*
2 *
3 * By Dustin McIntire (dustin@sensoria.com) (c)2001
4 *
5 * Setup and IRQ handling code for the HD64465 companion chip.
6 * by Greg Banks <gbanks@pocketpenguins.com>
7 * Copyright (c) 2000 PocketPenguins Inc
8 *
9 * Derived from setup_hd64465.c which bore the message:
10 * Greg Banks <gbanks@pocketpenguins.com>
11 * Copyright (c) 2000 PocketPenguins Inc and
12 * Copyright (C) 2000 YAEGASHI Takeshi
13 * and setup_cqreek.c which bore message:
14 * Copyright (C) 2000 Niibe Yutaka
15 *
16 * May be copied or modified under the terms of the GNU General Public
17 * License. See linux/COPYING for more information.
18 *
19 * Setup functions for a Hitachi Big Sur Evaluation Board.
20 *
21 */
22
23#include <linux/sched.h>
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/param.h>
27#include <linux/ioport.h>
28#include <linux/interrupt.h>
29#include <linux/init.h>
30#include <linux/irq.h>
31#include <linux/bitops.h>
32
33#include <asm/io.h>
34#include <asm/irq.h>
35#include <asm/machvec.h>
36#include <asm/bigsur/io.h>
37#include <asm/hd64465/hd64465.h>
38#include <asm/bigsur/bigsur.h>
39
40/*===========================================================*/
41// Big Sur Init Routines
42/*===========================================================*/
43
44static void __init bigsur_setup(char **cmdline_p)
45{
46 /* Mask all 2nd level IRQ's */
47 outb(-1,BIGSUR_IMR0);
48 outb(-1,BIGSUR_IMR1);
49 outb(-1,BIGSUR_IMR2);
50 outb(-1,BIGSUR_IMR3);
51
52 /* Mask 1st level interrupts */
53 outb(-1,BIGSUR_IRLMR0);
54 outb(-1,BIGSUR_IRLMR1);
55
56#if defined (CONFIG_HD64465) && defined (CONFIG_SERIAL)
57 /* remap IO ports for first ISA serial port to HD64465 UART */
58 bigsur_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
59#endif /* CONFIG_HD64465 && CONFIG_SERIAL */
60 /* TODO: setup IDE registers */
61 bigsur_port_map(BIGSUR_IDECTL_IOPORT, 2, BIGSUR_ICTL, 8);
62 /* Setup the Ethernet port to BIGSUR_ETHER_IOPORT */
63 bigsur_port_map(BIGSUR_ETHER_IOPORT, 16, BIGSUR_ETHR+BIGSUR_ETHER_IOPORT, 0);
64 /* set page to 1 */
65 outw(1, BIGSUR_ETHR+0xe);
66 /* set the IO port to BIGSUR_ETHER_IOPORT */
67 outw(BIGSUR_ETHER_IOPORT<<3, BIGSUR_ETHR+0x2);
68}
69
70/*
71 * The Machine Vector
72 */
73extern void heartbeat_bigsur(void);
74extern void init_bigsur_IRQ(void);
75
76struct sh_machine_vector mv_bigsur __initmv = {
77 .mv_name = "Big Sur",
78 .mv_setup = bigsur_setup,
79
80 .mv_isa_port2addr = bigsur_isa_port2addr,
81 .mv_irq_demux = bigsur_irq_demux,
82
83 .mv_init_irq = init_bigsur_IRQ,
84#ifdef CONFIG_HEARTBEAT
85 .mv_heartbeat = heartbeat_bigsur,
86#endif
87};
88ALIAS_MV(bigsur)
diff --git a/arch/sh/boards/ec3104/Makefile b/arch/sh/boards/ec3104/Makefile
deleted file mode 100644
index 178891534b67..000000000000
--- a/arch/sh/boards/ec3104/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for the EC3104 specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
6
diff --git a/arch/sh/boards/ec3104/io.c b/arch/sh/boards/ec3104/io.c
deleted file mode 100644
index 2f86394b280b..000000000000
--- a/arch/sh/boards/ec3104/io.c
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * linux/arch/sh/boards/ec3104/io.c
3 * EC3104 companion chip support
4 *
5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
6 *
7 */
8/* EC3104 note:
9 * This code was written without any documentation about the EC3104 chip. While
10 * I hope I got most of the basic functionality right, the register names I use
11 * are most likely completely different from those in the chip documentation.
12 *
13 * If you have any further information about the EC3104, please tell me
14 * (prumpf@tux.org).
15 */
16
17#include <linux/kernel.h>
18#include <linux/types.h>
19#include <asm/io.h>
20#include <asm/page.h>
21#include <asm/ec3104/ec3104.h>
22
23/*
24 * EC3104 has a real ISA bus which we redirect low port accesses to (the
25 * actual device on mine is a ESS 1868, and I don't want to hack the driver
26 * more than strictly necessary). I am not going to duplicate the
27 * hard coding of PC addresses (for the 16550s aso) here though; it's just
28 * too ugly.
29 */
30
31#define low_port(port) ((port) < 0x10000)
32
33static inline unsigned long port2addr(unsigned long port)
34{
35 switch(port >> 16) {
36 case 0:
37 return EC3104_ISA_BASE + port * 2;
38
39 /* XXX hack. it's unclear what to do about the serial ports */
40 case 1:
41 return EC3104_BASE + (port&0xffff) * 4;
42
43 default:
44 /* XXX PCMCIA */
45 return 0;
46 }
47}
48
49unsigned char ec3104_inb(unsigned long port)
50{
51 u8 ret;
52
53 ret = *(volatile u8 *)port2addr(port);
54
55 return ret;
56}
57
58unsigned short ec3104_inw(unsigned long port)
59{
60 BUG();
61}
62
63unsigned long ec3104_inl(unsigned long port)
64{
65 BUG();
66}
67
68void ec3104_outb(unsigned char data, unsigned long port)
69{
70 *(volatile u8 *)port2addr(port) = data;
71}
72
73void ec3104_outw(unsigned short data, unsigned long port)
74{
75 BUG();
76}
77
78void ec3104_outl(unsigned long data, unsigned long port)
79{
80 BUG();
81}
diff --git a/arch/sh/boards/ec3104/irq.c b/arch/sh/boards/ec3104/irq.c
deleted file mode 100644
index ffa4ff1f090f..000000000000
--- a/arch/sh/boards/ec3104/irq.c
+++ /dev/null
@@ -1,196 +0,0 @@
1/*
2 * linux/arch/sh/boards/ec3104/irq.c
3 * EC3104 companion chip support
4 *
5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
6 *
7 */
8
9#include <asm/io.h>
10#include <asm/irq.h>
11#include <asm/ec3104/ec3104.h>
12
13/* This is for debugging mostly; here's the table that I intend to keep
14 * in here:
15 *
16 * index function base addr power interrupt bit
17 * 0 power b0ec0000 --- 00000001 (unused)
18 * 1 irqs b0ec1000 --- 00000002 (unused)
19 * 2 ?? b0ec2000 b0ec0008 00000004
20 * 3 PS2 (1) b0ec3000 b0ec000c 00000008
21 * 4 PS2 (2) b0ec4000 b0ec0010 00000010
22 * 5 ?? b0ec5000 b0ec0014 00000020
23 * 6 I2C b0ec6000 b0ec0018 00000040
24 * 7 serial (1) b0ec7000 b0ec001c 00000080
25 * 8 serial (2) b0ec8000 b0ec0020 00000100
26 * 9 serial (3) b0ec9000 b0ec0024 00000200
27 * 10 serial (4) b0eca000 b0ec0028 00000400
28 * 12 GPIO (1) b0ecc000 b0ec0030
29 * 13 GPIO (2) b0ecc000 b0ec0030
30 * 16 pcmcia (1) b0ed0000 b0ec0040 00010000
31 * 17 pcmcia (2) b0ed1000 b0ec0044 00020000
32 */
33
34/* I used the register names from another interrupt controller I worked with,
35 * since it seems to be identical to the ec3104 except that all bits are
36 * inverted:
37 *
38 * IRR: Interrupt Request Register (pending and enabled interrupts)
39 * IMR: Interrupt Mask Register (which interrupts are enabled)
40 * IPR: Interrupt Pending Register (pending interrupts, even disabled ones)
41 *
42 * 0 bits mean pending or enabled, 1 bits mean not pending or disabled. all
43 * IRQs seem to be level-triggered.
44 */
45
46#define EC3104_IRR (EC3104_BASE + 0x1000)
47#define EC3104_IMR (EC3104_BASE + 0x1004)
48#define EC3104_IPR (EC3104_BASE + 0x1008)
49
50#define ctrl_readl(addr) (*(volatile u32 *)(addr))
51#define ctrl_writel(data,addr) (*(volatile u32 *)(addr) = (data))
52#define ctrl_readb(addr) (*(volatile u8 *)(addr))
53
54static char *ec3104_name(unsigned index)
55{
56 switch(index) {
57 case 0:
58 return "power management";
59 case 1:
60 return "interrupts";
61 case 3:
62 return "PS2 (1)";
63 case 4:
64 return "PS2 (2)";
65 case 5:
66 return "I2C (1)";
67 case 6:
68 return "I2C (2)";
69 case 7:
70 return "serial (1)";
71 case 8:
72 return "serial (2)";
73 case 9:
74 return "serial (3)";
75 case 10:
76 return "serial (4)";
77 case 16:
78 return "pcmcia (1)";
79 case 17:
80 return "pcmcia (2)";
81 default: {
82 static char buf[32];
83
84 sprintf(buf, "unknown (%d)", index);
85
86 return buf;
87 }
88 }
89}
90
91int get_pending_interrupts(char *buf)
92{
93 u32 ipr;
94 u32 bit;
95 char *p = buf;
96
97 p += sprintf(p, "pending: (");
98
99 ipr = ctrl_inl(EC3104_IPR);
100
101 for (bit = 1; bit < 32; bit++)
102 if (!(ipr & (1<<bit)))
103 p += sprintf(p, "%s ", ec3104_name(bit));
104
105 p += sprintf(p, ")\n");
106
107 return p - buf;
108}
109
110static inline u32 ec3104_irq2mask(unsigned int irq)
111{
112 return (1 << (irq - EC3104_IRQBASE));
113}
114
115static inline void mask_ec3104_irq(unsigned int irq)
116{
117 u32 mask;
118
119 mask = ctrl_readl(EC3104_IMR);
120
121 mask |= ec3104_irq2mask(irq);
122
123 ctrl_writel(mask, EC3104_IMR);
124}
125
126static inline void unmask_ec3104_irq(unsigned int irq)
127{
128 u32 mask;
129
130 mask = ctrl_readl(EC3104_IMR);
131
132 mask &= ~ec3104_irq2mask(irq);
133
134 ctrl_writel(mask, EC3104_IMR);
135}
136
137static void disable_ec3104_irq(unsigned int irq)
138{
139 mask_ec3104_irq(irq);
140}
141
142static void enable_ec3104_irq(unsigned int irq)
143{
144 unmask_ec3104_irq(irq);
145}
146
147static void mask_and_ack_ec3104_irq(unsigned int irq)
148{
149 mask_ec3104_irq(irq);
150}
151
152static void end_ec3104_irq(unsigned int irq)
153{
154 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
155 unmask_ec3104_irq(irq);
156}
157
158static unsigned int startup_ec3104_irq(unsigned int irq)
159{
160 unmask_ec3104_irq(irq);
161
162 return 0;
163}
164
165static void shutdown_ec3104_irq(unsigned int irq)
166{
167 mask_ec3104_irq(irq);
168
169}
170
171static struct hw_interrupt_type ec3104_int = {
172 .typename = "EC3104",
173 .enable = enable_ec3104_irq,
174 .disable = disable_ec3104_irq,
175 .ack = mask_and_ack_ec3104_irq,
176 .end = end_ec3104_irq,
177 .startup = startup_ec3104_irq,
178 .shutdown = shutdown_ec3104_irq,
179};
180
181/* Yuck. the _demux API is ugly */
182int ec3104_irq_demux(int irq)
183{
184 if (irq == EC3104_IRQ) {
185 unsigned int mask;
186
187 mask = ctrl_readl(EC3104_IRR);
188
189 if (mask == 0xffffffff)
190 return EC3104_IRQ;
191 else
192 return EC3104_IRQBASE + ffz(mask);
193 }
194
195 return irq;
196}
diff --git a/arch/sh/boards/ec3104/setup.c b/arch/sh/boards/ec3104/setup.c
deleted file mode 100644
index 902bc975a13e..000000000000
--- a/arch/sh/boards/ec3104/setup.c
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 * linux/arch/sh/boards/ec3104/setup.c
3 * EC3104 companion chip support
4 *
5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
6 *
7 */
8/* EC3104 note:
9 * This code was written without any documentation about the EC3104 chip. While
10 * I hope I got most of the basic functionality right, the register names I use
11 * are most likely completely different from those in the chip documentation.
12 *
13 * If you have any further information about the EC3104, please tell me
14 * (prumpf@tux.org).
15 */
16
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/param.h>
20#include <linux/interrupt.h>
21#include <linux/init.h>
22#include <linux/irq.h>
23#include <linux/types.h>
24#include <asm/io.h>
25#include <asm/irq.h>
26#include <asm/machvec.h>
27#include <asm/mach/ec3104.h>
28
29static void __init ec3104_setup(char **cmdline_p)
30{
31 char str[8];
32 int i;
33
34 for (i=0; i<8; i++)
35 str[i] = ctrl_readb(EC3104_BASE + i);
36
37 for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++)
38 irq_desc[i].handler = &ec3104_int;
39
40 printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n",
41 str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE);
42
43 /* mask all interrupts. this should have been done by the boot
44 * loader for us but we want to be sure ... */
45 ctrl_writel(0xffffffff, EC3104_IMR);
46}
47
48/*
49 * The Machine Vector
50 */
51struct sh_machine_vector mv_ec3104 __initmv = {
52 .mv_name = "EC3104",
53 .mv_setup = ec3104_setup,
54 .mv_nr_irqs = 96,
55
56 .mv_inb = ec3104_inb,
57 .mv_inw = ec3104_inw,
58 .mv_inl = ec3104_inl,
59 .mv_outb = ec3104_outb,
60 .mv_outw = ec3104_outw,
61 .mv_outl = ec3104_outl,
62
63 .mv_irq_demux = ec3104_irq_demux,
64};
65ALIAS_MV(ec3104)
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index 9e00cb8a39e9..cc8d0d0b1427 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o
12obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ 12obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \
13 dma-dreamcast.o 13 dma-dreamcast.o
14obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o 14obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o
15obj-$(CONFIG_SH_BIGSUR) += ops-bigsur.o
16obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o 15obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o
17obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o 16obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
18obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o 17obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o
diff --git a/arch/sh/drivers/pci/ops-bigsur.c b/arch/sh/drivers/pci/ops-bigsur.c
deleted file mode 100644
index eb31be751524..000000000000
--- a/arch/sh/drivers/pci/ops-bigsur.c
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * linux/arch/sh/drivers/pci/ops-bigsur.c
3 *
4 * By Dustin McIntire (dustin@sensoria.com) (c)2001
5 *
6 * Ported to new API by Paul Mundt <lethal@linux-sh.org>.
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * PCI initialization for the Hitachi Big Sur Evaluation Board
12 */
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/pci.h>
17#include <asm/io.h>
18#include "pci-sh4.h"
19#include <asm/bigsur/bigsur.h>
20
21#define BIGSUR_PCI_IO 0x4000
22#define BIGSUR_PCI_MEM 0xfd000000
23
24static struct resource sh7751_io_resource = {
25 .name = "SH7751 IO",
26 .start = BIGSUR_PCI_IO,
27 .end = BIGSUR_PCI_IO + (64*1024) - 1,
28 .flags = IORESOURCE_IO,
29};
30
31static struct resource sh7751_mem_resource = {
32 .name = "SH7751 mem",
33 .start = BIGSUR_PCI_MEM,
34 .end = BIGSUR_PCI_MEM + (64*1024*1024) - 1,
35 .flags = IORESOURCE_MEM,
36};
37
38extern struct pci_ops sh7751_pci_ops;
39
40struct pci_channel board_pci_channels[] = {
41 { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
42 { 0, }
43};
44
45static struct sh4_pci_address_map sh7751_pci_map = {
46 .window0 = {
47 .base = SH7751_CS3_BASE_ADDR,
48 .size = BIGSUR_LSR0_SIZE,
49 },
50
51 .window1 = {
52 .base = SH7751_CS3_BASE_ADDR,
53 .size = BIGSUR_LSR1_SIZE,
54 },
55};
56
57/*
58 * Initialize the Big Sur PCI interface
59 * Setup hardware to be Central Funtion
60 * Copy the BSR regs to the PCI interface
61 * Setup PCI windows into local RAM
62 */
63int __init pcibios_init_platform(void)
64{
65 return sh7751_pcic_init(&sh7751_pci_map);
66}
67
68int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
69{
70 /*
71 * The Big Sur can be used in a CPCI chassis, but the SH7751 PCI
72 * interface is on the wrong end of the board so that it can also
73 * support a V320 CPI interface chip... Therefor the IRQ mapping is
74 * somewhat use dependent... I'l assume a linear map for now, i.e.
75 * INTA=slot0,pin0... INTD=slot3,pin0...
76 */
77 int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE;
78
79 PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n",
80 slot, pin-1+'A', irq);
81
82 return irq;
83}
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index 85e1ee2e2e7b..9ddff760d3c6 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -157,15 +157,6 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
157 PCIBIOS_MIN_IO, (64 << 10), 157 PCIBIOS_MIN_IO, (64 << 10),
158 SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO); 158 SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO);
159 159
160 /*
161 * XXX: For now, leave this board-specific. In the event we have other
162 * boards that need to do similar work, this can be wrapped.
163 */
164#ifdef CONFIG_SH_BIGSUR
165 bigsur_port_map(PCIBIOS_MIN_IO, (64 << 10),
166 SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO, 0);
167#endif
168
169 /* Make sure the MSB's of IO window are set to access PCI space 160 /* Make sure the MSB's of IO window are set to access PCI space
170 * correctly */ 161 * correctly */
171 word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK; 162 word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK;
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 0571755e9a84..4fe0f94cbf42 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -16,7 +16,6 @@ HD64461 HD64461
16HD64465 HD64465 16HD64465 HD64465
17SATURN SH_SATURN 17SATURN SH_SATURN
18DREAMCAST SH_DREAMCAST 18DREAMCAST SH_DREAMCAST
19BIGSUR SH_BIGSUR
20MPC1211 SH_MPC1211 19MPC1211 SH_MPC1211
21SNAPGEAR SH_SECUREEDGE5410 20SNAPGEAR SH_SECUREEDGE5410
22HS7751RVOIP SH_HS7751RVOIP 21HS7751RVOIP SH_HS7751RVOIP
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-25 09:54:29 -0500