diff options
Diffstat (limited to 'arch/sh')
-rw-r--r-- | arch/sh/drivers/pci/fixups-lboxre2.c | 4 | ||||
-rw-r--r-- | arch/sh/drivers/pci/fixups-rts7751r2d.c | 4 | ||||
-rw-r--r-- | arch/sh/drivers/pci/ops-dreamcast.c | 44 | ||||
-rw-r--r-- | arch/sh/drivers/pci/pci-sh4.h | 4 | ||||
-rw-r--r-- | arch/sh/drivers/pci/pci-sh7751.c | 16 | ||||
-rw-r--r-- | arch/sh/drivers/pci/pci-sh7780.c | 2 |
6 files changed, 37 insertions, 37 deletions
diff --git a/arch/sh/drivers/pci/fixups-lboxre2.c b/arch/sh/drivers/pci/fixups-lboxre2.c index 40b19bdfb891..1c1d41255ec0 100644 --- a/arch/sh/drivers/pci/fixups-lboxre2.c +++ b/arch/sh/drivers/pci/fixups-lboxre2.c | |||
@@ -18,7 +18,7 @@ int pci_fixup_pcic(void) | |||
18 | { | 18 | { |
19 | unsigned long bcr1, mcr; | 19 | unsigned long bcr1, mcr; |
20 | 20 | ||
21 | bcr1 = inl(SH7751_BCR1); | 21 | bcr1 = ctrl_inl(SH7751_BCR1); |
22 | bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ | 22 | bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ |
23 | pci_write_reg(bcr1, SH4_PCIBCR1); | 23 | pci_write_reg(bcr1, SH4_PCIBCR1); |
24 | 24 | ||
@@ -28,7 +28,7 @@ int pci_fixup_pcic(void) | |||
28 | pci_write_reg(0xfb900047, SH7751_PCICONF1); | 28 | pci_write_reg(0xfb900047, SH7751_PCICONF1); |
29 | pci_write_reg(0xab000001, SH7751_PCICONF4); | 29 | pci_write_reg(0xab000001, SH7751_PCICONF4); |
30 | 30 | ||
31 | mcr = inl(SH7751_MCR); | 31 | mcr = ctrl_inl(SH7751_MCR); |
32 | mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; | 32 | mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; |
33 | pci_write_reg(mcr, SH4_PCIMCR); | 33 | pci_write_reg(mcr, SH4_PCIMCR); |
34 | 34 | ||
diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c index e72ceb560d5b..904bce8768d3 100644 --- a/arch/sh/drivers/pci/fixups-rts7751r2d.c +++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c | |||
@@ -19,7 +19,7 @@ int pci_fixup_pcic(void) | |||
19 | { | 19 | { |
20 | unsigned long bcr1, mcr; | 20 | unsigned long bcr1, mcr; |
21 | 21 | ||
22 | bcr1 = inl(SH7751_BCR1); | 22 | bcr1 = ctrl_inl(SH7751_BCR1); |
23 | bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ | 23 | bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ |
24 | pci_write_reg(bcr1, SH4_PCIBCR1); | 24 | pci_write_reg(bcr1, SH4_PCIBCR1); |
25 | 25 | ||
@@ -30,7 +30,7 @@ int pci_fixup_pcic(void) | |||
30 | pci_write_reg(0xfb900047, SH7751_PCICONF1); | 30 | pci_write_reg(0xfb900047, SH7751_PCICONF1); |
31 | pci_write_reg(0xab000001, SH7751_PCICONF4); | 31 | pci_write_reg(0xab000001, SH7751_PCICONF4); |
32 | 32 | ||
33 | mcr = inl(SH7751_MCR); | 33 | mcr = ctrl_inl(SH7751_MCR); |
34 | mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; | 34 | mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; |
35 | pci_write_reg(mcr, SH4_PCIMCR); | 35 | pci_write_reg(mcr, SH4_PCIMCR); |
36 | 36 | ||
diff --git a/arch/sh/drivers/pci/ops-dreamcast.c b/arch/sh/drivers/pci/ops-dreamcast.c index e1284fc69361..0dac87b19624 100644 --- a/arch/sh/drivers/pci/ops-dreamcast.c +++ b/arch/sh/drivers/pci/ops-dreamcast.c | |||
@@ -83,9 +83,9 @@ static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int | |||
83 | return PCIBIOS_DEVICE_NOT_FOUND; | 83 | return PCIBIOS_DEVICE_NOT_FOUND; |
84 | 84 | ||
85 | switch (size) { | 85 | switch (size) { |
86 | case 1: *val = inb(GAPSPCI_BBA_CONFIG+where); break; | 86 | case 1: *val = ctrl_inb(GAPSPCI_BBA_CONFIG+where); break; |
87 | case 2: *val = inw(GAPSPCI_BBA_CONFIG+where); break; | 87 | case 2: *val = ctrl_inw(GAPSPCI_BBA_CONFIG+where); break; |
88 | case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break; | 88 | case 4: *val = ctrl_inl(GAPSPCI_BBA_CONFIG+where); break; |
89 | } | 89 | } |
90 | 90 | ||
91 | return PCIBIOS_SUCCESSFUL; | 91 | return PCIBIOS_SUCCESSFUL; |
@@ -97,9 +97,9 @@ static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int | |||
97 | return PCIBIOS_DEVICE_NOT_FOUND; | 97 | return PCIBIOS_DEVICE_NOT_FOUND; |
98 | 98 | ||
99 | switch (size) { | 99 | switch (size) { |
100 | case 1: outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break; | 100 | case 1: ctrl_outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break; |
101 | case 2: outw((u16)val, GAPSPCI_BBA_CONFIG+where); break; | 101 | case 2: ctrl_outw((u16)val, GAPSPCI_BBA_CONFIG+where); break; |
102 | case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break; | 102 | case 4: ctrl_outl((u32)val, GAPSPCI_BBA_CONFIG+where); break; |
103 | } | 103 | } |
104 | 104 | ||
105 | return PCIBIOS_SUCCESSFUL; | 105 | return PCIBIOS_SUCCESSFUL; |
@@ -127,36 +127,36 @@ int __init gapspci_init(void) | |||
127 | */ | 127 | */ |
128 | 128 | ||
129 | for (i=0; i<16; i++) | 129 | for (i=0; i<16; i++) |
130 | idbuf[i] = inb(GAPSPCI_REGS+i); | 130 | idbuf[i] = ctrl_inb(GAPSPCI_REGS+i); |
131 | 131 | ||
132 | if (strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16)) | 132 | if (strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16)) |
133 | return -ENODEV; | 133 | return -ENODEV; |
134 | 134 | ||
135 | outl(0x5a14a501, GAPSPCI_REGS+0x18); | 135 | ctrl_outl(0x5a14a501, GAPSPCI_REGS+0x18); |
136 | 136 | ||
137 | for (i=0; i<1000000; i++) | 137 | for (i=0; i<1000000; i++) |
138 | ; | 138 | ; |
139 | 139 | ||
140 | if (inl(GAPSPCI_REGS+0x18) != 1) | 140 | if (ctrl_inl(GAPSPCI_REGS+0x18) != 1) |
141 | return -EINVAL; | 141 | return -EINVAL; |
142 | 142 | ||
143 | outl(0x01000000, GAPSPCI_REGS+0x20); | 143 | ctrl_outl(0x01000000, GAPSPCI_REGS+0x20); |
144 | outl(0x01000000, GAPSPCI_REGS+0x24); | 144 | ctrl_outl(0x01000000, GAPSPCI_REGS+0x24); |
145 | 145 | ||
146 | outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28); | 146 | ctrl_outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28); |
147 | outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c); | 147 | ctrl_outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c); |
148 | 148 | ||
149 | outl(1, GAPSPCI_REGS+0x14); | 149 | ctrl_outl(1, GAPSPCI_REGS+0x14); |
150 | outl(1, GAPSPCI_REGS+0x34); | 150 | ctrl_outl(1, GAPSPCI_REGS+0x34); |
151 | 151 | ||
152 | /* Setting Broadband Adapter */ | 152 | /* Setting Broadband Adapter */ |
153 | outw(0xf900, GAPSPCI_BBA_CONFIG+0x06); | 153 | ctrl_outw(0xf900, GAPSPCI_BBA_CONFIG+0x06); |
154 | outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30); | 154 | ctrl_outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30); |
155 | outb(0x00, GAPSPCI_BBA_CONFIG+0x3c); | 155 | ctrl_outb(0x00, GAPSPCI_BBA_CONFIG+0x3c); |
156 | outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d); | 156 | ctrl_outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d); |
157 | outw(0x0006, GAPSPCI_BBA_CONFIG+0x04); | 157 | ctrl_outw(0x0006, GAPSPCI_BBA_CONFIG+0x04); |
158 | outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10); | 158 | ctrl_outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10); |
159 | outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14); | 159 | ctrl_outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14); |
160 | 160 | ||
161 | return 0; | 161 | return 0; |
162 | } | 162 | } |
diff --git a/arch/sh/drivers/pci/pci-sh4.h b/arch/sh/drivers/pci/pci-sh4.h index 4925c79ea959..07e29506080f 100644 --- a/arch/sh/drivers/pci/pci-sh4.h +++ b/arch/sh/drivers/pci/pci-sh4.h | |||
@@ -172,11 +172,11 @@ struct sh4_pci_address_map { | |||
172 | 172 | ||
173 | static inline void pci_write_reg(unsigned long val, unsigned long reg) | 173 | static inline void pci_write_reg(unsigned long val, unsigned long reg) |
174 | { | 174 | { |
175 | outl(val, PCI_REG(reg)); | 175 | ctrl_outl(val, PCI_REG(reg)); |
176 | } | 176 | } |
177 | 177 | ||
178 | static inline unsigned long pci_read_reg(unsigned long reg) | 178 | static inline unsigned long pci_read_reg(unsigned long reg) |
179 | { | 179 | { |
180 | return inl(PCI_REG(reg)); | 180 | return ctrl_inl(PCI_REG(reg)); |
181 | } | 181 | } |
182 | #endif /* __PCI_SH4_H */ | 182 | #endif /* __PCI_SH4_H */ |
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c index 1aca7fe5783b..3065eb184f01 100644 --- a/arch/sh/drivers/pci/pci-sh7751.c +++ b/arch/sh/drivers/pci/pci-sh7751.c | |||
@@ -58,7 +58,7 @@ static int __init __area_sdram_check(unsigned int area) | |||
58 | { | 58 | { |
59 | u32 word; | 59 | u32 word; |
60 | 60 | ||
61 | word = inl(SH7751_BCR1); | 61 | word = ctrl_inl(SH7751_BCR1); |
62 | /* check BCR for SDRAM in area */ | 62 | /* check BCR for SDRAM in area */ |
63 | if (((word >> area) & 1) == 0) { | 63 | if (((word >> area) & 1) == 0) { |
64 | printk("PCI: Area %d is not configured for SDRAM. BCR1=0x%x\n", | 64 | printk("PCI: Area %d is not configured for SDRAM. BCR1=0x%x\n", |
@@ -67,7 +67,7 @@ static int __init __area_sdram_check(unsigned int area) | |||
67 | } | 67 | } |
68 | pci_write_reg(word, SH4_PCIBCR1); | 68 | pci_write_reg(word, SH4_PCIBCR1); |
69 | 69 | ||
70 | word = (u16)inw(SH7751_BCR2); | 70 | word = (u16)ctrl_inw(SH7751_BCR2); |
71 | /* check BCR2 for 32bit SDRAM interface*/ | 71 | /* check BCR2 for 32bit SDRAM interface*/ |
72 | if (((word >> (area << 1)) & 0x3) != 0x3) { | 72 | if (((word >> (area << 1)) & 0x3) != 0x3) { |
73 | printk("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%x\n", | 73 | printk("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%x\n", |
@@ -85,9 +85,9 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map) | |||
85 | u32 word; | 85 | u32 word; |
86 | 86 | ||
87 | /* Set the BCR's to enable PCI access */ | 87 | /* Set the BCR's to enable PCI access */ |
88 | reg = inl(SH7751_BCR1); | 88 | reg = ctrl_inl(SH7751_BCR1); |
89 | reg |= 0x80000; | 89 | reg |= 0x80000; |
90 | outl(reg, SH7751_BCR1); | 90 | ctrl_outl(reg, SH7751_BCR1); |
91 | 91 | ||
92 | /* Turn the clocks back on (not done in reset)*/ | 92 | /* Turn the clocks back on (not done in reset)*/ |
93 | pci_write_reg(0, SH4_PCICLKR); | 93 | pci_write_reg(0, SH4_PCICLKR); |
@@ -179,13 +179,13 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map) | |||
179 | return 0; | 179 | return 0; |
180 | 180 | ||
181 | /* configure the wait control registers */ | 181 | /* configure the wait control registers */ |
182 | word = inl(SH7751_WCR1); | 182 | word = ctrl_inl(SH7751_WCR1); |
183 | pci_write_reg(word, SH4_PCIWCR1); | 183 | pci_write_reg(word, SH4_PCIWCR1); |
184 | word = inl(SH7751_WCR2); | 184 | word = ctrl_inl(SH7751_WCR2); |
185 | pci_write_reg(word, SH4_PCIWCR2); | 185 | pci_write_reg(word, SH4_PCIWCR2); |
186 | word = inl(SH7751_WCR3); | 186 | word = ctrl_inl(SH7751_WCR3); |
187 | pci_write_reg(word, SH4_PCIWCR3); | 187 | pci_write_reg(word, SH4_PCIWCR3); |
188 | word = inl(SH7751_MCR); | 188 | word = ctrl_inl(SH7751_MCR); |
189 | pci_write_reg(word, SH4_PCIMCR); | 189 | pci_write_reg(word, SH4_PCIMCR); |
190 | 190 | ||
191 | /* NOTE: I'm ignoring the PCI error IRQs for now.. | 191 | /* NOTE: I'm ignoring the PCI error IRQs for now.. |
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c index 7d797f4de5e7..b2a2bfa3c1bd 100644 --- a/arch/sh/drivers/pci/pci-sh7780.c +++ b/arch/sh/drivers/pci/pci-sh7780.c | |||
@@ -52,7 +52,7 @@ static int __init sh7780_pci_init(void) | |||
52 | 52 | ||
53 | pr_debug("PCI: Starting intialization.\n"); | 53 | pr_debug("PCI: Starting intialization.\n"); |
54 | 54 | ||
55 | outl(0x00000001, SH7780_PCI_VCR2); /* Enable PCIC */ | 55 | ctrl_outl(0x00000001, SH7780_PCI_VCR2); /* Enable PCIC */ |
56 | 56 | ||
57 | /* check for SH7780/SH7780R hardware */ | 57 | /* check for SH7780/SH7780R hardware */ |
58 | id = pci_read_reg(SH7780_PCIVID); | 58 | id = pci_read_reg(SH7780_PCIVID); |