11 files changed, 268 insertions, 33 deletions

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 1eef24d04bbf..573fca1fbd9b 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -189,6 +189,9 @@ config DMA_NONCOHERENT
 config NEED_DMA_MAP_STATE
         def_bool DMA_NONCOHERENT
 
+config NEED_SG_DMA_LENGTH
+        def_bool y
+
 source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
@@ -776,6 +779,17 @@ config ENTRY_OFFSET
         default "0x00010000" if PAGE_SIZE_64KB
         default "0x00000000"
 
+config ROMIMAGE_MMCIF
+        bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
+        depends on CPU_SUBTYPE_SH7724 && EXPERIMENTAL
+        help
+          Say Y here to include experimental MMCIF loading code in
+          romImage. With this enabled it is possible to write the romImage
+          kernel image to an MMC card and boot the kernel straight from
+          the reset vector. At reset the processor Mask ROM will load the
+          first part of the romImage which in turn loads the rest the kernel
+          image to RAM using the MMCIF hardware block.
+
 choice
         prompt "Kernel command line"
         optional
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 49714258732e..778eb7cb9873 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -12,6 +12,8 @@
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/mfd/sh_mobile_sdhi.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sh_mmcif.h>
 #include <linux/mtd/physmap.h>
 #include <linux/gpio.h>
 #include <linux/interrupt.h>
@@ -26,7 +28,6 @@
 #include <linux/mmc/host.h>
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
-#include <linux/mfd/sh_mobile_sdhi.h>
 #include <video/sh_mobile_lcdc.h>
 #include <sound/sh_fsi.h>
 #include <media/sh_mobile_ceu.h>
@@ -436,7 +437,7 @@ static struct i2c_board_info ts_i2c_clients = {
 };
 
 #ifdef CONFIG_MFD_SH_MOBILE_SDHI
-/* SHDI0 */
+/* SDHI0 */
 static void sdhi0_set_pwr(struct platform_device *pdev, int state)
 {
         gpio_set_value(GPIO_PTB6, state);
@@ -474,7 +475,8 @@ static struct platform_device sdhi0_device = {
         },
 };
 
-/* SHDI1 */
+#if !defined(CONFIG_MMC_SH_MMCIF)
+/* SDHI1 */
 static void sdhi1_set_pwr(struct platform_device *pdev, int state)
 {
         gpio_set_value(GPIO_PTB7, state);
@@ -511,6 +513,7 @@ static struct platform_device sdhi1_device = {
                 .hwblk_id = HWBLK_SDHI1,
         },
 };
+#endif /* CONFIG_MMC_SH_MMCIF */
 
 #else
 
@@ -819,6 +822,58 @@ static struct platform_device vou_device = {
         },
 };
 
+#if defined(CONFIG_MMC_SH_MMCIF)
+/* SH_MMCIF */
+static void mmcif_set_pwr(struct platform_device *pdev, int state)
+{
+        gpio_set_value(GPIO_PTB7, state);
+}
+
+static void mmcif_down_pwr(struct platform_device *pdev)
+{
+        gpio_set_value(GPIO_PTB7, 0);
+}
+
+static struct resource sh_mmcif_resources[] = {
+        [0] = {
+                .name   = "SH_MMCIF",
+                .start  = 0xA4CA0000,
+                .end    = 0xA4CA00FF,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* MMC2I */
+                .start  = 29,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* MMC3I */
+                .start  = 30,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct sh_mmcif_plat_data sh_mmcif_plat = {
+        .set_pwr        = mmcif_set_pwr,
+        .down_pwr       = mmcif_down_pwr,
+        .sup_pclk       = 0, /* SH7724: Max Pclk/2 */
+        .caps           = MMC_CAP_4_BIT_DATA |
+                          MMC_CAP_8_BIT_DATA |
+                          MMC_CAP_NEEDS_POLL,
+        .ocr            = MMC_VDD_32_33 | MMC_VDD_33_34,
+};
+
+static struct platform_device sh_mmcif_device = {
+        .name           = "sh_mmcif",
+        .id             = 0,
+        .dev            = {
+                .platform_data          = &sh_mmcif_plat,
+        },
+        .num_resources  = ARRAY_SIZE(sh_mmcif_resources),
+        .resource       = sh_mmcif_resources,
+};
+#endif
+
 static struct platform_device *ecovec_devices[] __initdata = {
         &heartbeat_device,
         &nor_flash_device,
@@ -831,7 +886,9 @@ static struct platform_device *ecovec_devices[] __initdata = {
         &keysc_device,
 #ifdef CONFIG_MFD_SH_MOBILE_SDHI
         &sdhi0_device,
+#if !defined(CONFIG_MMC_SH_MMCIF)
         &sdhi1_device,
+#endif
 #else
         &msiof0_device,
 #endif
@@ -841,6 +898,9 @@ static struct platform_device *ecovec_devices[] __initdata = {
         &fsi_device,
         &irda_device,
         &vou_device,
+#if defined(CONFIG_MMC_SH_MMCIF)
+        &sh_mmcif_device,
+#endif
 };
 
 #ifdef CONFIG_I2C
@@ -1134,6 +1194,7 @@ static int __init arch_setup(void)
         gpio_request(GPIO_PTB6, NULL);
         gpio_direction_output(GPIO_PTB6, 0);
 
+#if !defined(CONFIG_MMC_SH_MMCIF)
         /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
         gpio_request(GPIO_FN_SDHI1CD,  NULL);
         gpio_request(GPIO_FN_SDHI1WP,  NULL);
@@ -1148,6 +1209,7 @@ static int __init arch_setup(void)
 
         /* I/O buffer drive ability is high for SDHI1 */
         __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
+#endif /* CONFIG_MMC_SH_MMCIF */
 #else
         /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
         gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
@@ -1223,6 +1285,25 @@ static int __init arch_setup(void)
         gpio_request(GPIO_PTU5, NULL);
         gpio_direction_output(GPIO_PTU5, 0);
 
+#if defined(CONFIG_MMC_SH_MMCIF)
+        /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
+        gpio_request(GPIO_FN_MMC_D7, NULL);
+        gpio_request(GPIO_FN_MMC_D6, NULL);
+        gpio_request(GPIO_FN_MMC_D5, NULL);
+        gpio_request(GPIO_FN_MMC_D4, NULL);
+        gpio_request(GPIO_FN_MMC_D3, NULL);
+        gpio_request(GPIO_FN_MMC_D2, NULL);
+        gpio_request(GPIO_FN_MMC_D1, NULL);
+        gpio_request(GPIO_FN_MMC_D0, NULL);
+        gpio_request(GPIO_FN_MMC_CLK, NULL);
+        gpio_request(GPIO_FN_MMC_CMD, NULL);
+        gpio_request(GPIO_PTB7, NULL);
+        gpio_direction_output(GPIO_PTB7, 0);
+
+        /* I/O buffer drive ability is high for MMCIF */
+        __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
+#endif
+
         /* enable I2C device */
         i2c_register_board_info(0, i2c0_devices,
                                 ARRAY_SIZE(i2c0_devices));
diff --git a/arch/sh/boot/romimage/Makefile b/arch/sh/boot/romimage/Makefile
index f473a24a2d92..2216ee57f251 100644
--- a/arch/sh/boot/romimage/Makefile
+++ b/arch/sh/boot/romimage/Makefile
@@ -1,16 +1,21 @@
 #
 # linux/arch/sh/boot/romimage/Makefile
 #
-# create an image suitable for burning to flash from zImage
+# create an romImage file suitable for burning to flash/mmc from zImage
 #
 
 targets         := vmlinux head.o zeropage.bin piggy.o
+load-y          := 0
 
-OBJECTS = $(obj)/head.o
-LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart \
+mmcif-load-$(CONFIG_CPU_SUBTYPE_SH7724) := 0xe5200000 # ILRAM
+mmcif-obj-$(CONFIG_CPU_SUBTYPE_SH7724)  := $(obj)/mmcif-sh7724.o
+load-$(CONFIG_ROMIMAGE_MMCIF)           := $(mmcif-load-y)
+obj-$(CONFIG_ROMIMAGE_MMCIF)            := $(mmcif-obj-y)
+
+LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext $(load-y) -e romstart \
                    -T $(obj)/../../kernel/vmlinux.lds
 
-$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE
+$(obj)/vmlinux: $(obj)/head.o $(obj-y) $(obj)/piggy.o FORCE
         $(call if_changed,ld)
         @:
 
diff --git a/arch/sh/boot/romimage/head.S b/arch/sh/boot/romimage/head.S
index 93e779a405ec..4671d1b82150 100644
--- a/arch/sh/boot/romimage/head.S
+++ b/arch/sh/boot/romimage/head.S
@@ -12,8 +12,40 @@ romstart:
         /* include board specific setup code */
 #include <mach/romimage.h>
 
+#ifdef CONFIG_ROMIMAGE_MMCIF
+        /* load the romImage to above the empty zero page */
+        mov.l   empty_zero_page_dst, r4
+        mov.l   empty_zero_page_dst_adj, r5
+        add     r5, r4
+        mov.l   bytes_to_load, r5
+        mov.l   loader_function, r7
+        jsr     @r7
+         mov    r4, r15
+
+        mov.l   empty_zero_page_dst, r4
+        mov.l   empty_zero_page_dst_adj, r5
+        add     r5, r4
+        mov.l   loaded_code_offs, r5
+        add     r5, r4
+        jmp     @r4
+         nop
+
+        .balign 4
+empty_zero_page_dst_adj:
+        .long   PAGE_SIZE
+bytes_to_load:
+        .long   end_data - romstart
+loader_function:
+        .long   mmcif_loader
+loaded_code_offs:
+        .long   loaded_code - romstart
+loaded_code:
+#endif /* CONFIG_ROMIMAGE_MMCIF */
+
         /* copy the empty_zero_page contents to where vmlinux expects it */
-        mova    empty_zero_page_src, r0
+        mova    extra_data_pos, r0
+        mov.l   extra_data_size, r1
+        add     r1, r0
         mov.l   empty_zero_page_dst, r1
         mov     #(PAGE_SHIFT - 4), r4
         mov     #1, r3
@@ -37,7 +69,9 @@ romstart:
         mov     #PAGE_SHIFT, r4
         mov     #1, r1
         shld    r4, r1
-        mova    empty_zero_page_src, r0
+        mova    extra_data_pos, r0
+        add     r1, r0
+        mov.l   extra_data_size, r1
         add     r1, r0
         jmp     @r0
          nop
@@ -45,4 +79,6 @@ romstart:
         .align 2
 empty_zero_page_dst:
         .long   _text
-empty_zero_page_src:
+extra_data_pos:
+extra_data_size:
+        .long   zero_page_pos - extra_data_pos
diff --git a/arch/sh/boot/romimage/mmcif-sh7724.c b/arch/sh/boot/romimage/mmcif-sh7724.c
new file mode 100644
index 000000000000..14863d7292cb
--- /dev/null
+++ b/arch/sh/boot/romimage/mmcif-sh7724.c
@@ -0,0 +1,72 @@
+/*
+ * sh7724 MMCIF loader
+ *
+ * Copyright (C) 2010 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/mmc/sh_mmcif.h>
+#include <mach/romimage.h>
+
+#define MMCIF_BASE      (void __iomem *)0xa4ca0000
+
+#define MSTPCR2         0xa4150038
+#define PTWCR           0xa4050146
+#define PTXCR           0xa4050148
+#define PSELA           0xa405014e
+#define PSELE           0xa4050156
+#define HIZCRC          0xa405015c
+#define DRVCRA          0xa405018a
+
+enum { MMCIF_PROGRESS_ENTER, MMCIF_PROGRESS_INIT,
+       MMCIF_PROGRESS_LOAD, MMCIF_PROGRESS_DONE };
+
+/* SH7724 specific MMCIF loader
+ *
+ * loads the romImage from an MMC card starting from block 512
+ * use the following line to write the romImage to an MMC card
+ * # dd if=arch/sh/boot/romImage of=/dev/sdx bs=512 seek=512
+ */
+asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
+{
+        mmcif_update_progress(MMCIF_PROGRESS_ENTER);
+
+        /* enable clock to the MMCIF hardware block */
+        __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2);
+
+        /* setup pins D7-D0 */
+        __raw_writew(0x0000, PTWCR);
+
+        /* setup pins MMC_CLK, MMC_CMD */
+        __raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR);
+
+        /* select D3-D0 pin function */
+        __raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA);
+
+        /* select D7-D4 pin function */
+        __raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE);
+
+        /* disable Hi-Z for the MMC pins */
+        __raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC);
+
+        /* high drive capability for MMC pins */
+        __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA);
+
+        mmcif_update_progress(MMCIF_PROGRESS_INIT);
+
+        /* setup MMCIF hardware */
+        sh_mmcif_boot_init(MMCIF_BASE);
+
+        mmcif_update_progress(MMCIF_PROGRESS_LOAD);
+
+        /* load kernel via MMCIF interface */
+        sh_mmcif_boot_slurp(MMCIF_BASE, buf, no_bytes);
+
+        /* disable clock to the MMCIF hardware block */
+        __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
+
+        mmcif_update_progress(MMCIF_PROGRESS_DONE);
+}
diff --git a/arch/sh/boot/romimage/vmlinux.scr b/arch/sh/boot/romimage/vmlinux.scr
index 287c08f8b4bb..590394e2f5f2 100644
--- a/arch/sh/boot/romimage/vmlinux.scr
+++ b/arch/sh/boot/romimage/vmlinux.scr
@@ -1,6 +1,8 @@
 SECTIONS
 {
   .text : {
+        zero_page_pos = .;
         *(.data)
+        end_data = .;
         }
 }
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h
index fbbf550cc529..4c27b68789b3 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7724.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h
@@ -9,6 +9,7 @@
  * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10]
  * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3]
  * MD8: Test Mode
+ * BOOT: FBR - Boot Mode (L: MMCIF, H: Area0)
  */
 
 /* Pin Function Controller:
diff --git a/arch/sh/include/mach-common/mach/romimage.h b/arch/sh/include/mach-common/mach/romimage.h
index 267e24112d82..08fb42269ecd 100644
--- a/arch/sh/include/mach-common/mach/romimage.h
+++ b/arch/sh/include/mach-common/mach/romimage.h
@@ -1 +1,11 @@
+#ifdef __ASSEMBLY__
+
 /* do nothing here by default */
+
+#else /* __ASSEMBLY__ */
+
+extern inline void mmcif_update_progress(int nr)
+{
+}
+
+#endif /* __ASSEMBLY__ */
diff --git a/arch/sh/include/mach-ecovec24/mach/romimage.h b/arch/sh/include/mach-ecovec24/mach/romimage.h
index 1c8787ecb1c1..1dcf5e6c8d83 100644
--- a/arch/sh/include/mach-ecovec24/mach/romimage.h
+++ b/arch/sh/include/mach-ecovec24/mach/romimage.h
@@ -1,3 +1,5 @@
+#ifdef __ASSEMBLY__
+
 /* EcoVec board specific boot code:
  * converts the "partner-jet-script.txt" script into assembly
  * the assembly code is the first code to be executed in the romImage
@@ -18,3 +20,28 @@
         .align 2
 1 :     .long 0xa8000000
 2 :
+
+#else /* __ASSEMBLY__ */
+
+/* Ecovec board specific information:
+ *
+ * Set the following to enable MMCIF boot from the MMC card in CN12:
+ *
+ * DS1.5 = OFF (SH BOOT pin set to L)
+ * DS2.6 = OFF (Select MMCIF on CN12 instead of SDHI1)
+ * DS2.7 = ON  (Select MMCIF on CN12 instead of SDHI1)
+ *
+ */
+#define HIZCRA          0xa4050158
+#define PGDR            0xa405012c
+
+extern inline void mmcif_update_progress(int nr)
+{
+        /* disable Hi-Z for LED pins */
+        __raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA);
+
+        /* update progress on LED4, LED5, LED6 and LED7 */
+        __raw_writeb(1 << (nr - 1), PGDR);
+}
+
+#endif /* __ASSEMBLY__ */
diff --git a/arch/sh/include/mach-kfr2r09/mach/romimage.h b/arch/sh/include/mach-kfr2r09/mach/romimage.h
index a110823f2bde..976256a323f2 100644
--- a/arch/sh/include/mach-kfr2r09/mach/romimage.h
+++ b/arch/sh/include/mach-kfr2r09/mach/romimage.h
@@ -1,3 +1,5 @@
+#ifdef __ASSEMBLY__
+
 /* kfr2r09 board specific boot code:
  * converts the "partner-jet-script.txt" script into assembly
  * the assembly code is the first code to be executed in the romImage
@@ -18,3 +20,11 @@
         .align 2
 1:      .long 0xa8000000
 2:
+
+#else /* __ASSEMBLY__ */
+
+extern inline void mmcif_update_progress(int nr)
+{
+}
+
+#endif /* __ASSEMBLY__ */
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index d4104ce9fe53..6c4bbba2a675 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -436,29 +436,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                                              0, sizeof(struct pt_dspregs),
                                              (const void __user *)data);
 #endif
-#ifdef CONFIG_BINFMT_ELF_FDPIC
-        case PTRACE_GETFDPIC: {
-                unsigned long tmp = 0;
-
-                switch (addr) {
-                case PTRACE_GETFDPIC_EXEC:
-                        tmp = child->mm->context.exec_fdpic_loadmap;
-                        break;
-                case PTRACE_GETFDPIC_INTERP:
-                        tmp = child->mm->context.interp_fdpic_loadmap;
-                        break;
-                default:
-                        break;
-                }
-
-                ret = 0;
-                if (put_user(tmp, datap)) {
-                        ret = -EFAULT;
-                        break;
-                }
-                break;
-        }
-#endif
         default:
                 ret = ptrace_request(child, request, addr, data);
                 break;