aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh
diff options
context:
space:
mode:
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/Kconfig30
-rw-r--r--arch/sh/boards/board-edosk7705.c2
-rw-r--r--arch/sh/boards/board-edosk7760.c2
-rw-r--r--arch/sh/boards/board-secureedge5410.c2
-rw-r--r--arch/sh/boards/board-sh7785lcr.c2
-rw-r--r--arch/sh/boards/mach-cayman/setup.c2
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c34
-rw-r--r--arch/sh/boards/mach-highlander/setup.c2
-rw-r--r--arch/sh/boards/mach-landisk/irq.c59
-rw-r--r--arch/sh/boards/mach-landisk/setup.c4
-rw-r--r--arch/sh/boards/mach-r2d/setup.c2
-rw-r--r--arch/sh/boards/mach-rsk/devices-rsk7203.c37
-rw-r--r--arch/sh/boards/mach-sdk7786/Makefile2
-rw-r--r--arch/sh/boards/mach-sdk7786/nmi.c83
-rw-r--r--arch/sh/boards/mach-sdk7786/setup.c5
-rw-r--r--arch/sh/boards/mach-se/7206/irq.c2
-rw-r--r--arch/sh/boards/mach-se/7206/setup.c8
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c47
-rw-r--r--arch/sh/boards/mach-se/7751/setup.c2
-rw-r--r--arch/sh/boards/mach-se/board-se7619.c6
-rw-r--r--arch/sh/boards/mach-sh03/setup.c2
-rw-r--r--arch/sh/configs/migor_defconfig2
-rw-r--r--arch/sh/configs/sh7757lcr_defconfig11
-rw-r--r--arch/sh/drivers/pci/fixups-landisk.c28
-rw-r--r--arch/sh/drivers/pci/pci.c3
-rw-r--r--arch/sh/drivers/push-switch.c2
-rw-r--r--arch/sh/include/asm/cacheflush.h2
-rw-r--r--arch/sh/include/asm/clkdev.h38
-rw-r--r--arch/sh/include/asm/io.h310
-rw-r--r--arch/sh/include/asm/io_generic.h25
-rw-r--r--arch/sh/include/asm/ioctls.h1
-rw-r--r--arch/sh/include/asm/machvec.h22
-rw-r--r--arch/sh/include/asm/processor_32.h7
-rw-r--r--arch/sh/include/asm/ptrace.h4
-rw-r--r--arch/sh/include/asm/ptrace_32.h2
-rw-r--r--arch/sh/include/asm/ptrace_64.h2
-rw-r--r--arch/sh/include/asm/unaligned-sh4a.h164
-rw-r--r--arch/sh/include/asm/unistd_32.h3
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sh7724.h3
-rw-r--r--arch/sh/include/mach-landisk/mach/iodata_landisk.h6
-rw-r--r--arch/sh/include/mach-sdk7786/mach/fpga.h8
-rw-r--r--arch/sh/kernel/Makefile8
-rw-r--r--arch/sh/kernel/clkdev.c171
-rw-r--r--arch/sh/kernel/cpu/Makefile2
-rw-r--r--arch/sh/kernel/cpu/clock-cpg.c2
-rw-r--r--arch/sh/kernel/cpu/clock.c16
-rw-r--r--arch/sh/kernel/cpu/proc.c148
-rw-r--r--arch/sh/kernel/cpu/sh2/clock-sh7619.c22
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7201.c20
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7203.c21
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7206.c20
-rw-r--r--arch/sh/kernel/cpu/sh4/clock-sh4-202.c7
-rw-r--r--arch/sh/kernel/cpu/sh4/perf_event.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c1
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7343.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7366.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7723.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c46
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7757.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7763.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7780.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7785.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7786.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-shx3.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/perf_event.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c35
-rw-r--r--arch/sh/kernel/io_generic.c180
-rw-r--r--arch/sh/kernel/iomap.c165
-rw-r--r--arch/sh/kernel/ioport.c43
-rw-r--r--arch/sh/kernel/machvec.c22
-rw-r--r--arch/sh/kernel/perf_event.c2
-rw-r--r--arch/sh/kernel/setup.c144
-rw-r--r--arch/sh/kernel/sys_sh.c2
-rw-r--r--arch/sh/kernel/syscalls_32.S1
-rw-r--r--arch/sh/kernel/vsyscall/vsyscall-trapa.S2
-rw-r--r--arch/sh/mm/cache-sh4.c4
-rw-r--r--arch/sh/mm/cache-sh7705.c2
-rw-r--r--arch/sh/mm/cache.c14
-rw-r--r--arch/sh/mm/init.c10
-rw-r--r--arch/sh/mm/kmap.c2
81 files changed, 990 insertions, 1124 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 7f217b3a50a8..fff252209f63 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -1,7 +1,7 @@
1config SUPERH 1config SUPERH
2 def_bool y 2 def_bool y
3 select EMBEDDED 3 select EMBEDDED
4 select HAVE_CLK 4 select CLKDEV_LOOKUP
5 select HAVE_IDE if HAS_IOPORT 5 select HAVE_IDE if HAS_IOPORT
6 select HAVE_MEMBLOCK 6 select HAVE_MEMBLOCK
7 select HAVE_OPROFILE 7 select HAVE_OPROFILE
@@ -22,7 +22,8 @@ config SUPERH
22 select HAVE_SPARSE_IRQ 22 select HAVE_SPARSE_IRQ
23 select RTC_LIB 23 select RTC_LIB
24 select GENERIC_ATOMIC64 24 select GENERIC_ATOMIC64
25 select GENERIC_HARDIRQS_NO_DEPRECATED 25 # Support the deprecated APIs until MFD and GPIOLIB catch up.
26 select GENERIC_HARDIRQS_NO_DEPRECATED if !MFD_SUPPORT && !GPIOLIB
26 help 27 help
27 The SuperH is a RISC processor targeted for use in embedded systems 28 The SuperH is a RISC processor targeted for use in embedded systems
28 and consumer electronics; it was also used in the Sega Dreamcast 29 and consumer electronics; it was also used in the Sega Dreamcast
@@ -161,7 +162,8 @@ config ARCH_HAS_CPU_IDLE_WAIT
161 def_bool y 162 def_bool y
162 163
163config NO_IOPORT 164config NO_IOPORT
164 bool 165 def_bool !PCI
166 depends on !SH_CAYMAN && !SH_SH4202_MICRODEV
165 167
166config IO_TRAPPED 168config IO_TRAPPED
167 bool 169 bool
@@ -274,6 +276,7 @@ config CPU_SUBTYPE_SH7203
274 select CPU_HAS_FPU 276 select CPU_HAS_FPU
275 select SYS_SUPPORTS_CMT 277 select SYS_SUPPORTS_CMT
276 select SYS_SUPPORTS_MTU2 278 select SYS_SUPPORTS_MTU2
279 select ARCH_WANT_OPTIONAL_GPIOLIB
277 280
278config CPU_SUBTYPE_SH7206 281config CPU_SUBTYPE_SH7206
279 bool "Support SH7206 processor" 282 bool "Support SH7206 processor"
@@ -345,6 +348,8 @@ config CPU_SUBTYPE_SH7720
345 select CPU_SH3 348 select CPU_SH3
346 select CPU_HAS_DSP 349 select CPU_HAS_DSP
347 select SYS_SUPPORTS_CMT 350 select SYS_SUPPORTS_CMT
351 select ARCH_WANT_OPTIONAL_GPIOLIB
352 select USB_ARCH_HAS_OHCI
348 help 353 help
349 Select SH7720 if you have a SH3-DSP SH7720 CPU. 354 Select SH7720 if you have a SH3-DSP SH7720 CPU.
350 355
@@ -353,6 +358,7 @@ config CPU_SUBTYPE_SH7721
353 select CPU_SH3 358 select CPU_SH3
354 select CPU_HAS_DSP 359 select CPU_HAS_DSP
355 select SYS_SUPPORTS_CMT 360 select SYS_SUPPORTS_CMT
361 select USB_ARCH_HAS_OHCI
356 help 362 help
357 Select SH7721 if you have a SH3-DSP SH7721 CPU. 363 Select SH7721 if you have a SH3-DSP SH7721 CPU.
358 364
@@ -407,6 +413,7 @@ config CPU_SUBTYPE_SH7723
407 select ARCH_SHMOBILE 413 select ARCH_SHMOBILE
408 select ARCH_SPARSEMEM_ENABLE 414 select ARCH_SPARSEMEM_ENABLE
409 select SYS_SUPPORTS_CMT 415 select SYS_SUPPORTS_CMT
416 select ARCH_WANT_OPTIONAL_GPIOLIB
410 help 417 help
411 Select SH7723 if you have an SH-MobileR2 CPU. 418 Select SH7723 if you have an SH-MobileR2 CPU.
412 419
@@ -417,6 +424,7 @@ config CPU_SUBTYPE_SH7724
417 select ARCH_SHMOBILE 424 select ARCH_SHMOBILE
418 select ARCH_SPARSEMEM_ENABLE 425 select ARCH_SPARSEMEM_ENABLE
419 select SYS_SUPPORTS_CMT 426 select SYS_SUPPORTS_CMT
427 select ARCH_WANT_OPTIONAL_GPIOLIB
420 help 428 help
421 Select SH7724 if you have an SH-MobileR2R CPU. 429 Select SH7724 if you have an SH-MobileR2R CPU.
422 430
@@ -424,12 +432,14 @@ config CPU_SUBTYPE_SH7757
424 bool "Support SH7757 processor" 432 bool "Support SH7757 processor"
425 select CPU_SH4A 433 select CPU_SH4A
426 select CPU_SHX2 434 select CPU_SHX2
435 select ARCH_WANT_OPTIONAL_GPIOLIB
427 help 436 help
428 Select SH7757 if you have a SH4A SH7757 CPU. 437 Select SH7757 if you have a SH4A SH7757 CPU.
429 438
430config CPU_SUBTYPE_SH7763 439config CPU_SUBTYPE_SH7763
431 bool "Support SH7763 processor" 440 bool "Support SH7763 processor"
432 select CPU_SH4A 441 select CPU_SH4A
442 select USB_ARCH_HAS_OHCI
433 help 443 help
434 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. 444 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
435 445
@@ -447,6 +457,7 @@ config CPU_SUBTYPE_SH7785
447 select CPU_SHX2 457 select CPU_SHX2
448 select ARCH_SPARSEMEM_ENABLE 458 select ARCH_SPARSEMEM_ENABLE
449 select SYS_SUPPORTS_NUMA 459 select SYS_SUPPORTS_NUMA
460 select ARCH_WANT_OPTIONAL_GPIOLIB
450 461
451config CPU_SUBTYPE_SH7786 462config CPU_SUBTYPE_SH7786
452 bool "Support SH7786 processor" 463 bool "Support SH7786 processor"
@@ -454,6 +465,9 @@ config CPU_SUBTYPE_SH7786
454 select CPU_SHX3 465 select CPU_SHX3
455 select CPU_HAS_PTEAEX 466 select CPU_HAS_PTEAEX
456 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 467 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
468 select ARCH_WANT_OPTIONAL_GPIOLIB
469 select USB_ARCH_HAS_OHCI
470 select USB_ARCH_HAS_EHCI
457 471
458config CPU_SUBTYPE_SHX3 472config CPU_SUBTYPE_SHX3
459 bool "Support SH-X3 processor" 473 bool "Support SH-X3 processor"
@@ -478,6 +492,7 @@ config CPU_SUBTYPE_SH7722
478 select ARCH_SPARSEMEM_ENABLE 492 select ARCH_SPARSEMEM_ENABLE
479 select SYS_SUPPORTS_NUMA 493 select SYS_SUPPORTS_NUMA
480 select SYS_SUPPORTS_CMT 494 select SYS_SUPPORTS_CMT
495 select ARCH_WANT_OPTIONAL_GPIOLIB
481 496
482config CPU_SUBTYPE_SH7366 497config CPU_SUBTYPE_SH7366
483 bool "Support SH7366 processor" 498 bool "Support SH7366 processor"
@@ -567,15 +582,6 @@ config SH_CLK_CPG_LEGACY
567 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ 582 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
568 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 583 !CPU_SHX3 && !CPU_SUBTYPE_SH7757
569 584
570config SH_CLK_MD
571 int "CPU Mode Pin Setting"
572 depends on CPU_SH2
573 default 6 if CPU_SUBTYPE_SH7206
574 default 5 if CPU_SUBTYPE_SH7619
575 default 0
576 help
577 MD2 - MD0 pin setting.
578
579source "kernel/time/Kconfig" 585source "kernel/time/Kconfig"
580 586
581endmenu 587endmenu
diff --git a/arch/sh/boards/board-edosk7705.c b/arch/sh/boards/board-edosk7705.c
index 4cb3bb74c36f..541d8a281035 100644
--- a/arch/sh/boards/board-edosk7705.c
+++ b/arch/sh/boards/board-edosk7705.c
@@ -66,7 +66,7 @@ static int __init init_edosk7705_devices(void)
66 return platform_add_devices(edosk7705_devices, 66 return platform_add_devices(edosk7705_devices,
67 ARRAY_SIZE(edosk7705_devices)); 67 ARRAY_SIZE(edosk7705_devices));
68} 68}
69__initcall(init_edosk7705_devices); 69device_initcall(init_edosk7705_devices);
70 70
71/* 71/*
72 * The Machine Vector 72 * The Machine Vector
diff --git a/arch/sh/boards/board-edosk7760.c b/arch/sh/boards/board-edosk7760.c
index 35dc0994875d..f47ac82da876 100644
--- a/arch/sh/boards/board-edosk7760.c
+++ b/arch/sh/boards/board-edosk7760.c
@@ -182,7 +182,7 @@ static int __init init_edosk7760_devices(void)
182 return platform_add_devices(edosk7760_devices, 182 return platform_add_devices(edosk7760_devices,
183 ARRAY_SIZE(edosk7760_devices)); 183 ARRAY_SIZE(edosk7760_devices));
184} 184}
185__initcall(init_edosk7760_devices); 185device_initcall(init_edosk7760_devices);
186 186
187/* 187/*
188 * The Machine Vector 188 * The Machine Vector
diff --git a/arch/sh/boards/board-secureedge5410.c b/arch/sh/boards/board-secureedge5410.c
index 32f875e8493d..f968f17891a4 100644
--- a/arch/sh/boards/board-secureedge5410.c
+++ b/arch/sh/boards/board-secureedge5410.c
@@ -29,8 +29,6 @@ unsigned short secureedge5410_ioport;
29 */ 29 */
30static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id) 30static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
31{ 31{
32 ctrl_delay(); /* dummy read */
33
34 printk("SnapGear: erase switch interrupt!\n"); 32 printk("SnapGear: erase switch interrupt!\n");
35 33
36 return IRQ_HANDLED; 34 return IRQ_HANDLED;
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index fe7e686c94ac..ee65ff05c558 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -284,7 +284,7 @@ static int __init sh7785lcr_devices_setup(void)
284 return platform_add_devices(sh7785lcr_devices, 284 return platform_add_devices(sh7785lcr_devices,
285 ARRAY_SIZE(sh7785lcr_devices)); 285 ARRAY_SIZE(sh7785lcr_devices));
286} 286}
287__initcall(sh7785lcr_devices_setup); 287device_initcall(sh7785lcr_devices_setup);
288 288
289/* Initialize IRQ setting */ 289/* Initialize IRQ setting */
290void __init init_sh7785lcr_IRQ(void) 290void __init init_sh7785lcr_IRQ(void)
diff --git a/arch/sh/boards/mach-cayman/setup.c b/arch/sh/boards/mach-cayman/setup.c
index 7e8216ac31bd..e89e8e122a26 100644
--- a/arch/sh/boards/mach-cayman/setup.c
+++ b/arch/sh/boards/mach-cayman/setup.c
@@ -165,7 +165,7 @@ static int __init smsc_superio_setup(void)
165 165
166 return 0; 166 return 0;
167} 167}
168__initcall(smsc_superio_setup); 168device_initcall(smsc_superio_setup);
169 169
170static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len) 170static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len)
171{ 171{
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 2eaeb9e59585..f48c492a68d3 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -720,32 +720,6 @@ static struct platform_device camera_devices[] = {
720}; 720};
721 721
722/* FSI */ 722/* FSI */
723/*
724 * FSI-B use external clock which came from da7210.
725 * So, we should change parent of fsi
726 */
727#define FCLKBCR 0xa415000c
728static void fsimck_init(struct clk *clk)
729{
730 u32 status = __raw_readl(clk->enable_reg);
731
732 /* use external clock */
733 status &= ~0x000000ff;
734 status |= 0x00000080;
735
736 __raw_writel(status, clk->enable_reg);
737}
738
739static struct clk_ops fsimck_clk_ops = {
740 .init = fsimck_init,
741};
742
743static struct clk fsimckb_clk = {
744 .ops = &fsimck_clk_ops,
745 .enable_reg = (void __iomem *)FCLKBCR,
746 .rate = 0, /* unknown */
747};
748
749static struct sh_fsi_platform_info fsi_info = { 723static struct sh_fsi_platform_info fsi_info = {
750 .portb_flags = SH_FSI_BRS_INV | 724 .portb_flags = SH_FSI_BRS_INV |
751 SH_FSI_OUT_SLAVE_MODE | 725 SH_FSI_OUT_SLAVE_MODE |
@@ -1264,10 +1238,10 @@ static int __init arch_setup(void)
1264 /* change parent of FSI B */ 1238 /* change parent of FSI B */
1265 clk = clk_get(NULL, "fsib_clk"); 1239 clk = clk_get(NULL, "fsib_clk");
1266 if (!IS_ERR(clk)) { 1240 if (!IS_ERR(clk)) {
1267 clk_register(&fsimckb_clk); 1241 /* 48kHz dummy clock was used to make sure 1/1 divide */
1268 clk_set_parent(clk, &fsimckb_clk); 1242 clk_set_rate(&sh7724_fsimckb_clk, 48000);
1269 clk_set_rate(clk, 11000); 1243 clk_set_parent(clk, &sh7724_fsimckb_clk);
1270 clk_set_rate(&fsimckb_clk, 11000); 1244 clk_set_rate(clk, 48000);
1271 clk_put(clk); 1245 clk_put(clk);
1272 } 1246 }
1273 1247
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index a5ecfbacaf36..87618c91d178 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -24,10 +24,10 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/usb/r8a66597.h> 25#include <linux/usb/r8a66597.h>
26#include <linux/usb/m66592.h> 26#include <linux/usb/m66592.h>
27#include <linux/clkdev.h>
27#include <net/ax88796.h> 28#include <net/ax88796.h>
28#include <asm/machvec.h> 29#include <asm/machvec.h>
29#include <mach/highlander.h> 30#include <mach/highlander.h>
30#include <asm/clkdev.h>
31#include <asm/clock.h> 31#include <asm/clock.h>
32#include <asm/heartbeat.h> 32#include <asm/heartbeat.h>
33#include <asm/io.h> 33#include <asm/io.h>
diff --git a/arch/sh/boards/mach-landisk/irq.c b/arch/sh/boards/mach-landisk/irq.c
index e79412a40490..c00ace38db3f 100644
--- a/arch/sh/boards/mach-landisk/irq.c
+++ b/arch/sh/boards/mach-landisk/irq.c
@@ -1,9 +1,10 @@
1/* 1/*
2 * arch/sh/boards/landisk/irq.c 2 * arch/sh/boards/mach-landisk/irq.c
3 * 3 *
4 * I-O DATA Device, Inc. LANDISK Support 4 * I-O DATA Device, Inc. LANDISK Support
5 * 5 *
6 * Copyright (C) 2005-2007 kogiidena 6 * Copyright (C) 2005-2007 kogiidena
7 * Copyright (C) 2011 Nobuhiro Iwamatsu
7 * 8 *
8 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 9 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
9 * Based largely on io_se.c. 10 * Based largely on io_se.c.
@@ -12,44 +13,54 @@
12 * License. See the file "COPYING" in the main directory of this archive 13 * License. See the file "COPYING" in the main directory of this archive
13 * for more details. 14 * for more details.
14 */ 15 */
16
15#include <linux/init.h> 17#include <linux/init.h>
16#include <linux/irq.h> 18#include <linux/irq.h>
17#include <linux/interrupt.h> 19#include <linux/interrupt.h>
18#include <linux/io.h> 20#include <linux/io.h>
19#include <mach-landisk/mach/iodata_landisk.h> 21#include <mach-landisk/mach/iodata_landisk.h>
20 22
21static void disable_landisk_irq(struct irq_data *data) 23enum {
22{ 24 UNUSED = 0,
23 unsigned char mask = 0xff ^ (0x01 << (data->irq - 5));
24 25
25 __raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK); 26 PCI_INTA, /* PCI int A */
26} 27 PCI_INTB, /* PCI int B */
27 28 PCI_INTC, /* PCI int C */
28static void enable_landisk_irq(struct irq_data *data) 29 PCI_INTD, /* PCI int D */
29{ 30 ATA, /* ATA */
30 unsigned char value = (0x01 << (data->irq - 5)); 31 FATA, /* CF */
32 POWER, /* Power swtich */
33 BUTTON, /* Button swtich */
34};
31 35
32 __raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK); 36/* Vectors for LANDISK */
33} 37static struct intc_vect vectors_landisk[] __initdata = {
38 INTC_IRQ(PCI_INTA, IRQ_PCIINTA),
39 INTC_IRQ(PCI_INTB, IRQ_PCIINTB),
40 INTC_IRQ(PCI_INTC, IRQ_PCIINTC),
41 INTC_IRQ(PCI_INTD, IRQ_PCIINTD),
42 INTC_IRQ(ATA, IRQ_ATA),
43 INTC_IRQ(FATA, IRQ_FATA),
44 INTC_IRQ(POWER, IRQ_POWER),
45 INTC_IRQ(BUTTON, IRQ_BUTTON),
46};
34 47
35static struct irq_chip landisk_irq_chip __read_mostly = { 48/* IRLMSK mask register layout for LANDISK */
36 .name = "LANDISK", 49static struct intc_mask_reg mask_registers_landisk[] __initdata = {
37 .irq_mask = disable_landisk_irq, 50 { PA_IMASK, 0, 8, /* IRLMSK */
38 .irq_unmask = enable_landisk_irq, 51 { BUTTON, POWER, FATA, ATA,
52 PCI_INTD, PCI_INTC, PCI_INTB, PCI_INTA,
53 }
54 },
39}; 55};
40 56
57static DECLARE_INTC_DESC(intc_desc_landisk, "landisk", vectors_landisk, NULL,
58 mask_registers_landisk, NULL, NULL);
41/* 59/*
42 * Initialize IRQ setting 60 * Initialize IRQ setting
43 */ 61 */
44void __init init_landisk_IRQ(void) 62void __init init_landisk_IRQ(void)
45{ 63{
46 int i; 64 register_intc_controller(&intc_desc_landisk);
47
48 for (i = 5; i < 14; i++) {
49 disable_irq_nosync(i);
50 set_irq_chip_and_handler_name(i, &landisk_irq_chip,
51 handle_level_irq, "level");
52 enable_landisk_irq(irq_get_irq_data(i));
53 }
54 __raw_writeb(0x00, PA_PWRINT_CLR); 65 __raw_writeb(0x00, PA_PWRINT_CLR);
55} 66}
diff --git a/arch/sh/boards/mach-landisk/setup.c b/arch/sh/boards/mach-landisk/setup.c
index 50337acc18c5..94186cf079b6 100644
--- a/arch/sh/boards/mach-landisk/setup.c
+++ b/arch/sh/boards/mach-landisk/setup.c
@@ -21,8 +21,6 @@
21#include <mach-landisk/mach/iodata_landisk.h> 21#include <mach-landisk/mach/iodata_landisk.h>
22#include <asm/io.h> 22#include <asm/io.h>
23 23
24void init_landisk_IRQ(void);
25
26static void landisk_power_off(void) 24static void landisk_power_off(void)
27{ 25{
28 __raw_writeb(0x01, PA_SHUTDOWN); 26 __raw_writeb(0x01, PA_SHUTDOWN);
@@ -83,7 +81,7 @@ static int __init landisk_devices_setup(void)
83 ARRAY_SIZE(landisk_devices)); 81 ARRAY_SIZE(landisk_devices));
84} 82}
85 83
86__initcall(landisk_devices_setup); 84device_initcall(landisk_devices_setup);
87 85
88static void __init landisk_setup(char **cmdline_p) 86static void __init landisk_setup(char **cmdline_p)
89{ 87{
diff --git a/arch/sh/boards/mach-r2d/setup.c b/arch/sh/boards/mach-r2d/setup.c
index b84df6a3a93c..4b98a5251f83 100644
--- a/arch/sh/boards/mach-r2d/setup.c
+++ b/arch/sh/boards/mach-r2d/setup.c
@@ -258,7 +258,7 @@ static int __init rts7751r2d_devices_setup(void)
258 return platform_add_devices(rts7751r2d_devices, 258 return platform_add_devices(rts7751r2d_devices,
259 ARRAY_SIZE(rts7751r2d_devices)); 259 ARRAY_SIZE(rts7751r2d_devices));
260} 260}
261__initcall(rts7751r2d_devices_setup); 261device_initcall(rts7751r2d_devices_setup);
262 262
263static void rts7751r2d_power_off(void) 263static void rts7751r2d_power_off(void)
264{ 264{
diff --git a/arch/sh/boards/mach-rsk/devices-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c
index 4fa08ba10253..a8089f79d058 100644
--- a/arch/sh/boards/mach-rsk/devices-rsk7203.c
+++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Renesas Technology Europe RSK+ 7203 Support. 2 * Renesas Technology Europe RSK+ 7203 Support.
3 * 3 *
4 * Copyright (C) 2008 Paul Mundt 4 * Copyright (C) 2008 - 2010 Paul Mundt
5 * 5 *
6 * This file is subject to the terms and conditions of the GNU General Public 6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 7 * License. See the file "COPYING" in the main directory of this archive
@@ -12,7 +12,9 @@
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/smsc911x.h> 14#include <linux/smsc911x.h>
15#include <linux/input.h>
15#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/gpio_keys.h>
16#include <linux/leds.h> 18#include <linux/leds.h>
17#include <asm/machvec.h> 19#include <asm/machvec.h>
18#include <asm/io.h> 20#include <asm/io.h>
@@ -84,9 +86,42 @@ static struct platform_device led_device = {
84 }, 86 },
85}; 87};
86 88
89static struct gpio_keys_button rsk7203_gpio_keys_table[] = {
90 {
91 .code = BTN_0,
92 .gpio = GPIO_PB0,
93 .active_low = 1,
94 .desc = "SW1",
95 }, {
96 .code = BTN_1,
97 .gpio = GPIO_PB1,
98 .active_low = 1,
99 .desc = "SW2",
100 }, {
101 .code = BTN_2,
102 .gpio = GPIO_PB2,
103 .active_low = 1,
104 .desc = "SW3",
105 },
106};
107
108static struct gpio_keys_platform_data rsk7203_gpio_keys_info = {
109 .buttons = rsk7203_gpio_keys_table,
110 .nbuttons = ARRAY_SIZE(rsk7203_gpio_keys_table),
111 .poll_interval = 50, /* default to 50ms */
112};
113
114static struct platform_device keys_device = {
115 .name = "gpio-keys-polled",
116 .dev = {
117 .platform_data = &rsk7203_gpio_keys_info,
118 },
119};
120
87static struct platform_device *rsk7203_devices[] __initdata = { 121static struct platform_device *rsk7203_devices[] __initdata = {
88 &smsc911x_device, 122 &smsc911x_device,
89 &led_device, 123 &led_device,
124 &keys_device,
90}; 125};
91 126
92static int __init rsk7203_devices_setup(void) 127static int __init rsk7203_devices_setup(void)
diff --git a/arch/sh/boards/mach-sdk7786/Makefile b/arch/sh/boards/mach-sdk7786/Makefile
index 23ff7d4ac491..8ae56e9560ac 100644
--- a/arch/sh/boards/mach-sdk7786/Makefile
+++ b/arch/sh/boards/mach-sdk7786/Makefile
@@ -1,4 +1,4 @@
1obj-y := fpga.o irq.o setup.o 1obj-y := fpga.o irq.o nmi.o setup.o
2 2
3obj-$(CONFIG_GENERIC_GPIO) += gpio.o 3obj-$(CONFIG_GENERIC_GPIO) += gpio.o
4obj-$(CONFIG_HAVE_SRAM_POOL) += sram.o 4obj-$(CONFIG_HAVE_SRAM_POOL) += sram.o
diff --git a/arch/sh/boards/mach-sdk7786/nmi.c b/arch/sh/boards/mach-sdk7786/nmi.c
new file mode 100644
index 000000000000..edcfa1f568ba
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/nmi.c
@@ -0,0 +1,83 @@
1/*
2 * SDK7786 FPGA NMI Support.
3 *
4 * Copyright (C) 2010 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <mach/fpga.h>
14
15enum {
16 NMI_MODE_MANUAL,
17 NMI_MODE_AUX,
18 NMI_MODE_MASKED,
19 NMI_MODE_ANY,
20 NMI_MODE_UNKNOWN,
21};
22
23/*
24 * Default to the manual NMI switch.
25 */
26static unsigned int __initdata nmi_mode = NMI_MODE_ANY;
27
28static int __init nmi_mode_setup(char *str)
29{
30 if (!str)
31 return 0;
32
33 if (strcmp(str, "manual") == 0)
34 nmi_mode = NMI_MODE_MANUAL;
35 else if (strcmp(str, "aux") == 0)
36 nmi_mode = NMI_MODE_AUX;
37 else if (strcmp(str, "masked") == 0)
38 nmi_mode = NMI_MODE_MASKED;
39 else if (strcmp(str, "any") == 0)
40 nmi_mode = NMI_MODE_ANY;
41 else {
42 nmi_mode = NMI_MODE_UNKNOWN;
43 pr_warning("Unknown NMI mode %s\n", str);
44 }
45
46 printk("Set NMI mode to %d\n", nmi_mode);
47 return 0;
48}
49early_param("nmi_mode", nmi_mode_setup);
50
51void __init sdk7786_nmi_init(void)
52{
53 unsigned int source, mask, tmp;
54
55 switch (nmi_mode) {
56 case NMI_MODE_MANUAL:
57 source = NMISR_MAN_NMI;
58 mask = NMIMR_MAN_NMIM;
59 break;
60 case NMI_MODE_AUX:
61 source = NMISR_AUX_NMI;
62 mask = NMIMR_AUX_NMIM;
63 break;
64 case NMI_MODE_ANY:
65 source = NMISR_MAN_NMI | NMISR_AUX_NMI;
66 mask = NMIMR_MAN_NMIM | NMIMR_AUX_NMIM;
67 break;
68 case NMI_MODE_MASKED:
69 case NMI_MODE_UNKNOWN:
70 default:
71 source = mask = 0;
72 break;
73 }
74
75 /* Set the NMI source */
76 tmp = fpga_read_reg(NMISR);
77 tmp &= ~NMISR_MASK;
78 tmp |= source;
79 fpga_write_reg(tmp, NMISR);
80
81 /* And the IRQ masking */
82 fpga_write_reg(NMIMR_MASK ^ mask, NMIMR);
83}
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
index 7e0c4e3878e0..1521aa75ee3a 100644
--- a/arch/sh/boards/mach-sdk7786/setup.c
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -15,13 +15,13 @@
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/irq.h> 16#include <linux/irq.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/clkdev.h>
18#include <mach/fpga.h> 19#include <mach/fpga.h>
19#include <mach/irq.h> 20#include <mach/irq.h>
20#include <asm/machvec.h> 21#include <asm/machvec.h>
21#include <asm/heartbeat.h> 22#include <asm/heartbeat.h>
22#include <asm/sizes.h> 23#include <asm/sizes.h>
23#include <asm/clock.h> 24#include <asm/clock.h>
24#include <asm/clkdev.h>
25#include <asm/reboot.h> 25#include <asm/reboot.h>
26#include <asm/smp-ops.h> 26#include <asm/smp-ops.h>
27 27
@@ -135,7 +135,7 @@ static int __init sdk7786_devices_setup(void)
135 135
136 return sdk7786_i2c_setup(); 136 return sdk7786_i2c_setup();
137} 137}
138__initcall(sdk7786_devices_setup); 138device_initcall(sdk7786_devices_setup);
139 139
140static int sdk7786_mode_pins(void) 140static int sdk7786_mode_pins(void)
141{ 141{
@@ -237,6 +237,7 @@ static void __init sdk7786_setup(char **cmdline_p)
237 pr_info("Renesas Technology Europe SDK7786 support:\n"); 237 pr_info("Renesas Technology Europe SDK7786 support:\n");
238 238
239 sdk7786_fpga_init(); 239 sdk7786_fpga_init();
240 sdk7786_nmi_init();
240 241
241 pr_info("\tPCB revision:\t%d\n", fpga_read_reg(PCBRR) & 0xf); 242 pr_info("\tPCB revision:\t%d\n", fpga_read_reg(PCBRR) & 0xf);
242 243
diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c
index d961949600fd..9070d7e60704 100644
--- a/arch/sh/boards/mach-se/7206/irq.c
+++ b/arch/sh/boards/mach-se/7206/irq.c
@@ -140,7 +140,7 @@ void __init init_se7206_IRQ(void)
140 make_se7206_irq(IRQ1_IRQ); /* ATA */ 140 make_se7206_irq(IRQ1_IRQ); /* ATA */
141 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ 141 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
142 142
143 __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR); /* ICR1 */ 143 __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR1); /* ICR1 */
144 144
145 /* FPGA System register setup*/ 145 /* FPGA System register setup*/
146 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */ 146 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
diff --git a/arch/sh/boards/mach-se/7206/setup.c b/arch/sh/boards/mach-se/7206/setup.c
index 7f4871c71a01..8ab8330e3fd1 100644
--- a/arch/sh/boards/mach-se/7206/setup.c
+++ b/arch/sh/boards/mach-se/7206/setup.c
@@ -77,7 +77,12 @@ static int __init se7206_devices_setup(void)
77{ 77{
78 return platform_add_devices(se7206_devices, ARRAY_SIZE(se7206_devices)); 78 return platform_add_devices(se7206_devices, ARRAY_SIZE(se7206_devices));
79} 79}
80__initcall(se7206_devices_setup); 80device_initcall(se7206_devices_setup);
81
82static int se7206_mode_pins(void)
83{
84 return MODE_PIN1 | MODE_PIN2;
85}
81 86
82/* 87/*
83 * The Machine Vector 88 * The Machine Vector
@@ -87,4 +92,5 @@ static struct sh_machine_vector mv_se __initmv = {
87 .mv_name = "SolutionEngine", 92 .mv_name = "SolutionEngine",
88 .mv_nr_irqs = 256, 93 .mv_nr_irqs = 256,
89 .mv_init_irq = init_se7206_IRQ, 94 .mv_init_irq = init_se7206_IRQ,
95 .mv_mode_pins = se7206_mode_pins,
90}; 96};
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index c31d228fdfc6..527a0cd956b5 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -283,31 +283,6 @@ static struct platform_device ceu1_device = {
283}; 283};
284 284
285/* FSI */ 285/* FSI */
286/*
287 * FSI-A use external clock which came from ak464x.
288 * So, we should change parent of fsi
289 */
290#define FCLKACR 0xa4150008
291static void fsimck_init(struct clk *clk)
292{
293 u32 status = __raw_readl(clk->enable_reg);
294
295 /* use external clock */
296 status &= ~0x000000ff;
297 status |= 0x00000080;
298 __raw_writel(status, clk->enable_reg);
299}
300
301static struct clk_ops fsimck_clk_ops = {
302 .init = fsimck_init,
303};
304
305static struct clk fsimcka_clk = {
306 .ops = &fsimck_clk_ops,
307 .enable_reg = (void __iomem *)FCLKACR,
308 .rate = 0, /* unknown */
309};
310
311/* change J20, J21, J22 pin to 1-2 connection to use slave mode */ 286/* change J20, J21, J22 pin to 1-2 connection to use slave mode */
312static struct sh_fsi_platform_info fsi_info = { 287static struct sh_fsi_platform_info fsi_info = {
313 .porta_flags = SH_FSI_BRS_INV | 288 .porta_flags = SH_FSI_BRS_INV |
@@ -852,37 +827,29 @@ static int __init devices_setup(void)
852 gpio_request(GPIO_FN_KEYOUT0, NULL); 827 gpio_request(GPIO_FN_KEYOUT0, NULL);
853 828
854 /* enable FSI */ 829 /* enable FSI */
855 gpio_request(GPIO_FN_FSIMCKB, NULL);
856 gpio_request(GPIO_FN_FSIMCKA, NULL); 830 gpio_request(GPIO_FN_FSIMCKA, NULL);
831 gpio_request(GPIO_FN_FSIIASD, NULL);
857 gpio_request(GPIO_FN_FSIOASD, NULL); 832 gpio_request(GPIO_FN_FSIOASD, NULL);
858 gpio_request(GPIO_FN_FSIIABCK, NULL); 833 gpio_request(GPIO_FN_FSIIABCK, NULL);
859 gpio_request(GPIO_FN_FSIIALRCK, NULL); 834 gpio_request(GPIO_FN_FSIIALRCK, NULL);
860 gpio_request(GPIO_FN_FSIOABCK, NULL); 835 gpio_request(GPIO_FN_FSIOABCK, NULL);
861 gpio_request(GPIO_FN_FSIOALRCK, NULL); 836 gpio_request(GPIO_FN_FSIOALRCK, NULL);
862 gpio_request(GPIO_FN_CLKAUDIOAO, NULL); 837 gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
863 gpio_request(GPIO_FN_FSIIBSD, NULL);
864 gpio_request(GPIO_FN_FSIOBSD, NULL);
865 gpio_request(GPIO_FN_FSIIBBCK, NULL);
866 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
867 gpio_request(GPIO_FN_FSIOBBCK, NULL);
868 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
869 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
870 gpio_request(GPIO_FN_FSIIASD, NULL);
871 838
872 /* set SPU2 clock to 83.4 MHz */ 839 /* set SPU2 clock to 83.4 MHz */
873 clk = clk_get(NULL, "spu_clk"); 840 clk = clk_get(NULL, "spu_clk");
874 if (clk) { 841 if (!IS_ERR(clk)) {
875 clk_set_rate(clk, clk_round_rate(clk, 83333333)); 842 clk_set_rate(clk, clk_round_rate(clk, 83333333));
876 clk_put(clk); 843 clk_put(clk);
877 } 844 }
878 845
879 /* change parent of FSI A */ 846 /* change parent of FSI A */
880 clk = clk_get(NULL, "fsia_clk"); 847 clk = clk_get(NULL, "fsia_clk");
881 if (clk) { 848 if (!IS_ERR(clk)) {
882 clk_register(&fsimcka_clk); 849 /* 48kHz dummy clock was used to make sure 1/1 divide */
883 clk_set_parent(clk, &fsimcka_clk); 850 clk_set_rate(&sh7724_fsimcka_clk, 48000);
884 clk_set_rate(clk, 11000); 851 clk_set_parent(clk, &sh7724_fsimcka_clk);
885 clk_set_rate(&fsimcka_clk, 11000); 852 clk_set_rate(clk, 48000);
886 clk_put(clk); 853 clk_put(clk);
887 } 854 }
888 855
diff --git a/arch/sh/boards/mach-se/7751/setup.c b/arch/sh/boards/mach-se/7751/setup.c
index 9fbc51beb181..4ed60c5e221f 100644
--- a/arch/sh/boards/mach-se/7751/setup.c
+++ b/arch/sh/boards/mach-se/7751/setup.c
@@ -48,7 +48,7 @@ static int __init se7751_devices_setup(void)
48{ 48{
49 return platform_add_devices(se7751_devices, ARRAY_SIZE(se7751_devices)); 49 return platform_add_devices(se7751_devices, ARRAY_SIZE(se7751_devices));
50} 50}
51__initcall(se7751_devices_setup); 51device_initcall(se7751_devices_setup);
52 52
53/* 53/*
54 * The Machine Vector 54 * The Machine Vector
diff --git a/arch/sh/boards/mach-se/board-se7619.c b/arch/sh/boards/mach-se/board-se7619.c
index 1d0ef7faa10d..82b6d4a5dc02 100644
--- a/arch/sh/boards/mach-se/board-se7619.c
+++ b/arch/sh/boards/mach-se/board-se7619.c
@@ -11,6 +11,11 @@
11#include <asm/io.h> 11#include <asm/io.h>
12#include <asm/machvec.h> 12#include <asm/machvec.h>
13 13
14static int se7619_mode_pins(void)
15{
16 return MODE_PIN2 | MODE_PIN0;
17}
18
14/* 19/*
15 * The Machine Vector 20 * The Machine Vector
16 */ 21 */
@@ -18,4 +23,5 @@
18static struct sh_machine_vector mv_se __initmv = { 23static struct sh_machine_vector mv_se __initmv = {
19 .mv_name = "SolutionEngine", 24 .mv_name = "SolutionEngine",
20 .mv_nr_irqs = 108, 25 .mv_nr_irqs = 108,
26 .mv_mode_pins = se7619_mode_pins,
21}; 27};
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c
index af4a0c012a96..d4f79b2a6514 100644
--- a/arch/sh/boards/mach-sh03/setup.c
+++ b/arch/sh/boards/mach-sh03/setup.c
@@ -96,7 +96,7 @@ static int __init sh03_devices_setup(void)
96 96
97 return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices)); 97 return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices));
98} 98}
99__initcall(sh03_devices_setup); 99device_initcall(sh03_devices_setup);
100 100
101static struct sh_machine_vector mv_sh03 __initmv = { 101static struct sh_machine_vector mv_sh03 __initmv = {
102 .mv_name = "Interface (CTP/PCI-SH03)", 102 .mv_name = "Interface (CTP/PCI-SH03)",
diff --git a/arch/sh/configs/migor_defconfig b/arch/sh/configs/migor_defconfig
index 9ad904a110de..cc61eda44922 100644
--- a/arch/sh/configs/migor_defconfig
+++ b/arch/sh/configs/migor_defconfig
@@ -54,6 +54,8 @@ CONFIG_INPUT_EVDEV=y
54# CONFIG_KEYBOARD_ATKBD is not set 54# CONFIG_KEYBOARD_ATKBD is not set
55CONFIG_KEYBOARD_SH_KEYSC=y 55CONFIG_KEYBOARD_SH_KEYSC=y
56# CONFIG_INPUT_MOUSE is not set 56# CONFIG_INPUT_MOUSE is not set
57CONFIG_INPUT_TOUCHSCREEN=y
58CONFIG_TOUCHSCREEN_MIGOR=y
57# CONFIG_SERIO is not set 59# CONFIG_SERIO is not set
58CONFIG_VT_HW_CONSOLE_BINDING=y 60CONFIG_VT_HW_CONSOLE_BINDING=y
59CONFIG_SERIAL_SH_SCI=y 61CONFIG_SERIAL_SH_SCI=y
diff --git a/arch/sh/configs/sh7757lcr_defconfig b/arch/sh/configs/sh7757lcr_defconfig
index 273f3fa198f7..5f7f667b9f3b 100644
--- a/arch/sh/configs/sh7757lcr_defconfig
+++ b/arch/sh/configs/sh7757lcr_defconfig
@@ -39,21 +39,15 @@ CONFIG_IPV6=y
39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
40# CONFIG_FW_LOADER is not set 40# CONFIG_FW_LOADER is not set
41CONFIG_BLK_DEV_RAM=y 41CONFIG_BLK_DEV_RAM=y
42# CONFIG_MISC_DEVICES is not set
43CONFIG_NETDEVICES=y 42CONFIG_NETDEVICES=y
44CONFIG_PHYLIB=y
45CONFIG_VITESSE_PHY=y 43CONFIG_VITESSE_PHY=y
46CONFIG_MDIO_BITBANG=y
47CONFIG_NET_ETHERNET=y 44CONFIG_NET_ETHERNET=y
48CONFIG_MII=y 45CONFIG_SH_ETH=y
49# CONFIG_NETDEV_10000 is not set 46# CONFIG_NETDEV_10000 is not set
50# CONFIG_WLAN is not set 47# CONFIG_WLAN is not set
51# CONFIG_KEYBOARD_ATKBD is not set 48# CONFIG_KEYBOARD_ATKBD is not set
52# CONFIG_MOUSE_PS2 is not set 49# CONFIG_MOUSE_PS2 is not set
53# CONFIG_SERIO is not set 50# CONFIG_SERIO is not set
54CONFIG_SERIAL_8250=y
55CONFIG_SERIAL_8250_CONSOLE=y
56CONFIG_SERIAL_8250_NR_UARTS=2
57CONFIG_SERIAL_SH_SCI=y 51CONFIG_SERIAL_SH_SCI=y
58CONFIG_SERIAL_SH_SCI_NR_UARTS=3 52CONFIG_SERIAL_SH_SCI_NR_UARTS=3
59CONFIG_SERIAL_SH_SCI_CONSOLE=y 53CONFIG_SERIAL_SH_SCI_CONSOLE=y
@@ -63,7 +57,6 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
63# CONFIG_USB_SUPPORT is not set 57# CONFIG_USB_SUPPORT is not set
64CONFIG_EXT2_FS=y 58CONFIG_EXT2_FS=y
65CONFIG_EXT3_FS=y 59CONFIG_EXT3_FS=y
66CONFIG_INOTIFY=y
67CONFIG_ISO9660_FS=y 60CONFIG_ISO9660_FS=y
68CONFIG_VFAT_FS=y 61CONFIG_VFAT_FS=y
69CONFIG_PROC_KCORE=y 62CONFIG_PROC_KCORE=y
@@ -76,10 +69,8 @@ CONFIG_NLS_CODEPAGE_437=y
76CONFIG_NLS_CODEPAGE_932=y 69CONFIG_NLS_CODEPAGE_932=y
77CONFIG_NLS_ISO8859_1=y 70CONFIG_NLS_ISO8859_1=y
78CONFIG_DEBUG_KERNEL=y 71CONFIG_DEBUG_KERNEL=y
79# CONFIG_DETECT_SOFTLOCKUP is not set
80# CONFIG_SCHED_DEBUG is not set 72# CONFIG_SCHED_DEBUG is not set
81# CONFIG_DEBUG_BUGVERBOSE is not set 73# CONFIG_DEBUG_BUGVERBOSE is not set
82CONFIG_DEBUG_INFO=y 74CONFIG_DEBUG_INFO=y
83# CONFIG_RCU_CPU_STALL_DETECTOR is not set
84# CONFIG_FTRACE is not set 75# CONFIG_FTRACE is not set
85# CONFIG_CRYPTO_ANSI_CPRNG is not set 76# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/sh/drivers/pci/fixups-landisk.c b/arch/sh/drivers/pci/fixups-landisk.c
index bb1a6bb5149e..95c6e2d94a0a 100644
--- a/arch/sh/drivers/pci/fixups-landisk.c
+++ b/arch/sh/drivers/pci/fixups-landisk.c
@@ -1,9 +1,10 @@
1/* 1/*
2 * arch/sh/drivers/pci/ops-landisk.c 2 * arch/sh/drivers/pci/fixups-landisk.c
3 * 3 *
4 * PCI initialization for the I-O DATA Device, Inc. LANDISK board 4 * PCI initialization for the I-O DATA Device, Inc. LANDISK board
5 * 5 *
6 * Copyright (C) 2006 kogiidena 6 * Copyright (C) 2006 kogiidena
7 * Copyright (C) 2010 Nobuhiro Iwamatsu
7 * 8 *
8 * May be copied or modified under the terms of the GNU General Public 9 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information. 10 * License. See linux/COPYING for more information.
@@ -15,6 +16,9 @@
15#include <linux/pci.h> 16#include <linux/pci.h>
16#include "pci-sh4.h" 17#include "pci-sh4.h"
17 18
19#define PCIMCR_MRSET_OFF 0xBFFFFFFF
20#define PCIMCR_RFSH_OFF 0xFFFFFFFB
21
18int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) 22int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
19{ 23{
20 /* 24 /*
@@ -26,9 +30,29 @@ int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
26 int irq = ((slot + pin - 1) & 0x3) + 5; 30 int irq = ((slot + pin - 1) & 0x3) + 5;
27 31
28 if ((slot | (pin - 1)) > 0x3) { 32 if ((slot | (pin - 1)) > 0x3) {
29 printk("PCI: Bad IRQ mapping request for slot %d pin %c\n", 33 printk(KERN_WARNING "PCI: Bad IRQ mapping request for slot %d pin %c\n",
30 slot, pin - 1 + 'A'); 34 slot, pin - 1 + 'A');
31 return -1; 35 return -1;
32 } 36 }
33 return irq; 37 return irq;
34} 38}
39
40int pci_fixup_pcic(struct pci_channel *chan)
41{
42 unsigned long bcr1, mcr;
43
44 bcr1 = __raw_readl(SH7751_BCR1);
45 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
46 pci_write_reg(chan, bcr1, SH4_PCIBCR1);
47
48 mcr = __raw_readl(SH7751_MCR);
49 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
50 pci_write_reg(chan, mcr, SH4_PCIMCR);
51
52 pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5);
53 pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6);
54 pci_write_reg(chan, 0x0c000000, SH4_PCILAR0);
55 pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
56
57 return 0;
58}
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 60ee09a4e121..a09c77dd09db 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -382,14 +382,13 @@ static void __iomem *ioport_map_pci(struct pci_dev *dev,
382 struct pci_channel *chan = dev->sysdata; 382 struct pci_channel *chan = dev->sysdata;
383 383
384 if (unlikely(!chan->io_map_base)) { 384 if (unlikely(!chan->io_map_base)) {
385 chan->io_map_base = generic_io_base; 385 chan->io_map_base = sh_io_port_base;
386 386
387 if (pci_domains_supported) 387 if (pci_domains_supported)
388 panic("To avoid data corruption io_map_base MUST be " 388 panic("To avoid data corruption io_map_base MUST be "
389 "set with multiple PCI domains."); 389 "set with multiple PCI domains.");
390 } 390 }
391 391
392
393 return (void __iomem *)(chan->io_map_base + port); 392 return (void __iomem *)(chan->io_map_base + port);
394} 393}
395 394
diff --git a/arch/sh/drivers/push-switch.c b/arch/sh/drivers/push-switch.c
index 7b42c247316c..afc24556572b 100644
--- a/arch/sh/drivers/push-switch.c
+++ b/arch/sh/drivers/push-switch.c
@@ -107,7 +107,7 @@ static int switch_drv_remove(struct platform_device *pdev)
107 device_remove_file(&pdev->dev, &dev_attr_switch); 107 device_remove_file(&pdev->dev, &dev_attr_switch);
108 108
109 platform_set_drvdata(pdev, NULL); 109 platform_set_drvdata(pdev, NULL);
110 flush_scheduled_work(); 110 flush_work_sync(&psw->work);
111 del_timer_sync(&psw->debounce); 111 del_timer_sync(&psw->debounce);
112 free_irq(irq, pdev); 112 free_irq(irq, pdev);
113 113
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h
index 1f4e562c5e8c..82e1eabeac98 100644
--- a/arch/sh/include/asm/cacheflush.h
+++ b/arch/sh/include/asm/cacheflush.h
@@ -96,7 +96,7 @@ void kmap_coherent_init(void);
96void *kmap_coherent(struct page *page, unsigned long addr); 96void *kmap_coherent(struct page *page, unsigned long addr);
97void kunmap_coherent(void *kvaddr); 97void kunmap_coherent(void *kvaddr);
98 98
99#define PG_dcache_dirty PG_arch_1 99#define PG_dcache_clean PG_arch_1
100 100
101void cpu_cache_init(void); 101void cpu_cache_init(void);
102 102
diff --git a/arch/sh/include/asm/clkdev.h b/arch/sh/include/asm/clkdev.h
index 5645f358128b..6ba91868201c 100644
--- a/arch/sh/include/asm/clkdev.h
+++ b/arch/sh/include/asm/clkdev.h
@@ -1,9 +1,5 @@
1/* 1/*
2 * arch/sh/include/asm/clkdev.h 2 * Copyright (C) 2010 Paul Mundt <lethal@linux-sh.org>
3 *
4 * Cloned from arch/arm/include/asm/clkdev.h:
5 *
6 * Copyright (C) 2008 Russell King.
7 * 3 *
8 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
@@ -11,25 +7,25 @@
11 * 7 *
12 * Helper for the clk API to assist looking up a struct clk. 8 * Helper for the clk API to assist looking up a struct clk.
13 */ 9 */
14#ifndef __ASM_CLKDEV_H
15#define __ASM_CLKDEV_H
16 10
17struct clk; 11#ifndef __CLKDEV__H_
12#define __CLKDEV__H_
18 13
19struct clk_lookup { 14#include <linux/bootmem.h>
20 struct list_head node; 15#include <linux/mm.h>
21 const char *dev_id; 16#include <linux/slab.h>
22 const char *con_id;
23 struct clk *clk;
24};
25 17
26struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id, 18#include <asm/clock.h>
27 const char *dev_fmt, ...);
28 19
29void clkdev_add(struct clk_lookup *cl); 20static inline struct clk_lookup_alloc *__clkdev_alloc(size_t size)
30void clkdev_drop(struct clk_lookup *cl); 21{
22 if (!slab_is_available())
23 return alloc_bootmem_low_pages(size);
24 else
25 return kzalloc(size, GFP_KERNEL);
26}
31 27
32void clkdev_add_table(struct clk_lookup *, size_t); 28#define __clk_put(clk)
33int clk_add_alias(const char *, const char *, char *, struct device *); 29#define __clk_get(clk) ({ 1; })
34 30
35#endif 31#endif /* __CLKDEV_H__ */
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index b237d525d592..70c1186b5088 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -1,5 +1,6 @@
1#ifndef __ASM_SH_IO_H 1#ifndef __ASM_SH_IO_H
2#define __ASM_SH_IO_H 2#define __ASM_SH_IO_H
3
3/* 4/*
4 * Convention: 5 * Convention:
5 * read{b,w,l,q}/write{b,w,l,q} are for PCI, 6 * read{b,w,l,q}/write{b,w,l,q} are for PCI,
@@ -10,17 +11,6 @@
10 * 11 *
11 * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers 12 * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers
12 * automatically, there are also __raw versions, which do not. 13 * automatically, there are also __raw versions, which do not.
13 *
14 * Historically, we have also had ctrl_in{b,w,l,q}/ctrl_out{b,w,l,q} for
15 * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice
16 * these have the same semantics as the __raw variants, and as such, all
17 * new code should be using the __raw versions.
18 *
19 * All ISA I/O routines are wrapped through the machine vector. If a
20 * board does not provide overrides, a generic set that are copied in
21 * from the default machine vector are used instead. These are largely
22 * for old compat code for I/O offseting to SuperIOs, all of which are
23 * better handled through the machvec ioport mapping routines these days.
24 */ 14 */
25#include <linux/errno.h> 15#include <linux/errno.h>
26#include <asm/cache.h> 16#include <asm/cache.h>
@@ -31,39 +21,10 @@
31#include <asm-generic/iomap.h> 21#include <asm-generic/iomap.h>
32 22
33#ifdef __KERNEL__ 23#ifdef __KERNEL__
34/* 24#define __IO_PREFIX generic
35 * Depending on which platform we are running on, we need different
36 * I/O functions.
37 */
38#define __IO_PREFIX generic
39#include <asm/io_generic.h> 25#include <asm/io_generic.h>
40#include <asm/io_trapped.h> 26#include <asm/io_trapped.h>
41 27
42#ifdef CONFIG_HAS_IOPORT
43
44#define inb(p) sh_mv.mv_inb((p))
45#define inw(p) sh_mv.mv_inw((p))
46#define inl(p) sh_mv.mv_inl((p))
47#define outb(x,p) sh_mv.mv_outb((x),(p))
48#define outw(x,p) sh_mv.mv_outw((x),(p))
49#define outl(x,p) sh_mv.mv_outl((x),(p))
50
51#define inb_p(p) sh_mv.mv_inb_p((p))
52#define inw_p(p) sh_mv.mv_inw_p((p))
53#define inl_p(p) sh_mv.mv_inl_p((p))
54#define outb_p(x,p) sh_mv.mv_outb_p((x),(p))
55#define outw_p(x,p) sh_mv.mv_outw_p((x),(p))
56#define outl_p(x,p) sh_mv.mv_outl_p((x),(p))
57
58#define insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
59#define insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
60#define insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
61#define outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
62#define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
63#define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
64
65#endif
66
67#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v)) 28#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v))
68#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v)) 29#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
69#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v)) 30#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
@@ -74,68 +35,39 @@
74#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a)) 35#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a))
75#define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a)) 36#define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a))
76 37
77#define readb(a) ({ u8 r_ = __raw_readb(a); mb(); r_; }) 38#define readb_relaxed(c) ({ u8 __v = __raw_readb(c); __v; })
78#define readw(a) ({ u16 r_ = __raw_readw(a); mb(); r_; }) 39#define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \
79#define readl(a) ({ u32 r_ = __raw_readl(a); mb(); r_; }) 40 __raw_readw(c)); __v; })
80#define readq(a) ({ u64 r_ = __raw_readq(a); mb(); r_; }) 41#define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \
81 42 __raw_readl(c)); __v; })
82#define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); }) 43#define readq_relaxed(c) ({ u64 __v = le64_to_cpu((__force __le64) \
83#define writew(v,a) ({ __raw_writew((v),(a)); mb(); }) 44 __raw_readq(c)); __v; })
84#define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) 45
85#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); }) 46#define writeb_relaxed(v,c) ((void)__raw_writeb(v,c))
86 47#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \
87/* 48 cpu_to_le16(v),c))
88 * Legacy SuperH on-chip I/O functions 49#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \
89 * 50 cpu_to_le32(v),c))
90 * These are all deprecated, all new (and especially cross-platform) code 51#define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64) \
91 * should be using the __raw_xxx() routines directly. 52 cpu_to_le64(v),c))
92 */ 53
93static inline u8 __deprecated ctrl_inb(unsigned long addr) 54#define readb(a) ({ u8 r_ = readb_relaxed(a); rmb(); r_; })
94{ 55#define readw(a) ({ u16 r_ = readw_relaxed(a); rmb(); r_; })
95 return __raw_readb(addr); 56#define readl(a) ({ u32 r_ = readl_relaxed(a); rmb(); r_; })
96} 57#define readq(a) ({ u64 r_ = readq_relaxed(a); rmb(); r_; })
97 58
98static inline u16 __deprecated ctrl_inw(unsigned long addr) 59#define writeb(v,a) ({ wmb(); writeb_relaxed((v),(a)); })
99{ 60#define writew(v,a) ({ wmb(); writew_relaxed((v),(a)); })
100 return __raw_readw(addr); 61#define writel(v,a) ({ wmb(); writel_relaxed((v),(a)); })
101} 62#define writeq(v,a) ({ wmb(); writeq_relaxed((v),(a)); })
102 63
103static inline u32 __deprecated ctrl_inl(unsigned long addr) 64#define readsb(p,d,l) __raw_readsb(p,d,l)
104{ 65#define readsw(p,d,l) __raw_readsw(p,d,l)
105 return __raw_readl(addr); 66#define readsl(p,d,l) __raw_readsl(p,d,l)
106} 67
107 68#define writesb(p,d,l) __raw_writesb(p,d,l)
108static inline u64 __deprecated ctrl_inq(unsigned long addr) 69#define writesw(p,d,l) __raw_writesw(p,d,l)
109{ 70#define writesl(p,d,l) __raw_writesl(p,d,l)
110 return __raw_readq(addr);
111}
112
113static inline void __deprecated ctrl_outb(u8 v, unsigned long addr)
114{
115 __raw_writeb(v, addr);
116}
117
118static inline void __deprecated ctrl_outw(u16 v, unsigned long addr)
119{
120 __raw_writew(v, addr);
121}
122
123static inline void __deprecated ctrl_outl(u32 v, unsigned long addr)
124{
125 __raw_writel(v, addr);
126}
127
128static inline void __deprecated ctrl_outq(u64 v, unsigned long addr)
129{
130 __raw_writeq(v, addr);
131}
132
133extern unsigned long generic_io_base;
134
135static inline void ctrl_delay(void)
136{
137 __raw_readw(generic_io_base);
138}
139 71
140#define __BUILD_UNCACHED_IO(bwlq, type) \ 72#define __BUILD_UNCACHED_IO(bwlq, type) \
141static inline type read##bwlq##_uncached(unsigned long addr) \ 73static inline type read##bwlq##_uncached(unsigned long addr) \
@@ -159,10 +91,11 @@ __BUILD_UNCACHED_IO(w, u16)
159__BUILD_UNCACHED_IO(l, u32) 91__BUILD_UNCACHED_IO(l, u32)
160__BUILD_UNCACHED_IO(q, u64) 92__BUILD_UNCACHED_IO(q, u64)
161 93
162#define __BUILD_MEMORY_STRING(bwlq, type) \ 94#define __BUILD_MEMORY_STRING(pfx, bwlq, type) \
163 \ 95 \
164static inline void __raw_writes##bwlq(volatile void __iomem *mem, \ 96static inline void \
165 const void *addr, unsigned int count) \ 97pfx##writes##bwlq(volatile void __iomem *mem, const void *addr, \
98 unsigned int count) \
166{ \ 99{ \
167 const volatile type *__addr = addr; \ 100 const volatile type *__addr = addr; \
168 \ 101 \
@@ -172,8 +105,8 @@ static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
172 } \ 105 } \
173} \ 106} \
174 \ 107 \
175static inline void __raw_reads##bwlq(volatile void __iomem *mem, \ 108static inline void pfx##reads##bwlq(volatile void __iomem *mem, \
176 void *addr, unsigned int count) \ 109 void *addr, unsigned int count) \
177{ \ 110{ \
178 volatile type *__addr = addr; \ 111 volatile type *__addr = addr; \
179 \ 112 \
@@ -183,86 +116,121 @@ static inline void __raw_reads##bwlq(volatile void __iomem *mem, \
183 } \ 116 } \
184} 117}
185 118
186__BUILD_MEMORY_STRING(b, u8) 119__BUILD_MEMORY_STRING(__raw_, b, u8)
187__BUILD_MEMORY_STRING(w, u16) 120__BUILD_MEMORY_STRING(__raw_, w, u16)
188 121
189#ifdef CONFIG_SUPERH32 122#ifdef CONFIG_SUPERH32
190void __raw_writesl(void __iomem *addr, const void *data, int longlen); 123void __raw_writesl(void __iomem *addr, const void *data, int longlen);
191void __raw_readsl(const void __iomem *addr, void *data, int longlen); 124void __raw_readsl(const void __iomem *addr, void *data, int longlen);
192#else 125#else
193__BUILD_MEMORY_STRING(l, u32) 126__BUILD_MEMORY_STRING(__raw_, l, u32)
194#endif
195
196__BUILD_MEMORY_STRING(q, u64)
197
198#define writesb __raw_writesb
199#define writesw __raw_writesw
200#define writesl __raw_writesl
201
202#define readsb __raw_readsb
203#define readsw __raw_readsw
204#define readsl __raw_readsl
205
206#define readb_relaxed(a) readb(a)
207#define readw_relaxed(a) readw(a)
208#define readl_relaxed(a) readl(a)
209#define readq_relaxed(a) readq(a)
210
211#ifndef CONFIG_GENERIC_IOMAP
212/* Simple MMIO */
213#define ioread8(a) __raw_readb(a)
214#define ioread16(a) __raw_readw(a)
215#define ioread16be(a) be16_to_cpu(__raw_readw((a)))
216#define ioread32(a) __raw_readl(a)
217#define ioread32be(a) be32_to_cpu(__raw_readl((a)))
218
219#define iowrite8(v,a) __raw_writeb((v),(a))
220#define iowrite16(v,a) __raw_writew((v),(a))
221#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a))
222#define iowrite32(v,a) __raw_writel((v),(a))
223#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
224
225#define ioread8_rep(a, d, c) __raw_readsb((a), (d), (c))
226#define ioread16_rep(a, d, c) __raw_readsw((a), (d), (c))
227#define ioread32_rep(a, d, c) __raw_readsl((a), (d), (c))
228
229#define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c))
230#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c))
231#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c))
232#endif 127#endif
233 128
234#define mmio_insb(p,d,c) __raw_readsb(p,d,c) 129__BUILD_MEMORY_STRING(__raw_, q, u64)
235#define mmio_insw(p,d,c) __raw_readsw(p,d,c)
236#define mmio_insl(p,d,c) __raw_readsl(p,d,c)
237
238#define mmio_outsb(p,s,c) __raw_writesb(p,s,c)
239#define mmio_outsw(p,s,c) __raw_writesw(p,s,c)
240#define mmio_outsl(p,s,c) __raw_writesl(p,s,c)
241
242/* synco on SH-4A, otherwise a nop */
243#define mmiowb() wmb()
244
245#define IO_SPACE_LIMIT 0xffffffff
246 130
247#ifdef CONFIG_HAS_IOPORT 131#ifdef CONFIG_HAS_IOPORT
248 132
249/* 133/*
250 * This function provides a method for the generic case where a 134 * Slowdown I/O port space accesses for antique hardware.
251 * board-specific ioport_map simply needs to return the port + some 135 */
252 * arbitrary port base. 136#undef CONF_SLOWDOWN_IO
253 * 137
254 * We use this at board setup time to implicitly set the port base, and 138/*
255 * as a result, we can use the generic ioport_map. 139 * On SuperH I/O ports are memory mapped, so we access them using normal
140 * load/store instructions. sh_io_port_base is the virtual address to
141 * which all ports are being mapped.
256 */ 142 */
143extern const unsigned long sh_io_port_base;
144
257static inline void __set_io_port_base(unsigned long pbase) 145static inline void __set_io_port_base(unsigned long pbase)
258{ 146{
259 generic_io_base = pbase; 147 *(unsigned long *)&sh_io_port_base = pbase;
148 barrier();
149}
150
151#ifdef CONFIG_GENERIC_IOMAP
152#define __ioport_map ioport_map
153#else
154extern void __iomem *__ioport_map(unsigned long addr, unsigned int size);
155#endif
156
157#ifdef CONF_SLOWDOWN_IO
158#define SLOW_DOWN_IO __raw_readw(sh_io_port_base)
159#else
160#define SLOW_DOWN_IO
161#endif
162
163#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \
164 \
165static inline void pfx##out##bwlq##p(type val, unsigned long port) \
166{ \
167 volatile type *__addr; \
168 \
169 __addr = __ioport_map(port, sizeof(type)); \
170 *__addr = val; \
171 slow; \
172} \
173 \
174static inline type pfx##in##bwlq##p(unsigned long port) \
175{ \
176 volatile type *__addr; \
177 type __val; \
178 \
179 __addr = __ioport_map(port, sizeof(type)); \
180 __val = *__addr; \
181 slow; \
182 \
183 return __val; \
184}
185
186#define __BUILD_IOPORT_PFX(bus, bwlq, type) \
187 __BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) \
188 __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO)
189
190#define BUILDIO_IOPORT(bwlq, type) \
191 __BUILD_IOPORT_PFX(, bwlq, type)
192
193BUILDIO_IOPORT(b, u8)
194BUILDIO_IOPORT(w, u16)
195BUILDIO_IOPORT(l, u32)
196BUILDIO_IOPORT(q, u64)
197
198#define __BUILD_IOPORT_STRING(bwlq, type) \
199 \
200static inline void outs##bwlq(unsigned long port, const void *addr, \
201 unsigned int count) \
202{ \
203 const volatile type *__addr = addr; \
204 \
205 while (count--) { \
206 out##bwlq(*__addr, port); \
207 __addr++; \
208 } \
209} \
210 \
211static inline void ins##bwlq(unsigned long port, void *addr, \
212 unsigned int count) \
213{ \
214 volatile type *__addr = addr; \
215 \
216 while (count--) { \
217 *__addr = in##bwlq(port); \
218 __addr++; \
219 } \
260} 220}
261 221
262#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) 222__BUILD_IOPORT_STRING(b, u8)
223__BUILD_IOPORT_STRING(w, u16)
224__BUILD_IOPORT_STRING(l, u32)
225__BUILD_IOPORT_STRING(q, u64)
263 226
264#endif 227#endif
265 228
229#define IO_SPACE_LIMIT 0xffffffff
230
231/* synco on SH-4A, otherwise a nop */
232#define mmiowb() wmb()
233
266/* We really want to try and get these to memcpy etc */ 234/* We really want to try and get these to memcpy etc */
267void memcpy_fromio(void *, const volatile void __iomem *, unsigned long); 235void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
268void memcpy_toio(volatile void __iomem *, const void *, unsigned long); 236void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
@@ -395,10 +363,6 @@ static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; }
395#define ioremap_nocache ioremap 363#define ioremap_nocache ioremap
396#define iounmap __iounmap 364#define iounmap __iounmap
397 365
398#define maybebadio(port) \
399 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
400 __func__, __LINE__, (port), (u32)__builtin_return_address(0))
401
402/* 366/*
403 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 367 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
404 * access 368 * access
diff --git a/arch/sh/include/asm/io_generic.h b/arch/sh/include/asm/io_generic.h
index 491df93cbf8e..b5f6956f19c8 100644
--- a/arch/sh/include/asm/io_generic.h
+++ b/arch/sh/include/asm/io_generic.h
@@ -11,31 +11,6 @@
11#error "Don't include this header without a valid system prefix" 11#error "Don't include this header without a valid system prefix"
12#endif 12#endif
13 13
14u8 IO_CONCAT(__IO_PREFIX,inb)(unsigned long);
15u16 IO_CONCAT(__IO_PREFIX,inw)(unsigned long);
16u32 IO_CONCAT(__IO_PREFIX,inl)(unsigned long);
17
18void IO_CONCAT(__IO_PREFIX,outb)(u8, unsigned long);
19void IO_CONCAT(__IO_PREFIX,outw)(u16, unsigned long);
20void IO_CONCAT(__IO_PREFIX,outl)(u32, unsigned long);
21
22u8 IO_CONCAT(__IO_PREFIX,inb_p)(unsigned long);
23u16 IO_CONCAT(__IO_PREFIX,inw_p)(unsigned long);
24u32 IO_CONCAT(__IO_PREFIX,inl_p)(unsigned long);
25void IO_CONCAT(__IO_PREFIX,outb_p)(u8, unsigned long);
26void IO_CONCAT(__IO_PREFIX,outw_p)(u16, unsigned long);
27void IO_CONCAT(__IO_PREFIX,outl_p)(u32, unsigned long);
28
29void IO_CONCAT(__IO_PREFIX,insb)(unsigned long, void *dst, unsigned long count);
30void IO_CONCAT(__IO_PREFIX,insw)(unsigned long, void *dst, unsigned long count);
31void IO_CONCAT(__IO_PREFIX,insl)(unsigned long, void *dst, unsigned long count);
32void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long count);
33void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count);
34void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count);
35
36void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size);
37void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr);
38
39void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size); 14void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size);
40void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr); 15void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr);
41void IO_CONCAT(__IO_PREFIX,mem_init)(void); 16void IO_CONCAT(__IO_PREFIX,mem_init)(void);
diff --git a/arch/sh/include/asm/ioctls.h b/arch/sh/include/asm/ioctls.h
index eb6c4c687972..84e85a792638 100644
--- a/arch/sh/include/asm/ioctls.h
+++ b/arch/sh/include/asm/ioctls.h
@@ -85,6 +85,7 @@
85#define TCSETSF2 _IOW('T', 45, struct termios2) 85#define TCSETSF2 _IOW('T', 45, struct termios2)
86#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 86#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
87#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 87#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
88#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
88#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ 89#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
89 90
90#define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */ 91#define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index a0b0cf79cf8a..57c5c3d0f39f 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -23,27 +23,6 @@ struct sh_machine_vector {
23 void (*mv_init_irq)(void); 23 void (*mv_init_irq)(void);
24 24
25#ifdef CONFIG_HAS_IOPORT 25#ifdef CONFIG_HAS_IOPORT
26 u8 (*mv_inb)(unsigned long);
27 u16 (*mv_inw)(unsigned long);
28 u32 (*mv_inl)(unsigned long);
29 void (*mv_outb)(u8, unsigned long);
30 void (*mv_outw)(u16, unsigned long);
31 void (*mv_outl)(u32, unsigned long);
32
33 u8 (*mv_inb_p)(unsigned long);
34 u16 (*mv_inw_p)(unsigned long);
35 u32 (*mv_inl_p)(unsigned long);
36 void (*mv_outb_p)(u8, unsigned long);
37 void (*mv_outw_p)(u16, unsigned long);
38 void (*mv_outl_p)(u32, unsigned long);
39
40 void (*mv_insb)(unsigned long, void *dst, unsigned long count);
41 void (*mv_insw)(unsigned long, void *dst, unsigned long count);
42 void (*mv_insl)(unsigned long, void *dst, unsigned long count);
43 void (*mv_outsb)(unsigned long, const void *src, unsigned long count);
44 void (*mv_outsw)(unsigned long, const void *src, unsigned long count);
45 void (*mv_outsl)(unsigned long, const void *src, unsigned long count);
46
47 void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); 26 void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size);
48 void (*mv_ioport_unmap)(void __iomem *); 27 void (*mv_ioport_unmap)(void __iomem *);
49#endif 28#endif
@@ -52,6 +31,7 @@ struct sh_machine_vector {
52 int (*mv_mode_pins)(void); 31 int (*mv_mode_pins)(void);
53 32
54 void (*mv_mem_init)(void); 33 void (*mv_mem_init)(void);
34 void (*mv_mem_reserve)(void);
55}; 35};
56 36
57extern struct sh_machine_vector sh_mv; 37extern struct sh_machine_vector sh_mv;
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 46d5179c9f49..e3c73cdd8c90 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -199,10 +199,13 @@ extern unsigned long get_wchan(struct task_struct *p);
199#define ARCH_HAS_PREFETCHW 199#define ARCH_HAS_PREFETCHW
200static inline void prefetch(void *x) 200static inline void prefetch(void *x)
201{ 201{
202 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); 202 __builtin_prefetch(x, 0, 3);
203} 203}
204 204
205#define prefetchw(x) prefetch(x) 205static inline void prefetchw(void *x)
206{
207 __builtin_prefetch(x, 1, 3);
208}
206#endif 209#endif
207 210
208#endif /* __KERNEL__ */ 211#endif /* __KERNEL__ */
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index f6edc10aa0d3..de167d3a1a80 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -40,8 +40,8 @@
40#include <asm/system.h> 40#include <asm/system.h>
41 41
42#define user_mode(regs) (((regs)->sr & 0x40000000)==0) 42#define user_mode(regs) (((regs)->sr & 0x40000000)==0)
43#define user_stack_pointer(regs) ((unsigned long)(regs)->regs[15]) 43#define user_stack_pointer(_regs) ((unsigned long)(_regs)->regs[15])
44#define kernel_stack_pointer(regs) ((unsigned long)(regs)->regs[15]) 44#define kernel_stack_pointer(_regs) ((unsigned long)(_regs)->regs[15])
45#define instruction_pointer(regs) ((unsigned long)(regs)->pc) 45#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
46 46
47extern void show_regs(struct pt_regs *); 47extern void show_regs(struct pt_regs *);
diff --git a/arch/sh/include/asm/ptrace_32.h b/arch/sh/include/asm/ptrace_32.h
index 35d9e257558c..6c2239cca1a2 100644
--- a/arch/sh/include/asm/ptrace_32.h
+++ b/arch/sh/include/asm/ptrace_32.h
@@ -76,7 +76,7 @@ struct pt_dspregs {
76#ifdef __KERNEL__ 76#ifdef __KERNEL__
77 77
78#define MAX_REG_OFFSET offsetof(struct pt_regs, tra) 78#define MAX_REG_OFFSET offsetof(struct pt_regs, tra)
79#define regs_return_value(regs) ((regs)->regs[0]) 79#define regs_return_value(_regs) ((_regs)->regs[0])
80 80
81#endif /* __KERNEL__ */ 81#endif /* __KERNEL__ */
82 82
diff --git a/arch/sh/include/asm/ptrace_64.h b/arch/sh/include/asm/ptrace_64.h
index d43c1cb0bbe7..bf9be7764d69 100644
--- a/arch/sh/include/asm/ptrace_64.h
+++ b/arch/sh/include/asm/ptrace_64.h
@@ -13,7 +13,7 @@ struct pt_regs {
13#ifdef __KERNEL__ 13#ifdef __KERNEL__
14 14
15#define MAX_REG_OFFSET offsetof(struct pt_regs, tregs[7]) 15#define MAX_REG_OFFSET offsetof(struct pt_regs, tregs[7])
16#define regs_return_value(regs) ((regs)->regs[3]) 16#define regs_return_value(_regs) ((_regs)->regs[3])
17 17
18#endif /* __KERNEL__ */ 18#endif /* __KERNEL__ */
19 19
diff --git a/arch/sh/include/asm/unaligned-sh4a.h b/arch/sh/include/asm/unaligned-sh4a.h
index 9f4dd252c981..c48a9c3420da 100644
--- a/arch/sh/include/asm/unaligned-sh4a.h
+++ b/arch/sh/include/asm/unaligned-sh4a.h
@@ -18,10 +18,20 @@
18 * of spill registers and blowing up when building at low optimization 18 * of spill registers and blowing up when building at low optimization
19 * levels. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34777. 19 * levels. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34777.
20 */ 20 */
21#include <linux/unaligned/packed_struct.h>
21#include <linux/types.h> 22#include <linux/types.h>
22#include <asm/byteorder.h> 23#include <asm/byteorder.h>
23 24
24static __always_inline u32 __get_unaligned_cpu32(const u8 *p) 25static inline u16 sh4a_get_unaligned_cpu16(const u8 *p)
26{
27#ifdef __LITTLE_ENDIAN
28 return p[0] | p[1] << 8;
29#else
30 return p[0] << 8 | p[1];
31#endif
32}
33
34static __always_inline u32 sh4a_get_unaligned_cpu32(const u8 *p)
25{ 35{
26 unsigned long unaligned; 36 unsigned long unaligned;
27 37
@@ -34,218 +44,148 @@ static __always_inline u32 __get_unaligned_cpu32(const u8 *p)
34 return unaligned; 44 return unaligned;
35} 45}
36 46
37struct __una_u16 { u16 x __attribute__((packed)); };
38struct __una_u32 { u32 x __attribute__((packed)); };
39struct __una_u64 { u64 x __attribute__((packed)); };
40
41static inline u16 __get_unaligned_cpu16(const u8 *p)
42{
43#ifdef __LITTLE_ENDIAN
44 return p[0] | p[1] << 8;
45#else
46 return p[0] << 8 | p[1];
47#endif
48}
49
50/* 47/*
51 * Even though movua.l supports auto-increment on the read side, it can 48 * Even though movua.l supports auto-increment on the read side, it can
52 * only store to r0 due to instruction encoding constraints, so just let 49 * only store to r0 due to instruction encoding constraints, so just let
53 * the compiler sort it out on its own. 50 * the compiler sort it out on its own.
54 */ 51 */
55static inline u64 __get_unaligned_cpu64(const u8 *p) 52static inline u64 sh4a_get_unaligned_cpu64(const u8 *p)
56{ 53{
57#ifdef __LITTLE_ENDIAN 54#ifdef __LITTLE_ENDIAN
58 return (u64)__get_unaligned_cpu32(p + 4) << 32 | 55 return (u64)sh4a_get_unaligned_cpu32(p + 4) << 32 |
59 __get_unaligned_cpu32(p); 56 sh4a_get_unaligned_cpu32(p);
60#else 57#else
61 return (u64)__get_unaligned_cpu32(p) << 32 | 58 return (u64)sh4a_get_unaligned_cpu32(p) << 32 |
62 __get_unaligned_cpu32(p + 4); 59 sh4a_get_unaligned_cpu32(p + 4);
63#endif 60#endif
64} 61}
65 62
66static inline u16 get_unaligned_le16(const void *p) 63static inline u16 get_unaligned_le16(const void *p)
67{ 64{
68 return le16_to_cpu(__get_unaligned_cpu16(p)); 65 return le16_to_cpu(sh4a_get_unaligned_cpu16(p));
69} 66}
70 67
71static inline u32 get_unaligned_le32(const void *p) 68static inline u32 get_unaligned_le32(const void *p)
72{ 69{
73 return le32_to_cpu(__get_unaligned_cpu32(p)); 70 return le32_to_cpu(sh4a_get_unaligned_cpu32(p));
74} 71}
75 72
76static inline u64 get_unaligned_le64(const void *p) 73static inline u64 get_unaligned_le64(const void *p)
77{ 74{
78 return le64_to_cpu(__get_unaligned_cpu64(p)); 75 return le64_to_cpu(sh4a_get_unaligned_cpu64(p));
79} 76}
80 77
81static inline u16 get_unaligned_be16(const void *p) 78static inline u16 get_unaligned_be16(const void *p)
82{ 79{
83 return be16_to_cpu(__get_unaligned_cpu16(p)); 80 return be16_to_cpu(sh4a_get_unaligned_cpu16(p));
84} 81}
85 82
86static inline u32 get_unaligned_be32(const void *p) 83static inline u32 get_unaligned_be32(const void *p)
87{ 84{
88 return be32_to_cpu(__get_unaligned_cpu32(p)); 85 return be32_to_cpu(sh4a_get_unaligned_cpu32(p));
89} 86}
90 87
91static inline u64 get_unaligned_be64(const void *p) 88static inline u64 get_unaligned_be64(const void *p)
92{ 89{
93 return be64_to_cpu(__get_unaligned_cpu64(p)); 90 return be64_to_cpu(sh4a_get_unaligned_cpu64(p));
94} 91}
95 92
96static inline void __put_le16_noalign(u8 *p, u16 val) 93static inline void nonnative_put_le16(u16 val, u8 *p)
97{ 94{
98 *p++ = val; 95 *p++ = val;
99 *p++ = val >> 8; 96 *p++ = val >> 8;
100} 97}
101 98
102static inline void __put_le32_noalign(u8 *p, u32 val) 99static inline void nonnative_put_le32(u32 val, u8 *p)
103{ 100{
104 __put_le16_noalign(p, val); 101 nonnative_put_le16(val, p);
105 __put_le16_noalign(p + 2, val >> 16); 102 nonnative_put_le16(val >> 16, p + 2);
106} 103}
107 104
108static inline void __put_le64_noalign(u8 *p, u64 val) 105static inline void nonnative_put_le64(u64 val, u8 *p)
109{ 106{
110 __put_le32_noalign(p, val); 107 nonnative_put_le32(val, p);
111 __put_le32_noalign(p + 4, val >> 32); 108 nonnative_put_le32(val >> 32, p + 4);
112} 109}
113 110
114static inline void __put_be16_noalign(u8 *p, u16 val) 111static inline void nonnative_put_be16(u16 val, u8 *p)
115{ 112{
116 *p++ = val >> 8; 113 *p++ = val >> 8;
117 *p++ = val; 114 *p++ = val;
118} 115}
119 116
120static inline void __put_be32_noalign(u8 *p, u32 val) 117static inline void nonnative_put_be32(u32 val, u8 *p)
121{ 118{
122 __put_be16_noalign(p, val >> 16); 119 nonnative_put_be16(val >> 16, p);
123 __put_be16_noalign(p + 2, val); 120 nonnative_put_be16(val, p + 2);
124} 121}
125 122
126static inline void __put_be64_noalign(u8 *p, u64 val) 123static inline void nonnative_put_be64(u64 val, u8 *p)
127{ 124{
128 __put_be32_noalign(p, val >> 32); 125 nonnative_put_be32(val >> 32, p);
129 __put_be32_noalign(p + 4, val); 126 nonnative_put_be32(val, p + 4);
130} 127}
131 128
132static inline void put_unaligned_le16(u16 val, void *p) 129static inline void put_unaligned_le16(u16 val, void *p)
133{ 130{
134#ifdef __LITTLE_ENDIAN 131#ifdef __LITTLE_ENDIAN
135 ((struct __una_u16 *)p)->x = val; 132 __put_unaligned_cpu16(val, p);
136#else 133#else
137 __put_le16_noalign(p, val); 134 nonnative_put_le16(val, p);
138#endif 135#endif
139} 136}
140 137
141static inline void put_unaligned_le32(u32 val, void *p) 138static inline void put_unaligned_le32(u32 val, void *p)
142{ 139{
143#ifdef __LITTLE_ENDIAN 140#ifdef __LITTLE_ENDIAN
144 ((struct __una_u32 *)p)->x = val; 141 __put_unaligned_cpu32(val, p);
145#else 142#else
146 __put_le32_noalign(p, val); 143 nonnative_put_le32(val, p);
147#endif 144#endif
148} 145}
149 146
150static inline void put_unaligned_le64(u64 val, void *p) 147static inline void put_unaligned_le64(u64 val, void *p)
151{ 148{
152#ifdef __LITTLE_ENDIAN 149#ifdef __LITTLE_ENDIAN
153 ((struct __una_u64 *)p)->x = val; 150 __put_unaligned_cpu64(val, p);
154#else 151#else
155 __put_le64_noalign(p, val); 152 nonnative_put_le64(val, p);
156#endif 153#endif
157} 154}
158 155
159static inline void put_unaligned_be16(u16 val, void *p) 156static inline void put_unaligned_be16(u16 val, void *p)
160{ 157{
161#ifdef __BIG_ENDIAN 158#ifdef __BIG_ENDIAN
162 ((struct __una_u16 *)p)->x = val; 159 __put_unaligned_cpu16(val, p);
163#else 160#else
164 __put_be16_noalign(p, val); 161 nonnative_put_be16(val, p);
165#endif 162#endif
166} 163}
167 164
168static inline void put_unaligned_be32(u32 val, void *p) 165static inline void put_unaligned_be32(u32 val, void *p)
169{ 166{
170#ifdef __BIG_ENDIAN 167#ifdef __BIG_ENDIAN
171 ((struct __una_u32 *)p)->x = val; 168 __put_unaligned_cpu32(val, p);
172#else 169#else
173 __put_be32_noalign(p, val); 170 nonnative_put_be32(val, p);
174#endif 171#endif
175} 172}
176 173
177static inline void put_unaligned_be64(u64 val, void *p) 174static inline void put_unaligned_be64(u64 val, void *p)
178{ 175{
179#ifdef __BIG_ENDIAN 176#ifdef __BIG_ENDIAN
180 ((struct __una_u64 *)p)->x = val; 177 __put_unaligned_cpu64(val, p);
181#else 178#else
182 __put_be64_noalign(p, val); 179 nonnative_put_be64(val, p);
183#endif 180#endif
184} 181}
185 182
186/* 183/*
187 * Cause a link-time error if we try an unaligned access other than 184 * While it's a bit non-obvious, even though the generic le/be wrappers
188 * 1,2,4 or 8 bytes long 185 * use the __get/put_xxx prefixing, they actually wrap in to the
186 * non-prefixed get/put_xxx variants as provided above.
189 */ 187 */
190extern void __bad_unaligned_access_size(void); 188#include <linux/unaligned/generic.h>
191
192#define __get_unaligned_le(ptr) ((__force typeof(*(ptr)))({ \
193 __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
194 __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_le16((ptr)), \
195 __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_le32((ptr)), \
196 __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_le64((ptr)), \
197 __bad_unaligned_access_size())))); \
198 }))
199
200#define __get_unaligned_be(ptr) ((__force typeof(*(ptr)))({ \
201 __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
202 __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_be16((ptr)), \
203 __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_be32((ptr)), \
204 __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_be64((ptr)), \
205 __bad_unaligned_access_size())))); \
206 }))
207
208#define __put_unaligned_le(val, ptr) ({ \
209 void *__gu_p = (ptr); \
210 switch (sizeof(*(ptr))) { \
211 case 1: \
212 *(u8 *)__gu_p = (__force u8)(val); \
213 break; \
214 case 2: \
215 put_unaligned_le16((__force u16)(val), __gu_p); \
216 break; \
217 case 4: \
218 put_unaligned_le32((__force u32)(val), __gu_p); \
219 break; \
220 case 8: \
221 put_unaligned_le64((__force u64)(val), __gu_p); \
222 break; \
223 default: \
224 __bad_unaligned_access_size(); \
225 break; \
226 } \
227 (void)0; })
228
229#define __put_unaligned_be(val, ptr) ({ \
230 void *__gu_p = (ptr); \
231 switch (sizeof(*(ptr))) { \
232 case 1: \
233 *(u8 *)__gu_p = (__force u8)(val); \
234 break; \
235 case 2: \
236 put_unaligned_be16((__force u16)(val), __gu_p); \
237 break; \
238 case 4: \
239 put_unaligned_be32((__force u32)(val), __gu_p); \
240 break; \
241 case 8: \
242 put_unaligned_be64((__force u64)(val), __gu_p); \
243 break; \
244 default: \
245 __bad_unaligned_access_size(); \
246 break; \
247 } \
248 (void)0; })
249 189
250#ifdef __LITTLE_ENDIAN 190#ifdef __LITTLE_ENDIAN
251# define get_unaligned __get_unaligned_le 191# define get_unaligned __get_unaligned_le
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index 903cd618eb74..d6741fca89a4 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -368,8 +368,9 @@
368#define __NR_sendmsg 355 368#define __NR_sendmsg 355
369#define __NR_recvmsg 356 369#define __NR_recvmsg 356
370#define __NR_recvmmsg 357 370#define __NR_recvmmsg 357
371#define __NR_accept4 358
371 372
372#define NR_syscalls 358 373#define NR_syscalls 359
373 374
374#ifdef __KERNEL__ 375#ifdef __KERNEL__
375 376
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h
index 4c27b68789b3..7eb435999426 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7724.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h
@@ -303,4 +303,7 @@ enum {
303 SHDMA_SLAVE_SDHI1_RX, 303 SHDMA_SLAVE_SDHI1_RX,
304}; 304};
305 305
306extern struct clk sh7724_fsimcka_clk;
307extern struct clk sh7724_fsimckb_clk;
308
306#endif /* __ASM_SH7724_H__ */ 309#endif /* __ASM_SH7724_H__ */
diff --git a/arch/sh/include/mach-landisk/mach/iodata_landisk.h b/arch/sh/include/mach-landisk/mach/iodata_landisk.h
index 6fb04ab38b9f..f432773a9571 100644
--- a/arch/sh/include/mach-landisk/mach/iodata_landisk.h
+++ b/arch/sh/include/mach-landisk/mach/iodata_landisk.h
@@ -2,7 +2,7 @@
2#define __ASM_SH_IODATA_LANDISK_H 2#define __ASM_SH_IODATA_LANDISK_H
3 3
4/* 4/*
5 * linux/include/asm-sh/landisk/iodata_landisk.h 5 * arch/sh/include/mach-landisk/mach/iodata_landisk.h
6 * 6 *
7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd. 7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd.
8 * 8 *
@@ -27,7 +27,7 @@
27 27
28#define IRQ_PCIINTA 5 /* PCI INTA IRQ */ 28#define IRQ_PCIINTA 5 /* PCI INTA IRQ */
29#define IRQ_PCIINTB 6 /* PCI INTB IRQ */ 29#define IRQ_PCIINTB 6 /* PCI INTB IRQ */
30#define IRQ_PCIINDC 7 /* PCI INTC IRQ */ 30#define IRQ_PCIINTC 7 /* PCI INTC IRQ */
31#define IRQ_PCIINTD 8 /* PCI INTD IRQ */ 31#define IRQ_PCIINTD 8 /* PCI INTD IRQ */
32#define IRQ_ATA 9 /* ATA IRQ */ 32#define IRQ_ATA 9 /* ATA IRQ */
33#define IRQ_FATA 10 /* FATA IRQ */ 33#define IRQ_FATA 10 /* FATA IRQ */
@@ -35,6 +35,8 @@
35#define IRQ_BUTTON 12 /* USL-5P Button IRQ */ 35#define IRQ_BUTTON 12 /* USL-5P Button IRQ */
36#define IRQ_FAULT 13 /* USL-5P Fault IRQ */ 36#define IRQ_FAULT 13 /* USL-5P Fault IRQ */
37 37
38void init_landisk_IRQ(void);
39
38#define __IO_PREFIX landisk 40#define __IO_PREFIX landisk
39#include <asm/io_generic.h> 41#include <asm/io_generic.h>
40 42
diff --git a/arch/sh/include/mach-sdk7786/mach/fpga.h b/arch/sh/include/mach-sdk7786/mach/fpga.h
index 40f0c2d3690c..a9cdac469927 100644
--- a/arch/sh/include/mach-sdk7786/mach/fpga.h
+++ b/arch/sh/include/mach-sdk7786/mach/fpga.h
@@ -14,11 +14,16 @@
14#define INTTESTR 0x040 14#define INTTESTR 0x040
15#define SYSSR 0x050 15#define SYSSR 0x050
16#define NRGPR 0x060 16#define NRGPR 0x060
17
17#define NMISR 0x070 18#define NMISR 0x070
19#define NMISR_MAN_NMI BIT(0)
20#define NMISR_AUX_NMI BIT(1)
21#define NMISR_MASK (NMISR_MAN_NMI | NMISR_AUX_NMI)
18 22
19#define NMIMR 0x080 23#define NMIMR 0x080
20#define NMIMR_MAN_NMIM BIT(0) /* Manual NMI mask */ 24#define NMIMR_MAN_NMIM BIT(0) /* Manual NMI mask */
21#define NMIMR_AUX_NMIM BIT(1) /* Auxiliary NMI mask */ 25#define NMIMR_AUX_NMIM BIT(1) /* Auxiliary NMI mask */
26#define NMIMR_MASK (NMIMR_MAN_NMIM | NMIMR_AUX_NMIM)
22 27
23#define INTBSR 0x090 28#define INTBSR 0x090
24#define INTBMR 0x0a0 29#define INTBMR 0x0a0
@@ -126,6 +131,9 @@
126extern void __iomem *sdk7786_fpga_base; 131extern void __iomem *sdk7786_fpga_base;
127extern void sdk7786_fpga_init(void); 132extern void sdk7786_fpga_init(void);
128 133
134/* arch/sh/boards/mach-sdk7786/nmi.c */
135extern void sdk7786_nmi_init(void);
136
129#define SDK7786_FPGA_REGADDR(reg) (sdk7786_fpga_base + (reg)) 137#define SDK7786_FPGA_REGADDR(reg) (sdk7786_fpga_base + (reg))
130 138
131/* 139/*
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index 8eed6a485446..77f7ae1d4647 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -11,7 +11,7 @@ endif
11 11
12CFLAGS_REMOVE_return_address.o = -pg 12CFLAGS_REMOVE_return_address.o = -pg
13 13
14obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \ 14obj-y := debugtraps.o dma-nommu.o dumpstack.o \
15 idle.o io.o irq.o irq_$(BITS).o kdebugfs.o \ 15 idle.o io.o irq.o irq_$(BITS).o kdebugfs.o \
16 machvec.o nmi_debug.o process.o \ 16 machvec.o nmi_debug.o process.o \
17 process_$(BITS).o ptrace.o ptrace_$(BITS).o \ 17 process_$(BITS).o ptrace.o ptrace_$(BITS).o \
@@ -20,6 +20,11 @@ obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \
20 syscalls_$(BITS).o time.o topology.o traps.o \ 20 syscalls_$(BITS).o time.o topology.o traps.o \
21 traps_$(BITS).o unwinder.o 21 traps_$(BITS).o unwinder.o
22 22
23ifndef CONFIG_GENERIC_IOMAP
24obj-y += iomap.o
25obj-$(CONFIG_HAS_IOPORT) += ioport.o
26endif
27
23obj-y += cpu/ 28obj-y += cpu/
24obj-$(CONFIG_VSYSCALL) += vsyscall/ 29obj-$(CONFIG_VSYSCALL) += vsyscall/
25obj-$(CONFIG_SMP) += smp.o 30obj-$(CONFIG_SMP) += smp.o
@@ -39,7 +44,6 @@ obj-$(CONFIG_DUMP_CODE) += disassemble.o
39obj-$(CONFIG_HIBERNATION) += swsusp.o 44obj-$(CONFIG_HIBERNATION) += swsusp.o
40obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o 45obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
41obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o 46obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
42obj-$(CONFIG_HAS_IOPORT) += io_generic.o
43 47
44obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o 48obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
45obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o 49obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o
diff --git a/arch/sh/kernel/clkdev.c b/arch/sh/kernel/clkdev.c
deleted file mode 100644
index 1f800ef4a735..000000000000
--- a/arch/sh/kernel/clkdev.c
+++ /dev/null
@@ -1,171 +0,0 @@
1/*
2 * arch/sh/kernel/clkdev.c
3 *
4 * Cloned from arch/arm/common/clkdev.c:
5 *
6 * Copyright (C) 2008 Russell King.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Helper for the clk API to assist looking up a struct clk.
13 */
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/device.h>
17#include <linux/list.h>
18#include <linux/errno.h>
19#include <linux/err.h>
20#include <linux/string.h>
21#include <linux/mutex.h>
22#include <linux/clk.h>
23#include <linux/slab.h>
24#include <linux/bootmem.h>
25#include <linux/mm.h>
26#include <asm/clock.h>
27#include <asm/clkdev.h>
28
29static LIST_HEAD(clocks);
30static DEFINE_MUTEX(clocks_mutex);
31
32/*
33 * Find the correct struct clk for the device and connection ID.
34 * We do slightly fuzzy matching here:
35 * An entry with a NULL ID is assumed to be a wildcard.
36 * If an entry has a device ID, it must match
37 * If an entry has a connection ID, it must match
38 * Then we take the most specific entry - with the following
39 * order of precedence: dev+con > dev only > con only.
40 */
41static struct clk *clk_find(const char *dev_id, const char *con_id)
42{
43 struct clk_lookup *p;
44 struct clk *clk = NULL;
45 int match, best = 0;
46
47 list_for_each_entry(p, &clocks, node) {
48 match = 0;
49 if (p->dev_id) {
50 if (!dev_id || strcmp(p->dev_id, dev_id))
51 continue;
52 match += 2;
53 }
54 if (p->con_id) {
55 if (!con_id || strcmp(p->con_id, con_id))
56 continue;
57 match += 1;
58 }
59 if (match == 0)
60 continue;
61
62 if (match > best) {
63 clk = p->clk;
64 best = match;
65 }
66 }
67 return clk;
68}
69
70struct clk *clk_get_sys(const char *dev_id, const char *con_id)
71{
72 struct clk *clk;
73
74 mutex_lock(&clocks_mutex);
75 clk = clk_find(dev_id, con_id);
76 mutex_unlock(&clocks_mutex);
77
78 return clk ? clk : ERR_PTR(-ENOENT);
79}
80EXPORT_SYMBOL(clk_get_sys);
81
82void clkdev_add(struct clk_lookup *cl)
83{
84 mutex_lock(&clocks_mutex);
85 list_add_tail(&cl->node, &clocks);
86 mutex_unlock(&clocks_mutex);
87}
88EXPORT_SYMBOL(clkdev_add);
89
90void __init clkdev_add_table(struct clk_lookup *cl, size_t num)
91{
92 mutex_lock(&clocks_mutex);
93 while (num--) {
94 list_add_tail(&cl->node, &clocks);
95 cl++;
96 }
97 mutex_unlock(&clocks_mutex);
98}
99
100#define MAX_DEV_ID 20
101#define MAX_CON_ID 16
102
103struct clk_lookup_alloc {
104 struct clk_lookup cl;
105 char dev_id[MAX_DEV_ID];
106 char con_id[MAX_CON_ID];
107};
108
109struct clk_lookup * __init_refok
110clkdev_alloc(struct clk *clk, const char *con_id, const char *dev_fmt, ...)
111{
112 struct clk_lookup_alloc *cla;
113
114 if (!slab_is_available())
115 cla = alloc_bootmem_low_pages(sizeof(*cla));
116 else
117 cla = kzalloc(sizeof(*cla), GFP_KERNEL);
118
119 if (!cla)
120 return NULL;
121
122 cla->cl.clk = clk;
123 if (con_id) {
124 strlcpy(cla->con_id, con_id, sizeof(cla->con_id));
125 cla->cl.con_id = cla->con_id;
126 }
127
128 if (dev_fmt) {
129 va_list ap;
130
131 va_start(ap, dev_fmt);
132 vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap);
133 cla->cl.dev_id = cla->dev_id;
134 va_end(ap);
135 }
136
137 return &cla->cl;
138}
139EXPORT_SYMBOL(clkdev_alloc);
140
141int clk_add_alias(const char *alias, const char *alias_dev_name, char *id,
142 struct device *dev)
143{
144 struct clk *r = clk_get(dev, id);
145 struct clk_lookup *l;
146
147 if (IS_ERR(r))
148 return PTR_ERR(r);
149
150 l = clkdev_alloc(r, alias, alias_dev_name);
151 clk_put(r);
152 if (!l)
153 return -ENODEV;
154 clkdev_add(l);
155 return 0;
156}
157EXPORT_SYMBOL(clk_add_alias);
158
159/*
160 * clkdev_drop - remove a clock dynamically allocated
161 */
162void clkdev_drop(struct clk_lookup *cl)
163{
164 struct clk_lookup_alloc *cla = container_of(cl, struct clk_lookup_alloc, cl);
165
166 mutex_lock(&clocks_mutex);
167 list_del(&cl->node);
168 mutex_unlock(&clocks_mutex);
169 kfree(cla);
170}
171EXPORT_SYMBOL(clkdev_drop);
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 4edcb60a1355..d49c2135fd48 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -20,4 +20,4 @@ obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
20obj-$(CONFIG_SH_FPU) += fpu.o 20obj-$(CONFIG_SH_FPU) += fpu.o
21obj-$(CONFIG_SH_FPU_EMU) += fpu.o 21obj-$(CONFIG_SH_FPU_EMU) += fpu.o
22 22
23obj-y += irq/ init.o clock.o hwblk.o 23obj-y += irq/ init.o clock.o hwblk.o proc.o
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index e2f63d68da51..dd0e0f211359 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -2,7 +2,7 @@
2#include <linux/compiler.h> 2#include <linux/compiler.h>
3#include <linux/slab.h> 3#include <linux/slab.h>
4#include <linux/io.h> 4#include <linux/io.h>
5#include <asm/clkdev.h> 5#include <linux/clkdev.h>
6#include <asm/clock.h> 6#include <asm/clock.h>
7 7
8static struct clk master_clk = { 8static struct clk master_clk = {
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 50f887dda565..4187cf4fe185 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -48,20 +48,4 @@ int __init clk_init(void)
48 return ret; 48 return ret;
49} 49}
50 50
51/*
52 * Returns a clock. Note that we first try to use device id on the bus
53 * and clock name. If this fails, we try to use clock name only.
54 */
55struct clk *clk_get(struct device *dev, const char *con_id)
56{
57 const char *dev_id = dev ? dev_name(dev) : NULL;
58
59 return clk_get_sys(dev_id, con_id);
60}
61EXPORT_SYMBOL_GPL(clk_get);
62
63void clk_put(struct clk *clk)
64{
65}
66EXPORT_SYMBOL_GPL(clk_put);
67 51
diff --git a/arch/sh/kernel/cpu/proc.c b/arch/sh/kernel/cpu/proc.c
new file mode 100644
index 000000000000..e80a936f409a
--- /dev/null
+++ b/arch/sh/kernel/cpu/proc.c
@@ -0,0 +1,148 @@
1#include <linux/seq_file.h>
2#include <linux/kernel.h>
3#include <linux/module.h>
4#include <asm/machvec.h>
5#include <asm/processor.h>
6
7static const char *cpu_name[] = {
8 [CPU_SH7201] = "SH7201",
9 [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263",
10 [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619",
11 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
12 [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
13 [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
14 [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720",
15 [CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729",
16 [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S",
17 [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751",
18 [CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760",
19 [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501",
20 [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770",
21 [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781",
22 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785",
23 [CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757",
24 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3",
25 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
26 [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723",
27 [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724",
28 [CPU_SH_NONE] = "Unknown"
29};
30
31const char *get_cpu_subtype(struct sh_cpuinfo *c)
32{
33 return cpu_name[c->type];
34}
35EXPORT_SYMBOL(get_cpu_subtype);
36
37#ifdef CONFIG_PROC_FS
38/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
39static const char *cpu_flags[] = {
40 "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
41 "ptea", "llsc", "l2", "op32", "pteaex", NULL
42};
43
44static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c)
45{
46 unsigned long i;
47
48 seq_printf(m, "cpu flags\t:");
49
50 if (!c->flags) {
51 seq_printf(m, " %s\n", cpu_flags[0]);
52 return;
53 }
54
55 for (i = 0; cpu_flags[i]; i++)
56 if ((c->flags & (1 << i)))
57 seq_printf(m, " %s", cpu_flags[i+1]);
58
59 seq_printf(m, "\n");
60}
61
62static void show_cacheinfo(struct seq_file *m, const char *type,
63 struct cache_info info)
64{
65 unsigned int cache_size;
66
67 cache_size = info.ways * info.sets * info.linesz;
68
69 seq_printf(m, "%s size\t: %2dKiB (%d-way)\n",
70 type, cache_size >> 10, info.ways);
71}
72
73/*
74 * Get CPU information for use by the procfs.
75 */
76static int show_cpuinfo(struct seq_file *m, void *v)
77{
78 struct sh_cpuinfo *c = v;
79 unsigned int cpu = c - cpu_data;
80
81 if (!cpu_online(cpu))
82 return 0;
83
84 if (cpu == 0)
85 seq_printf(m, "machine\t\t: %s\n", get_system_type());
86 else
87 seq_printf(m, "\n");
88
89 seq_printf(m, "processor\t: %d\n", cpu);
90 seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine);
91 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c));
92 if (c->cut_major == -1)
93 seq_printf(m, "cut\t\t: unknown\n");
94 else if (c->cut_minor == -1)
95 seq_printf(m, "cut\t\t: %d.x\n", c->cut_major);
96 else
97 seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor);
98
99 show_cpuflags(m, c);
100
101 seq_printf(m, "cache type\t: ");
102
103 /*
104 * Check for what type of cache we have, we support both the
105 * unified cache on the SH-2 and SH-3, as well as the harvard
106 * style cache on the SH-4.
107 */
108 if (c->icache.flags & SH_CACHE_COMBINED) {
109 seq_printf(m, "unified\n");
110 show_cacheinfo(m, "cache", c->icache);
111 } else {
112 seq_printf(m, "split (harvard)\n");
113 show_cacheinfo(m, "icache", c->icache);
114 show_cacheinfo(m, "dcache", c->dcache);
115 }
116
117 /* Optional secondary cache */
118 if (c->flags & CPU_HAS_L2_CACHE)
119 show_cacheinfo(m, "scache", c->scache);
120
121 seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits);
122
123 seq_printf(m, "bogomips\t: %lu.%02lu\n",
124 c->loops_per_jiffy/(500000/HZ),
125 (c->loops_per_jiffy/(5000/HZ)) % 100);
126
127 return 0;
128}
129
130static void *c_start(struct seq_file *m, loff_t *pos)
131{
132 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
133}
134static void *c_next(struct seq_file *m, void *v, loff_t *pos)
135{
136 ++*pos;
137 return c_start(m, pos);
138}
139static void c_stop(struct seq_file *m, void *v)
140{
141}
142const struct seq_operations cpuinfo_op = {
143 .start = c_start,
144 .next = c_next,
145 .stop = c_stop,
146 .show = show_cpuinfo,
147};
148#endif /* CONFIG_PROC_FS */
diff --git a/arch/sh/kernel/cpu/sh2/clock-sh7619.c b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
index 0c9f24d7a02f..5b7f12e58a8d 100644
--- a/arch/sh/kernel/cpu/sh2/clock-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
@@ -14,24 +14,18 @@
14 */ 14 */
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/io.h>
17#include <asm/clock.h> 18#include <asm/clock.h>
18#include <asm/freq.h> 19#include <asm/freq.h>
19#include <asm/io.h> 20#include <asm/processor.h>
20 21
21static const int pll1rate[] = {1,2}; 22static const int pll1rate[] = {1,2};
22static const int pfc_divisors[] = {1,2,0,4}; 23static const int pfc_divisors[] = {1,2,0,4};
23 24static unsigned int pll2_mult;
24#if (CONFIG_SH_CLK_MD == 1) || (CONFIG_SH_CLK_MD == 2)
25#define PLL2 (4)
26#elif (CONFIG_SH_CLK_MD == 5) || (CONFIG_SH_CLK_MD == 6)
27#define PLL2 (2)
28#else
29#error "Illigal Clock Mode!"
30#endif
31 25
32static void master_clk_init(struct clk *clk) 26static void master_clk_init(struct clk *clk)
33{ 27{
34 clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; 28 clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
35} 29}
36 30
37static struct clk_ops sh7619_master_clk_ops = { 31static struct clk_ops sh7619_master_clk_ops = {
@@ -70,6 +64,14 @@ static struct clk_ops *sh7619_clk_ops[] = {
70 64
71void __init arch_init_clk_ops(struct clk_ops **ops, int idx) 65void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
72{ 66{
67 if (test_mode_pin(MODE_PIN2 | MODE_PIN0) ||
68 test_mode_pin(MODE_PIN2 | MODE_PIN1))
69 pll2_mult = 2;
70 else if (test_mode_pin(MODE_PIN0) || test_mode_pin(MODE_PIN1))
71 pll2_mult = 4;
72
73 BUG_ON(!pll2_mult);
74
73 if (idx < ARRAY_SIZE(sh7619_clk_ops)) 75 if (idx < ARRAY_SIZE(sh7619_clk_ops))
74 *ops = sh7619_clk_ops[idx]; 76 *ops = sh7619_clk_ops[idx];
75} 77}
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
index b26264dc2aef..1174e2d96c03 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -22,19 +22,12 @@ static const int pll1rate[]={1,2,3,4,6,8};
22static const int pfc_divisors[]={1,2,3,4,6,8,12}; 22static const int pfc_divisors[]={1,2,3,4,6,8,12};
23#define ifc_divisors pfc_divisors 23#define ifc_divisors pfc_divisors
24 24
25#if (CONFIG_SH_CLK_MD == 0) 25static unsigned int pll2_mult;
26#define PLL2 (4)
27#elif (CONFIG_SH_CLK_MD == 2)
28#define PLL2 (2)
29#elif (CONFIG_SH_CLK_MD == 3)
30#define PLL2 (1)
31#else
32#error "Illegal Clock Mode!"
33#endif
34 26
35static void master_clk_init(struct clk *clk) 27static void master_clk_init(struct clk *clk)
36{ 28{
37 return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; 29 clk->rate = 10000000 * pll2_mult *
30 pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
38} 31}
39 32
40static struct clk_ops sh7201_master_clk_ops = { 33static struct clk_ops sh7201_master_clk_ops = {
@@ -80,6 +73,13 @@ static struct clk_ops *sh7201_clk_ops[] = {
80 73
81void __init arch_init_clk_ops(struct clk_ops **ops, int idx) 74void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
82{ 75{
76 if (test_mode_pin(MODE_PIN1 | MODE_PIN0))
77 pll2_mult = 1;
78 else if (test_mode_pin(MODE_PIN1))
79 pll2_mult = 2;
80 else
81 pll2_mult = 4;
82
83 if (idx < ARRAY_SIZE(sh7201_clk_ops)) 83 if (idx < ARRAY_SIZE(sh7201_clk_ops))
84 *ops = sh7201_clk_ops[idx]; 84 *ops = sh7201_clk_ops[idx];
85} 85}
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
index 7e75d8f79502..95a008e8b735 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
@@ -25,21 +25,11 @@ static const int pll1rate[]={8,12,16,0};
25static const int pfc_divisors[]={1,2,3,4,6,8,12}; 25static const int pfc_divisors[]={1,2,3,4,6,8,12};
26#define ifc_divisors pfc_divisors 26#define ifc_divisors pfc_divisors
27 27
28#if (CONFIG_SH_CLK_MD == 0) 28static unsigned int pll2_mult;
29#define PLL2 (1)
30#elif (CONFIG_SH_CLK_MD == 1)
31#define PLL2 (2)
32#elif (CONFIG_SH_CLK_MD == 2)
33#define PLL2 (4)
34#elif (CONFIG_SH_CLK_MD == 3)
35#define PLL2 (4)
36#else
37#error "Illegal Clock Mode!"
38#endif
39 29
40static void master_clk_init(struct clk *clk) 30static void master_clk_init(struct clk *clk)
41{ 31{
42 clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * PLL2 ; 32 clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult;
43} 33}
44 34
45static struct clk_ops sh7203_master_clk_ops = { 35static struct clk_ops sh7203_master_clk_ops = {
@@ -79,6 +69,13 @@ static struct clk_ops *sh7203_clk_ops[] = {
79 69
80void __init arch_init_clk_ops(struct clk_ops **ops, int idx) 70void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
81{ 71{
72 if (test_mode_pin(MODE_PIN1))
73 pll2_mult = 4;
74 else if (test_mode_pin(MODE_PIN0))
75 pll2_mult = 2;
76 else
77 pll2_mult = 1;
78
82 if (idx < ARRAY_SIZE(sh7203_clk_ops)) 79 if (idx < ARRAY_SIZE(sh7203_clk_ops))
83 *ops = sh7203_clk_ops[idx]; 80 *ops = sh7203_clk_ops[idx];
84} 81}
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
index b27a5e2687ab..3c314d7cd6e6 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
@@ -22,19 +22,11 @@ static const int pll1rate[]={1,2,3,4,6,8};
22static const int pfc_divisors[]={1,2,3,4,6,8,12}; 22static const int pfc_divisors[]={1,2,3,4,6,8,12};
23#define ifc_divisors pfc_divisors 23#define ifc_divisors pfc_divisors
24 24
25#if (CONFIG_SH_CLK_MD == 2) 25static unsigned int pll2_mult;
26#define PLL2 (4)
27#elif (CONFIG_SH_CLK_MD == 6)
28#define PLL2 (2)
29#elif (CONFIG_SH_CLK_MD == 7)
30#define PLL2 (1)
31#else
32#error "Illigal Clock Mode!"
33#endif
34 26
35static void master_clk_init(struct clk *clk) 27static void master_clk_init(struct clk *clk)
36{ 28{
37 clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; 29 clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
38} 30}
39 31
40static struct clk_ops sh7206_master_clk_ops = { 32static struct clk_ops sh7206_master_clk_ops = {
@@ -79,7 +71,13 @@ static struct clk_ops *sh7206_clk_ops[] = {
79 71
80void __init arch_init_clk_ops(struct clk_ops **ops, int idx) 72void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
81{ 73{
74 if (test_mode_pin(MODE_PIN2 | MODE_PIN1 | MODE_PIN0))
75 pll2_mult = 1;
76 else if (test_mode_pin(MODE_PIN2 | MODE_PIN1))
77 pll2_mult = 2;
78 else if (test_mode_pin(MODE_PIN1))
79 pll2_mult = 4;
80
82 if (idx < ARRAY_SIZE(sh7206_clk_ops)) 81 if (idx < ARRAY_SIZE(sh7206_clk_ops))
83 *ops = sh7206_clk_ops[idx]; 82 *ops = sh7206_clk_ops[idx];
84} 83}
85
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 4eabc68cd753..3f6f8e98635c 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -13,7 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/err.h> 14#include <linux/err.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <asm/clkdev.h> 16#include <linux/clkdev.h>
17#include <asm/clock.h> 17#include <asm/clock.h>
18#include <asm/freq.h> 18#include <asm/freq.h>
19 19
@@ -81,8 +81,7 @@ static void shoc_clk_init(struct clk *clk)
81 for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) { 81 for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) {
82 int divisor = frqcr3_divisors[i]; 82 int divisor = frqcr3_divisors[i];
83 83
84 if (clk->ops->set_rate(clk, clk->parent->rate / 84 if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0)
85 divisor, 0) == 0)
86 break; 85 break;
87 } 86 }
88 87
@@ -110,7 +109,7 @@ static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate)
110 return 0; 109 return 0;
111} 110}
112 111
113static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id) 112static int shoc_clk_set_rate(struct clk *clk, unsigned long rate)
114{ 113{
115 unsigned long frqcr3; 114 unsigned long frqcr3;
116 unsigned int tmp; 115 unsigned int tmp;
diff --git a/arch/sh/kernel/cpu/sh4/perf_event.c b/arch/sh/kernel/cpu/sh4/perf_event.c
index dbf3b4bb71fe..748955df018d 100644
--- a/arch/sh/kernel/cpu/sh4/perf_event.c
+++ b/arch/sh/kernel/cpu/sh4/perf_event.c
@@ -250,4 +250,4 @@ static int __init sh7750_pmu_init(void)
250 250
251 return register_sh_pmu(&sh7750_pmu); 251 return register_sh_pmu(&sh7750_pmu);
252} 252}
253arch_initcall(sh7750_pmu_init); 253early_initcall(sh7750_pmu_init);
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index b93458f33b74..b1edc90d482b 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -151,6 +151,7 @@ void __cpuinit cpu_probe(void)
151 boot_cpu_data.flags |= CPU_HAS_L2_CACHE; 151 boot_cpu_data.flags |= CPU_HAS_L2_CACHE;
152 break; 152 break;
153 case 0x10: 153 case 0x10:
154 case 0x11:
154 boot_cpu_data.type = CPU_SH7757; 155 boot_cpu_data.type = CPU_SH7757;
155 break; 156 break;
156 } 157 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index 71291ae201b9..93c646072c1b 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -21,7 +21,7 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/clkdev.h> 24#include <linux/clkdev.h>
25#include <asm/clock.h> 25#include <asm/clock.h>
26 26
27/* SH7343 registers */ 27/* SH7343 registers */
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index 7ce5bbcd4084..049dc0628ccc 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -21,7 +21,7 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/clkdev.h> 24#include <linux/clkdev.h>
25#include <asm/clock.h> 25#include <asm/clock.h>
26 26
27/* SH7366 registers */ 27/* SH7366 registers */
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 2030f3d9fac7..9d23a36f0647 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -21,7 +21,7 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/clkdev.h> 24#include <linux/clkdev.h>
25#include <asm/clock.h> 25#include <asm/clock.h>
26#include <asm/hwblk.h> 26#include <asm/hwblk.h>
27#include <cpu/sh7722.h> 27#include <cpu/sh7722.h>
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index d3938f0d3702..55493cd5bd8f 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -22,7 +22,7 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <asm/clkdev.h> 25#include <linux/clkdev.h>
26#include <asm/clock.h> 26#include <asm/clock.h>
27#include <asm/hwblk.h> 27#include <asm/hwblk.h>
28#include <cpu/sh7723.h> 28#include <cpu/sh7723.h>
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 0fe2e9329cb2..d08fa953c88b 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -22,7 +22,7 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <asm/clkdev.h> 25#include <linux/clkdev.h>
26#include <asm/clock.h> 26#include <asm/clock.h>
27#include <asm/hwblk.h> 27#include <asm/hwblk.h>
28#include <cpu/sh7724.h> 28#include <cpu/sh7724.h>
@@ -111,12 +111,21 @@ static struct clk div3_clk = {
111 .parent = &pll_clk, 111 .parent = &pll_clk,
112}; 112};
113 113
114/* External input clock (pin name: FSIMCKA/FSIMCKB ) */
115struct clk sh7724_fsimcka_clk = {
116};
117
118struct clk sh7724_fsimckb_clk = {
119};
120
114static struct clk *main_clks[] = { 121static struct clk *main_clks[] = {
115 &r_clk, 122 &r_clk,
116 &extal_clk, 123 &extal_clk,
117 &fll_clk, 124 &fll_clk,
118 &pll_clk, 125 &pll_clk,
119 &div3_clk, 126 &div3_clk,
127 &sh7724_fsimcka_clk,
128 &sh7724_fsimckb_clk,
120}; 129};
121 130
122static void div4_kick(struct clk *clk) 131static void div4_kick(struct clk *clk)
@@ -154,16 +163,38 @@ struct clk div4_clks[DIV4_NR] = {
154 [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), 163 [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
155}; 164};
156 165
157enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR }; 166enum { DIV6_V, DIV6_I, DIV6_S, DIV6_NR };
158 167
159static struct clk div6_clks[DIV6_NR] = { 168static struct clk div6_clks[DIV6_NR] = {
160 [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0), 169 [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
161 [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0),
162 [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0),
163 [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0), 170 [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
164 [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT), 171 [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
165}; 172};
166 173
174enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR };
175
176/* Indices are important - they are the actual src selecting values */
177static struct clk *fclkacr_parent[] = {
178 [0] = &div3_clk,
179 [1] = NULL,
180 [2] = &sh7724_fsimcka_clk,
181 [3] = NULL,
182};
183
184static struct clk *fclkbcr_parent[] = {
185 [0] = &div3_clk,
186 [1] = NULL,
187 [2] = &sh7724_fsimckb_clk,
188 [3] = NULL,
189};
190
191static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
192 [DIV6_FA] = SH_CLK_DIV6_EXT(&div3_clk, FCLKACR, 0,
193 fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2),
194 [DIV6_FB] = SH_CLK_DIV6_EXT(&div3_clk, FCLKBCR, 0,
195 fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2),
196};
197
167static struct clk mstp_clks[HWBLK_NR] = { 198static struct clk mstp_clks[HWBLK_NR] = {
168 SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), 199 SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
169 SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), 200 SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
@@ -240,8 +271,8 @@ static struct clk_lookup lookups[] = {
240 271
241 /* DIV6 clocks */ 272 /* DIV6 clocks */
242 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), 273 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
243 CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]), 274 CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FA]),
244 CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]), 275 CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FB]),
245 CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]), 276 CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]),
246 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]), 277 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
247 278
@@ -376,6 +407,9 @@ int __init arch_clk_init(void)
376 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 407 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
377 408
378 if (!ret) 409 if (!ret)
410 ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR);
411
412 if (!ret)
379 ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); 413 ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
380 414
381 return ret; 415 return ret;
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index ce39a2ae8c6c..e073e3eb4c3d 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <asm/clkdev.h> 15#include <linux/clkdev.h>
16#include <asm/clock.h> 16#include <asm/clock.h>
17#include <asm/freq.h> 17#include <asm/freq.h>
18 18
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 1f1df48008cd..599630fc4d3b 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -13,7 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <asm/clkdev.h> 16#include <linux/clkdev.h>
17#include <asm/clock.h> 17#include <asm/clock.h>
18#include <asm/freq.h> 18#include <asm/freq.h>
19#include <asm/io.h> 19#include <asm/io.h>
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index 62d706350060..8894926479a6 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <asm/clkdev.h> 15#include <linux/clkdev.h>
16#include <asm/clock.h> 16#include <asm/clock.h>
17#include <asm/freq.h> 17#include <asm/freq.h>
18#include <asm/io.h> 18#include <asm/io.h>
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index c3e458aaa2b7..2d960247f3eb 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -14,7 +14,7 @@
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/cpufreq.h> 16#include <linux/cpufreq.h>
17#include <asm/clkdev.h> 17#include <linux/clkdev.h>
18#include <asm/clock.h> 18#include <asm/clock.h>
19#include <asm/freq.h> 19#include <asm/freq.h>
20#include <cpu/sh7785.h> 20#include <cpu/sh7785.h>
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index 597c9fbe49c6..42e403be9076 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -13,7 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <asm/clkdev.h> 16#include <linux/clkdev.h>
17#include <asm/clock.h> 17#include <asm/clock.h>
18#include <asm/freq.h> 18#include <asm/freq.h>
19 19
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index 4f70df6b6169..1afdb93b8ccb 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -14,7 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <asm/clkdev.h> 17#include <linux/clkdev.h>
18#include <asm/clock.h> 18#include <asm/clock.h>
19#include <asm/freq.h> 19#include <asm/freq.h>
20 20
diff --git a/arch/sh/kernel/cpu/sh4a/perf_event.c b/arch/sh/kernel/cpu/sh4a/perf_event.c
index 580276525731..17e6bebfede0 100644
--- a/arch/sh/kernel/cpu/sh4a/perf_event.c
+++ b/arch/sh/kernel/cpu/sh4a/perf_event.c
@@ -284,4 +284,4 @@ static int __init sh4a_pmu_init(void)
284 284
285 return register_sh_pmu(&sh4a_pmu); 285 return register_sh_pmu(&sh4a_pmu);
286} 286}
287arch_initcall(sh4a_pmu_init); 287early_initcall(sh4a_pmu_init);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index c016c0004714..0170dbda1d00 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -522,10 +522,37 @@ static struct platform_device dma0_device = {
522 }, 522 },
523}; 523};
524 524
525#define USB_EHCI_START 0xffe70000
526#define USB_OHCI_START 0xffe70400
527
528static struct resource usb_ehci_resources[] = {
529 [0] = {
530 .start = USB_EHCI_START,
531 .end = USB_EHCI_START + 0x3ff,
532 .flags = IORESOURCE_MEM,
533 },
534 [1] = {
535 .start = 77,
536 .end = 77,
537 .flags = IORESOURCE_IRQ,
538 },
539};
540
541static struct platform_device usb_ehci_device = {
542 .name = "sh_ehci",
543 .id = -1,
544 .dev = {
545 .dma_mask = &usb_ehci_device.dev.coherent_dma_mask,
546 .coherent_dma_mask = DMA_BIT_MASK(32),
547 },
548 .num_resources = ARRAY_SIZE(usb_ehci_resources),
549 .resource = usb_ehci_resources,
550};
551
525static struct resource usb_ohci_resources[] = { 552static struct resource usb_ohci_resources[] = {
526 [0] = { 553 [0] = {
527 .start = 0xffe70400, 554 .start = USB_OHCI_START,
528 .end = 0xffe704ff, 555 .end = USB_OHCI_START + 0x3ff,
529 .flags = IORESOURCE_MEM, 556 .flags = IORESOURCE_MEM,
530 }, 557 },
531 [1] = { 558 [1] = {
@@ -535,12 +562,11 @@ static struct resource usb_ohci_resources[] = {
535 }, 562 },
536}; 563};
537 564
538static u64 usb_ohci_dma_mask = DMA_BIT_MASK(32);
539static struct platform_device usb_ohci_device = { 565static struct platform_device usb_ohci_device = {
540 .name = "sh_ohci", 566 .name = "sh_ohci",
541 .id = -1, 567 .id = -1,
542 .dev = { 568 .dev = {
543 .dma_mask = &usb_ohci_dma_mask, 569 .dma_mask = &usb_ohci_device.dev.coherent_dma_mask,
544 .coherent_dma_mask = DMA_BIT_MASK(32), 570 .coherent_dma_mask = DMA_BIT_MASK(32),
545 }, 571 },
546 .num_resources = ARRAY_SIZE(usb_ohci_resources), 572 .num_resources = ARRAY_SIZE(usb_ohci_resources),
@@ -570,6 +596,7 @@ static struct platform_device *sh7786_early_devices[] __initdata = {
570 596
571static struct platform_device *sh7786_devices[] __initdata = { 597static struct platform_device *sh7786_devices[] __initdata = {
572 &dma0_device, 598 &dma0_device,
599 &usb_ehci_device,
573 &usb_ohci_device, 600 &usb_ohci_device,
574}; 601};
575 602
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c
deleted file mode 100644
index 447d78f666f9..000000000000
--- a/arch/sh/kernel/io_generic.c
+++ /dev/null
@@ -1,180 +0,0 @@
1/*
2 * arch/sh/kernel/io_generic.c
3 *
4 * Copyright (C) 2000 Niibe Yutaka
5 * Copyright (C) 2005 - 2007 Paul Mundt
6 *
7 * Generic I/O routine. These can be used where a machine specific version
8 * is not required.
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <linux/module.h>
15#include <linux/io.h>
16#include <asm/machvec.h>
17
18#ifdef CONFIG_CPU_SH3
19/* SH3 has a PCMCIA bug that needs a dummy read from area 6 for a
20 * workaround. */
21/* I'm not sure SH7709 has this kind of bug */
22#define dummy_read() __raw_readb(0xba000000)
23#else
24#define dummy_read()
25#endif
26
27unsigned long generic_io_base = 0;
28
29u8 generic_inb(unsigned long port)
30{
31 return __raw_readb(__ioport_map(port, 1));
32}
33
34u16 generic_inw(unsigned long port)
35{
36 return __raw_readw(__ioport_map(port, 2));
37}
38
39u32 generic_inl(unsigned long port)
40{
41 return __raw_readl(__ioport_map(port, 4));
42}
43
44u8 generic_inb_p(unsigned long port)
45{
46 unsigned long v = generic_inb(port);
47
48 ctrl_delay();
49 return v;
50}
51
52u16 generic_inw_p(unsigned long port)
53{
54 unsigned long v = generic_inw(port);
55
56 ctrl_delay();
57 return v;
58}
59
60u32 generic_inl_p(unsigned long port)
61{
62 unsigned long v = generic_inl(port);
63
64 ctrl_delay();
65 return v;
66}
67
68/*
69 * insb/w/l all read a series of bytes/words/longs from a fixed port
70 * address. However as the port address doesn't change we only need to
71 * convert the port address to real address once.
72 */
73
74void generic_insb(unsigned long port, void *dst, unsigned long count)
75{
76 __raw_readsb(__ioport_map(port, 1), dst, count);
77 dummy_read();
78}
79
80void generic_insw(unsigned long port, void *dst, unsigned long count)
81{
82 __raw_readsw(__ioport_map(port, 2), dst, count);
83 dummy_read();
84}
85
86void generic_insl(unsigned long port, void *dst, unsigned long count)
87{
88 __raw_readsl(__ioport_map(port, 4), dst, count);
89 dummy_read();
90}
91
92void generic_outb(u8 b, unsigned long port)
93{
94 __raw_writeb(b, __ioport_map(port, 1));
95}
96
97void generic_outw(u16 b, unsigned long port)
98{
99 __raw_writew(b, __ioport_map(port, 2));
100}
101
102void generic_outl(u32 b, unsigned long port)
103{
104 __raw_writel(b, __ioport_map(port, 4));
105}
106
107void generic_outb_p(u8 b, unsigned long port)
108{
109 generic_outb(b, port);
110 ctrl_delay();
111}
112
113void generic_outw_p(u16 b, unsigned long port)
114{
115 generic_outw(b, port);
116 ctrl_delay();
117}
118
119void generic_outl_p(u32 b, unsigned long port)
120{
121 generic_outl(b, port);
122 ctrl_delay();
123}
124
125/*
126 * outsb/w/l all write a series of bytes/words/longs to a fixed port
127 * address. However as the port address doesn't change we only need to
128 * convert the port address to real address once.
129 */
130void generic_outsb(unsigned long port, const void *src, unsigned long count)
131{
132 __raw_writesb(__ioport_map(port, 1), src, count);
133 dummy_read();
134}
135
136void generic_outsw(unsigned long port, const void *src, unsigned long count)
137{
138 __raw_writesw(__ioport_map(port, 2), src, count);
139 dummy_read();
140}
141
142void generic_outsl(unsigned long port, const void *src, unsigned long count)
143{
144 __raw_writesl(__ioport_map(port, 4), src, count);
145 dummy_read();
146}
147
148void __iomem *generic_ioport_map(unsigned long addr, unsigned int size)
149{
150#ifdef P1SEG
151 if (PXSEG(addr) >= P1SEG)
152 return (void __iomem *)addr;
153#endif
154
155 return (void __iomem *)(addr + generic_io_base);
156}
157
158void generic_ioport_unmap(void __iomem *addr)
159{
160}
161
162#ifndef CONFIG_GENERIC_IOMAP
163void __iomem *ioport_map(unsigned long port, unsigned int nr)
164{
165 void __iomem *ret;
166
167 ret = __ioport_map_trapped(port, nr);
168 if (ret)
169 return ret;
170
171 return __ioport_map(port, nr);
172}
173EXPORT_SYMBOL(ioport_map);
174
175void ioport_unmap(void __iomem *addr)
176{
177 sh_mv.mv_ioport_unmap(addr);
178}
179EXPORT_SYMBOL(ioport_unmap);
180#endif /* CONFIG_GENERIC_IOMAP */
diff --git a/arch/sh/kernel/iomap.c b/arch/sh/kernel/iomap.c
new file mode 100644
index 000000000000..2e8e8b9b9cef
--- /dev/null
+++ b/arch/sh/kernel/iomap.c
@@ -0,0 +1,165 @@
1/*
2 * arch/sh/kernel/iomap.c
3 *
4 * Copyright (C) 2000 Niibe Yutaka
5 * Copyright (C) 2005 - 2007 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/module.h>
12#include <linux/io.h>
13
14unsigned int ioread8(void __iomem *addr)
15{
16 return readb(addr);
17}
18EXPORT_SYMBOL(ioread8);
19
20unsigned int ioread16(void __iomem *addr)
21{
22 return readw(addr);
23}
24EXPORT_SYMBOL(ioread16);
25
26unsigned int ioread16be(void __iomem *addr)
27{
28 return be16_to_cpu(__raw_readw(addr));
29}
30EXPORT_SYMBOL(ioread16be);
31
32unsigned int ioread32(void __iomem *addr)
33{
34 return readl(addr);
35}
36EXPORT_SYMBOL(ioread32);
37
38unsigned int ioread32be(void __iomem *addr)
39{
40 return be32_to_cpu(__raw_readl(addr));
41}
42EXPORT_SYMBOL(ioread32be);
43
44void iowrite8(u8 val, void __iomem *addr)
45{
46 writeb(val, addr);
47}
48EXPORT_SYMBOL(iowrite8);
49
50void iowrite16(u16 val, void __iomem *addr)
51{
52 writew(val, addr);
53}
54EXPORT_SYMBOL(iowrite16);
55
56void iowrite16be(u16 val, void __iomem *addr)
57{
58 __raw_writew(cpu_to_be16(val), addr);
59}
60EXPORT_SYMBOL(iowrite16be);
61
62void iowrite32(u32 val, void __iomem *addr)
63{
64 writel(val, addr);
65}
66EXPORT_SYMBOL(iowrite32);
67
68void iowrite32be(u32 val, void __iomem *addr)
69{
70 __raw_writel(cpu_to_be32(val), addr);
71}
72EXPORT_SYMBOL(iowrite32be);
73
74/*
75 * These are the "repeat MMIO read/write" functions.
76 * Note the "__raw" accesses, since we don't want to
77 * convert to CPU byte order. We write in "IO byte
78 * order" (we also don't have IO barriers).
79 */
80static inline void mmio_insb(void __iomem *addr, u8 *dst, int count)
81{
82 while (--count >= 0) {
83 u8 data = __raw_readb(addr);
84 *dst = data;
85 dst++;
86 }
87}
88
89static inline void mmio_insw(void __iomem *addr, u16 *dst, int count)
90{
91 while (--count >= 0) {
92 u16 data = __raw_readw(addr);
93 *dst = data;
94 dst++;
95 }
96}
97
98static inline void mmio_insl(void __iomem *addr, u32 *dst, int count)
99{
100 while (--count >= 0) {
101 u32 data = __raw_readl(addr);
102 *dst = data;
103 dst++;
104 }
105}
106
107static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count)
108{
109 while (--count >= 0) {
110 __raw_writeb(*src, addr);
111 src++;
112 }
113}
114
115static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count)
116{
117 while (--count >= 0) {
118 __raw_writew(*src, addr);
119 src++;
120 }
121}
122
123static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count)
124{
125 while (--count >= 0) {
126 __raw_writel(*src, addr);
127 src++;
128 }
129}
130
131void ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
132{
133 mmio_insb(addr, dst, count);
134}
135EXPORT_SYMBOL(ioread8_rep);
136
137void ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
138{
139 mmio_insw(addr, dst, count);
140}
141EXPORT_SYMBOL(ioread16_rep);
142
143void ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
144{
145 mmio_insl(addr, dst, count);
146}
147EXPORT_SYMBOL(ioread32_rep);
148
149void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
150{
151 mmio_outsb(addr, src, count);
152}
153EXPORT_SYMBOL(iowrite8_rep);
154
155void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
156{
157 mmio_outsw(addr, src, count);
158}
159EXPORT_SYMBOL(iowrite16_rep);
160
161void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
162{
163 mmio_outsl(addr, src, count);
164}
165EXPORT_SYMBOL(iowrite32_rep);
diff --git a/arch/sh/kernel/ioport.c b/arch/sh/kernel/ioport.c
new file mode 100644
index 000000000000..e3ad6103e7c1
--- /dev/null
+++ b/arch/sh/kernel/ioport.c
@@ -0,0 +1,43 @@
1/*
2 * arch/sh/kernel/ioport.c
3 *
4 * Copyright (C) 2000 Niibe Yutaka
5 * Copyright (C) 2005 - 2007 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/module.h>
12#include <linux/io.h>
13
14const unsigned long sh_io_port_base __read_mostly = -1;
15EXPORT_SYMBOL(sh_io_port_base);
16
17void __iomem *__ioport_map(unsigned long addr, unsigned int size)
18{
19 if (sh_mv.mv_ioport_map)
20 return sh_mv.mv_ioport_map(addr, size);
21
22 return (void __iomem *)(addr + sh_io_port_base);
23}
24EXPORT_SYMBOL(__ioport_map);
25
26void __iomem *ioport_map(unsigned long port, unsigned int nr)
27{
28 void __iomem *ret;
29
30 ret = __ioport_map_trapped(port, nr);
31 if (ret)
32 return ret;
33
34 return __ioport_map(port, nr);
35}
36EXPORT_SYMBOL(ioport_map);
37
38void ioport_unmap(void __iomem *addr)
39{
40 if (sh_mv.mv_ioport_unmap)
41 sh_mv.mv_ioport_unmap(addr);
42}
43EXPORT_SYMBOL(ioport_unmap);
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c
index 9f9bb63616ad..3d722e49db08 100644
--- a/arch/sh/kernel/machvec.c
+++ b/arch/sh/kernel/machvec.c
@@ -118,28 +118,6 @@ void __init sh_mv_setup(void)
118 sh_mv.mv_##elem = generic_##elem; \ 118 sh_mv.mv_##elem = generic_##elem; \
119} while (0) 119} while (0)
120 120
121#ifdef CONFIG_HAS_IOPORT
122
123#ifdef P2SEG
124 __set_io_port_base(P2SEG);
125#else
126 __set_io_port_base(0);
127#endif
128
129 mv_set(inb); mv_set(inw); mv_set(inl);
130 mv_set(outb); mv_set(outw); mv_set(outl);
131
132 mv_set(inb_p); mv_set(inw_p); mv_set(inl_p);
133 mv_set(outb_p); mv_set(outw_p); mv_set(outl_p);
134
135 mv_set(insb); mv_set(insw); mv_set(insl);
136 mv_set(outsb); mv_set(outsw); mv_set(outsl);
137
138 mv_set(ioport_map);
139 mv_set(ioport_unmap);
140
141#endif
142
143 mv_set(irq_demux); 121 mv_set(irq_demux);
144 mv_set(mode_pins); 122 mv_set(mode_pins);
145 mv_set(mem_init); 123 mv_set(mem_init);
diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c
index 5a4b33435650..2ee21a47b5af 100644
--- a/arch/sh/kernel/perf_event.c
+++ b/arch/sh/kernel/perf_event.c
@@ -389,7 +389,7 @@ int __cpuinit register_sh_pmu(struct sh_pmu *_pmu)
389 389
390 WARN_ON(_pmu->num_events > MAX_HWEVENTS); 390 WARN_ON(_pmu->num_events > MAX_HWEVENTS);
391 391
392 perf_pmu_register(&pmu); 392 perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW);
393 perf_cpu_notifier(sh_pmu_notifier); 393 perf_cpu_notifier(sh_pmu_notifier);
394 return 0; 394 return 0;
395} 395}
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index d6b018c7ebdc..4f267160c515 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -12,7 +12,6 @@
12#include <linux/initrd.h> 12#include <linux/initrd.h>
13#include <linux/bootmem.h> 13#include <linux/bootmem.h>
14#include <linux/console.h> 14#include <linux/console.h>
15#include <linux/seq_file.h>
16#include <linux/root_dev.h> 15#include <linux/root_dev.h>
17#include <linux/utsname.h> 16#include <linux/utsname.h>
18#include <linux/nodemask.h> 17#include <linux/nodemask.h>
@@ -319,146 +318,3 @@ int test_mode_pin(int pin)
319{ 318{
320 return sh_mv.mv_mode_pins() & pin; 319 return sh_mv.mv_mode_pins() & pin;
321} 320}
322
323static const char *cpu_name[] = {
324 [CPU_SH7201] = "SH7201",
325 [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263",
326 [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619",
327 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
328 [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
329 [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
330 [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720",
331 [CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729",
332 [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S",
333 [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751",
334 [CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760",
335 [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501",
336 [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770",
337 [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781",
338 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785",
339 [CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757",
340 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3",
341 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
342 [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723",
343 [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724",
344 [CPU_SH_NONE] = "Unknown"
345};
346
347const char *get_cpu_subtype(struct sh_cpuinfo *c)
348{
349 return cpu_name[c->type];
350}
351EXPORT_SYMBOL(get_cpu_subtype);
352
353#ifdef CONFIG_PROC_FS
354/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
355static const char *cpu_flags[] = {
356 "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
357 "ptea", "llsc", "l2", "op32", "pteaex", NULL
358};
359
360static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c)
361{
362 unsigned long i;
363
364 seq_printf(m, "cpu flags\t:");
365
366 if (!c->flags) {
367 seq_printf(m, " %s\n", cpu_flags[0]);
368 return;
369 }
370
371 for (i = 0; cpu_flags[i]; i++)
372 if ((c->flags & (1 << i)))
373 seq_printf(m, " %s", cpu_flags[i+1]);
374
375 seq_printf(m, "\n");
376}
377
378static void show_cacheinfo(struct seq_file *m, const char *type,
379 struct cache_info info)
380{
381 unsigned int cache_size;
382
383 cache_size = info.ways * info.sets * info.linesz;
384
385 seq_printf(m, "%s size\t: %2dKiB (%d-way)\n",
386 type, cache_size >> 10, info.ways);
387}
388
389/*
390 * Get CPU information for use by the procfs.
391 */
392static int show_cpuinfo(struct seq_file *m, void *v)
393{
394 struct sh_cpuinfo *c = v;
395 unsigned int cpu = c - cpu_data;
396
397 if (!cpu_online(cpu))
398 return 0;
399
400 if (cpu == 0)
401 seq_printf(m, "machine\t\t: %s\n", get_system_type());
402 else
403 seq_printf(m, "\n");
404
405 seq_printf(m, "processor\t: %d\n", cpu);
406 seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine);
407 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c));
408 if (c->cut_major == -1)
409 seq_printf(m, "cut\t\t: unknown\n");
410 else if (c->cut_minor == -1)
411 seq_printf(m, "cut\t\t: %d.x\n", c->cut_major);
412 else
413 seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor);
414
415 show_cpuflags(m, c);
416
417 seq_printf(m, "cache type\t: ");
418
419 /*
420 * Check for what type of cache we have, we support both the
421 * unified cache on the SH-2 and SH-3, as well as the harvard
422 * style cache on the SH-4.
423 */
424 if (c->icache.flags & SH_CACHE_COMBINED) {
425 seq_printf(m, "unified\n");
426 show_cacheinfo(m, "cache", c->icache);
427 } else {
428 seq_printf(m, "split (harvard)\n");
429 show_cacheinfo(m, "icache", c->icache);
430 show_cacheinfo(m, "dcache", c->dcache);
431 }
432
433 /* Optional secondary cache */
434 if (c->flags & CPU_HAS_L2_CACHE)
435 show_cacheinfo(m, "scache", c->scache);
436
437 seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits);
438
439 seq_printf(m, "bogomips\t: %lu.%02lu\n",
440 c->loops_per_jiffy/(500000/HZ),
441 (c->loops_per_jiffy/(5000/HZ)) % 100);
442
443 return 0;
444}
445
446static void *c_start(struct seq_file *m, loff_t *pos)
447{
448 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
449}
450static void *c_next(struct seq_file *m, void *v, loff_t *pos)
451{
452 ++*pos;
453 return c_start(m, pos);
454}
455static void c_stop(struct seq_file *m, void *v)
456{
457}
458const struct seq_operations cpuinfo_op = {
459 .start = c_start,
460 .next = c_next,
461 .stop = c_stop,
462 .show = show_cpuinfo,
463};
464#endif /* CONFIG_PROC_FS */
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 81f58371613d..8c6a350df751 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -88,7 +88,7 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
88 } 88 }
89 89
90 if (op & CACHEFLUSH_I) 90 if (op & CACHEFLUSH_I)
91 flush_cache_all(); 91 flush_icache_range(addr, addr+len);
92 92
93 up_read(&current->mm->mmap_sem); 93 up_read(&current->mm->mmap_sem);
94 return 0; 94 return 0;
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index e872e81add8a..6fc347ebe59d 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -375,3 +375,4 @@ ENTRY(sys_call_table)
375 .long sys_sendmsg /* 355 */ 375 .long sys_sendmsg /* 355 */
376 .long sys_recvmsg 376 .long sys_recvmsg
377 .long sys_recvmmsg 377 .long sys_recvmmsg
378 .long sys_accept4
diff --git a/arch/sh/kernel/vsyscall/vsyscall-trapa.S b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
index 3b6eb34c43fa..3e70f851cdc6 100644
--- a/arch/sh/kernel/vsyscall/vsyscall-trapa.S
+++ b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
@@ -8,9 +8,9 @@ __kernel_vsyscall:
8 * fill out .eh_frame -- PFM. */ 8 * fill out .eh_frame -- PFM. */
9.LEND_vsyscall: 9.LEND_vsyscall:
10 .size __kernel_vsyscall,.-.LSTART_vsyscall 10 .size __kernel_vsyscall,.-.LSTART_vsyscall
11 .previous
12 11
13 .section .eh_frame,"a",@progbits 12 .section .eh_frame,"a",@progbits
13 .previous
14.LCIE: 14.LCIE:
15 .ualong .LCIE_end - .LCIE_start 15 .ualong .LCIE_end - .LCIE_start
16.LCIE_start: 16.LCIE_start:
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 2cfae81914aa..92eb98633ab0 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -114,7 +114,7 @@ static void sh4_flush_dcache_page(void *arg)
114 struct address_space *mapping = page_mapping(page); 114 struct address_space *mapping = page_mapping(page);
115 115
116 if (mapping && !mapping_mapped(mapping)) 116 if (mapping && !mapping_mapped(mapping))
117 set_bit(PG_dcache_dirty, &page->flags); 117 clear_bit(PG_dcache_clean, &page->flags);
118 else 118 else
119#endif 119#endif
120 flush_cache_one(CACHE_OC_ADDRESS_ARRAY | 120 flush_cache_one(CACHE_OC_ADDRESS_ARRAY |
@@ -239,7 +239,7 @@ static void sh4_flush_cache_page(void *args)
239 * another ASID than the current one. 239 * another ASID than the current one.
240 */ 240 */
241 map_coherent = (current_cpu_data.dcache.n_aliases && 241 map_coherent = (current_cpu_data.dcache.n_aliases &&
242 !test_bit(PG_dcache_dirty, &page->flags) && 242 test_bit(PG_dcache_clean, &page->flags) &&
243 page_mapped(page)); 243 page_mapped(page));
244 if (map_coherent) 244 if (map_coherent)
245 vaddr = kmap_coherent(page, address); 245 vaddr = kmap_coherent(page, address);
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c
index f498da1cce7a..7729cca727eb 100644
--- a/arch/sh/mm/cache-sh7705.c
+++ b/arch/sh/mm/cache-sh7705.c
@@ -139,7 +139,7 @@ static void sh7705_flush_dcache_page(void *arg)
139 struct address_space *mapping = page_mapping(page); 139 struct address_space *mapping = page_mapping(page);
140 140
141 if (mapping && !mapping_mapped(mapping)) 141 if (mapping && !mapping_mapped(mapping))
142 set_bit(PG_dcache_dirty, &page->flags); 142 clear_bit(PG_dcache_clean, &page->flags);
143 else 143 else
144 __flush_dcache_page(__pa(page_address(page))); 144 __flush_dcache_page(__pa(page_address(page)));
145} 145}
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index ba401d137bb9..88d3dc3d30d5 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -60,14 +60,14 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
60 unsigned long len) 60 unsigned long len)
61{ 61{
62 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && 62 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
63 !test_bit(PG_dcache_dirty, &page->flags)) { 63 test_bit(PG_dcache_clean, &page->flags)) {
64 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 64 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
65 memcpy(vto, src, len); 65 memcpy(vto, src, len);
66 kunmap_coherent(vto); 66 kunmap_coherent(vto);
67 } else { 67 } else {
68 memcpy(dst, src, len); 68 memcpy(dst, src, len);
69 if (boot_cpu_data.dcache.n_aliases) 69 if (boot_cpu_data.dcache.n_aliases)
70 set_bit(PG_dcache_dirty, &page->flags); 70 clear_bit(PG_dcache_clean, &page->flags);
71 } 71 }
72 72
73 if (vma->vm_flags & VM_EXEC) 73 if (vma->vm_flags & VM_EXEC)
@@ -79,14 +79,14 @@ void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
79 unsigned long len) 79 unsigned long len)
80{ 80{
81 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && 81 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
82 !test_bit(PG_dcache_dirty, &page->flags)) { 82 test_bit(PG_dcache_clean, &page->flags)) {
83 void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 83 void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
84 memcpy(dst, vfrom, len); 84 memcpy(dst, vfrom, len);
85 kunmap_coherent(vfrom); 85 kunmap_coherent(vfrom);
86 } else { 86 } else {
87 memcpy(dst, src, len); 87 memcpy(dst, src, len);
88 if (boot_cpu_data.dcache.n_aliases) 88 if (boot_cpu_data.dcache.n_aliases)
89 set_bit(PG_dcache_dirty, &page->flags); 89 clear_bit(PG_dcache_clean, &page->flags);
90 } 90 }
91} 91}
92 92
@@ -98,7 +98,7 @@ void copy_user_highpage(struct page *to, struct page *from,
98 vto = kmap_atomic(to, KM_USER1); 98 vto = kmap_atomic(to, KM_USER1);
99 99
100 if (boot_cpu_data.dcache.n_aliases && page_mapped(from) && 100 if (boot_cpu_data.dcache.n_aliases && page_mapped(from) &&
101 !test_bit(PG_dcache_dirty, &from->flags)) { 101 test_bit(PG_dcache_clean, &from->flags)) {
102 vfrom = kmap_coherent(from, vaddr); 102 vfrom = kmap_coherent(from, vaddr);
103 copy_page(vto, vfrom); 103 copy_page(vto, vfrom);
104 kunmap_coherent(vfrom); 104 kunmap_coherent(vfrom);
@@ -141,7 +141,7 @@ void __update_cache(struct vm_area_struct *vma,
141 141
142 page = pfn_to_page(pfn); 142 page = pfn_to_page(pfn);
143 if (pfn_valid(pfn)) { 143 if (pfn_valid(pfn)) {
144 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); 144 int dirty = !test_and_set_bit(PG_dcache_clean, &page->flags);
145 if (dirty) 145 if (dirty)
146 __flush_purge_region(page_address(page), PAGE_SIZE); 146 __flush_purge_region(page_address(page), PAGE_SIZE);
147 } 147 }
@@ -153,7 +153,7 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
153 153
154 if (pages_do_alias(addr, vmaddr)) { 154 if (pages_do_alias(addr, vmaddr)) {
155 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && 155 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
156 !test_bit(PG_dcache_dirty, &page->flags)) { 156 test_bit(PG_dcache_clean, &page->flags)) {
157 void *kaddr; 157 void *kaddr;
158 158
159 kaddr = kmap_coherent(page, vmaddr); 159 kaddr = kmap_coherent(page, vmaddr);
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 3385b28acaac..0d3f912e3334 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -2,7 +2,7 @@
2 * linux/arch/sh/mm/init.c 2 * linux/arch/sh/mm/init.c
3 * 3 *
4 * Copyright (C) 1999 Niibe Yutaka 4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2002 - 2010 Paul Mundt 5 * Copyright (C) 2002 - 2011 Paul Mundt
6 * 6 *
7 * Based on linux/arch/i386/mm/init.c: 7 * Based on linux/arch/i386/mm/init.c:
8 * Copyright (C) 1995 Linus Torvalds 8 * Copyright (C) 1995 Linus Torvalds
@@ -325,11 +325,17 @@ void __init paging_init(void)
325 int nid; 325 int nid;
326 326
327 memblock_init(); 327 memblock_init();
328
329 sh_mv.mv_mem_init(); 328 sh_mv.mv_mem_init();
330 329
331 early_reserve_mem(); 330 early_reserve_mem();
332 331
332 /*
333 * Once the early reservations are out of the way, give the
334 * platforms a chance to kick out some memory.
335 */
336 if (sh_mv.mv_mem_reserve)
337 sh_mv.mv_mem_reserve();
338
333 memblock_enforce_memory_limit(memory_limit); 339 memblock_enforce_memory_limit(memory_limit);
334 memblock_analyze(); 340 memblock_analyze();
335 341
diff --git a/arch/sh/mm/kmap.c b/arch/sh/mm/kmap.c
index 15d74ea42094..ec29e14ec5a8 100644
--- a/arch/sh/mm/kmap.c
+++ b/arch/sh/mm/kmap.c
@@ -34,7 +34,7 @@ void *kmap_coherent(struct page *page, unsigned long addr)
34 enum fixed_addresses idx; 34 enum fixed_addresses idx;
35 unsigned long vaddr; 35 unsigned long vaddr;
36 36
37 BUG_ON(test_bit(PG_dcache_dirty, &page->flags)); 37 BUG_ON(!test_bit(PG_dcache_clean, &page->flags));
38 38
39 pagefault_disable(); 39 pagefault_disable();
40 40
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-08 02:08:51 -0500