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-rw-r--r--arch/sh/Kconfig1
-rw-r--r--arch/sh/boards/Kconfig5
-rw-r--r--arch/sh/boards/board-polaris.c2
-rw-r--r--arch/sh/boards/mach-dreamcast/irq.c32
-rw-r--r--arch/sh/boards/mach-kfr2r09/setup.c4
-rw-r--r--arch/sh/boards/mach-se/7343/irq.c129
-rw-r--r--arch/sh/boards/mach-se/7343/setup.c10
-rw-r--r--arch/sh/boards/mach-se/7722/irq.c131
-rw-r--r--arch/sh/boards/mach-se/7722/setup.c6
-rw-r--r--arch/sh/boards/mach-se/7724/irq.c36
-rw-r--r--arch/sh/boards/mach-x3proto/gpio.c57
-rw-r--r--arch/sh/cchips/hd6446x/hd64461.c33
-rw-r--r--arch/sh/drivers/pci/fixups-dreamcast.c2
-rw-r--r--arch/sh/drivers/pci/fixups-sdk7786.c4
-rw-r--r--arch/sh/drivers/pci/pci.c7
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.c2
-rw-r--r--arch/sh/include/asm/bug.h4
-rw-r--r--arch/sh/include/asm/io_noioport.h17
-rw-r--r--arch/sh/include/asm/kdebug.h2
-rw-r--r--arch/sh/include/asm/siu.h1
-rw-r--r--arch/sh/include/mach-se/mach/se7343.h7
-rw-r--r--arch/sh/include/mach-se/mach/se7722.h10
-rw-r--r--arch/sh/kernel/cpu/sh3/serial-sh7720.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7343.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7366.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7723.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7734.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7757.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7785.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7786.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-shx3.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c1
-rw-r--r--arch/sh/kernel/cpu/sh5/unwind.c63
-rw-r--r--arch/sh/kernel/dumpstack.c58
-rw-r--r--arch/sh/kernel/irq.c10
-rw-r--r--arch/sh/kernel/traps.c71
-rw-r--r--arch/sh/kernel/traps_32.c121
-rw-r--r--arch/sh/kernel/traps_64.c589
-rw-r--r--arch/sh/lib64/Makefile2
-rw-r--r--arch/sh/lib64/dbg.c248
-rw-r--r--arch/sh/mm/tlb-sh5.c2
43 files changed, 692 insertions, 997 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 31d9db7913e4..a24595d83ad6 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -60,6 +60,7 @@ config SUPERH32
60 60
61config SUPERH64 61config SUPERH64
62 def_bool ARCH = "sh64" 62 def_bool ARCH = "sh64"
63 select KALLSYMS
63 64
64config ARCH_DEFCONFIG 65config ARCH_DEFCONFIG
65 string 66 string
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 1f56b35d3248..7048c03490d9 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -44,6 +44,8 @@ config SH_7721_SOLUTION_ENGINE
44config SH_7722_SOLUTION_ENGINE 44config SH_7722_SOLUTION_ENGINE
45 bool "SolutionEngine7722" 45 bool "SolutionEngine7722"
46 select SOLUTION_ENGINE 46 select SOLUTION_ENGINE
47 select GENERIC_IRQ_CHIP
48 select IRQ_DOMAIN
47 depends on CPU_SUBTYPE_SH7722 49 depends on CPU_SUBTYPE_SH7722
48 help 50 help
49 Select 7722 SolutionEngine if configuring for a Hitachi SH772 51 Select 7722 SolutionEngine if configuring for a Hitachi SH772
@@ -80,6 +82,8 @@ config SH_7780_SOLUTION_ENGINE
80config SH_7343_SOLUTION_ENGINE 82config SH_7343_SOLUTION_ENGINE
81 bool "SolutionEngine7343" 83 bool "SolutionEngine7343"
82 select SOLUTION_ENGINE 84 select SOLUTION_ENGINE
85 select GENERIC_IRQ_CHIP
86 select IRQ_DOMAIN
83 depends on CPU_SUBTYPE_SH7343 87 depends on CPU_SUBTYPE_SH7343
84 help 88 help
85 Select 7343 SolutionEngine if configuring for a Hitachi 89 Select 7343 SolutionEngine if configuring for a Hitachi
@@ -295,6 +299,7 @@ config SH_X3PROTO
295 bool "SH-X3 Prototype board" 299 bool "SH-X3 Prototype board"
296 depends on CPU_SUBTYPE_SHX3 300 depends on CPU_SUBTYPE_SHX3
297 select NO_IOPORT if !PCI 301 select NO_IOPORT if !PCI
302 select IRQ_DOMAIN
298 303
299config SH_MAGIC_PANEL_R2 304config SH_MAGIC_PANEL_R2
300 bool "Magic Panel R2" 305 bool "Magic Panel R2"
diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c
index 37d03c097ae9..0978ae2e4847 100644
--- a/arch/sh/boards/board-polaris.c
+++ b/arch/sh/boards/board-polaris.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * June 2006 steve.glendinning@smsc.com 2 * June 2006 Steve Glendinning <steve.glendinning@shawell.net>
3 * 3 *
4 * Polaris-specific resource declaration 4 * Polaris-specific resource declaration
5 * 5 *
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c
index f63d323f411f..2789647abebe 100644
--- a/arch/sh/boards/mach-dreamcast/irq.c
+++ b/arch/sh/boards/mach-dreamcast/irq.c
@@ -8,10 +8,11 @@
8 * This file is part of the LinuxDC project (www.linuxdc.org) 8 * This file is part of the LinuxDC project (www.linuxdc.org)
9 * Released under the terms of the GNU GPL v2.0 9 * Released under the terms of the GNU GPL v2.0
10 */ 10 */
11
12#include <linux/irq.h> 11#include <linux/irq.h>
13#include <linux/io.h> 12#include <linux/io.h>
14#include <asm/irq.h> 13#include <linux/irq.h>
14#include <linux/export.h>
15#include <linux/err.h>
15#include <mach/sysasic.h> 16#include <mach/sysasic.h>
16 17
17/* 18/*
@@ -141,26 +142,15 @@ int systemasic_irq_demux(int irq)
141 142
142void systemasic_irq_init(void) 143void systemasic_irq_init(void)
143{ 144{
144 int i, nid = cpu_to_node(boot_cpu_data); 145 int irq_base, i;
145
146 /* Assign all virtual IRQs to the System ASIC int. handler */
147 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) {
148 unsigned int irq;
149
150 irq = create_irq_nr(i, nid);
151 if (unlikely(irq == 0)) {
152 pr_err("%s: failed hooking irq %d for systemasic\n",
153 __func__, i);
154 return;
155 }
156 146
157 if (unlikely(irq != i)) { 147 irq_base = irq_alloc_descs(HW_EVENT_IRQ_BASE, HW_EVENT_IRQ_BASE,
158 pr_err("%s: got irq %d but wanted %d, bailing.\n", 148 HW_EVENT_IRQ_MAX - HW_EVENT_IRQ_BASE, -1);
159 __func__, irq, i); 149 if (IS_ERR_VALUE(irq_base)) {
160 destroy_irq(irq); 150 pr_err("%s: failed hooking irqs\n", __func__);
161 return; 151 return;
162 } 152 }
163 153
154 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
164 irq_set_chip_and_handler(i, &systemasic_int, handle_level_irq); 155 irq_set_chip_and_handler(i, &systemasic_int, handle_level_irq);
165 }
166} 156}
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index 158c9176e42a..43a179ce9afc 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -201,8 +201,8 @@ static struct resource kfr2r09_usb0_gadget_resources[] = {
201 .flags = IORESOURCE_MEM, 201 .flags = IORESOURCE_MEM,
202 }, 202 },
203 [1] = { 203 [1] = {
204 .start = evtirq(0xa20), 204 .start = evt2irq(0xa20),
205 .end = evtirq(0xa20), 205 .end = evt2irq(0xa20),
206 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 206 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
207 }, 207 },
208}; 208};
diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c
index fd45ffc48340..7646bf0486c2 100644
--- a/arch/sh/boards/mach-se/7343/irq.c
+++ b/arch/sh/boards/mach-se/7343/irq.c
@@ -1,86 +1,129 @@
1/* 1/*
2 * linux/arch/sh/boards/se/7343/irq.c 2 * Hitachi UL SolutionEngine 7343 FPGA IRQ Support.
3 * 3 *
4 * Copyright (C) 2008 Yoshihiro Shimoda 4 * Copyright (C) 2008 Yoshihiro Shimoda
5 * Copyright (C) 2012 Paul Mundt
5 * 6 *
6 * Based on linux/arch/sh/boards/se/7722/irq.c 7 * Based on linux/arch/sh/boards/se/7343/irq.c
7 * Copyright (C) 2007 Nobuhiro Iwamatsu 8 * Copyright (C) 2007 Nobuhiro Iwamatsu
8 * 9 *
9 * This file is subject to the terms and conditions of the GNU General Public 10 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive 11 * License. See the file "COPYING" in the main directory of this archive
11 * for more details. 12 * for more details.
12 */ 13 */
14#define DRV_NAME "SE7343-FPGA"
15#define pr_fmt(fmt) DRV_NAME ": " fmt
16
17#define irq_reg_readl ioread16
18#define irq_reg_writel iowrite16
19
13#include <linux/init.h> 20#include <linux/init.h>
14#include <linux/irq.h> 21#include <linux/irq.h>
15#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/irqdomain.h>
16#include <linux/io.h> 24#include <linux/io.h>
25#include <asm/sizes.h>
17#include <mach-se/mach/se7343.h> 26#include <mach-se/mach/se7343.h>
18 27
19unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, }; 28#define PA_CPLD_BASE_ADDR 0x11400000
29#define PA_CPLD_ST_REG 0x08 /* CPLD Interrupt status register */
30#define PA_CPLD_IMSK_REG 0x0a /* CPLD Interrupt mask register */
20 31
21static void disable_se7343_irq(struct irq_data *data) 32static void __iomem *se7343_irq_regs;
22{ 33struct irq_domain *se7343_irq_domain;
23 unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
24 __raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
25}
26 34
27static void enable_se7343_irq(struct irq_data *data) 35static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
28{ 36{
29 unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data); 37 struct irq_data *data = irq_get_irq_data(irq);
30 __raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK); 38 struct irq_chip *chip = irq_data_get_irq_chip(data);
31} 39 unsigned long mask;
40 int bit;
32 41
33static struct irq_chip se7343_irq_chip __read_mostly = { 42 chip->irq_mask_ack(data);
34 .name = "SE7343-FPGA",
35 .irq_mask = disable_se7343_irq,
36 .irq_unmask = enable_se7343_irq,
37};
38 43
39static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) 44 mask = ioread16(se7343_irq_regs + PA_CPLD_ST_REG);
45
46 for_each_set_bit(bit, &mask, SE7343_FPGA_IRQ_NR)
47 generic_handle_irq(irq_linear_revmap(se7343_irq_domain, bit));
48
49 chip->irq_unmask(data);
50}
51
52static void __init se7343_domain_init(void)
40{ 53{
41 unsigned short intv = __raw_readw(PA_CPLD_ST); 54 int i;
42 unsigned int ext_irq = 0;
43 55
44 intv &= (1 << SE7343_FPGA_IRQ_NR) - 1; 56 se7343_irq_domain = irq_domain_add_linear(NULL, SE7343_FPGA_IRQ_NR,
57 &irq_domain_simple_ops, NULL);
58 if (unlikely(!se7343_irq_domain)) {
59 printk("Failed to get IRQ domain\n");
60 return;
61 }
45 62
46 for (; intv; intv >>= 1, ext_irq++) { 63 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
47 if (!(intv & 1)) 64 int irq = irq_create_mapping(se7343_irq_domain, i);
48 continue;
49 65
50 generic_handle_irq(se7343_fpga_irq[ext_irq]); 66 if (unlikely(irq == 0)) {
67 printk("Failed to allocate IRQ %d\n", i);
68 return;
69 }
51 } 70 }
52} 71}
53 72
54/* 73static void __init se7343_gc_init(void)
55 * Initialize IRQ setting
56 */
57void __init init_7343se_IRQ(void)
58{ 74{
59 int i, irq; 75 struct irq_chip_generic *gc;
76 struct irq_chip_type *ct;
77 unsigned int irq_base;
60 78
61 __raw_writew(0, PA_CPLD_IMSK); /* disable all irqs */ 79 irq_base = irq_linear_revmap(se7343_irq_domain, 0);
62 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
63 80
64 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) { 81 gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs,
65 irq = create_irq(); 82 handle_level_irq);
66 if (irq < 0) 83 if (unlikely(!gc))
67 return; 84 return;
68 se7343_fpga_irq[i] = irq;
69 85
70 irq_set_chip_and_handler_name(se7343_fpga_irq[i], 86 ct = gc->chip_types;
71 &se7343_irq_chip, 87 ct->chip.irq_mask = irq_gc_mask_set_bit;
72 handle_level_irq, 88 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
73 "level");
74 89
75 irq_set_chip_data(se7343_fpga_irq[i], (void *)i); 90 ct->regs.mask = PA_CPLD_IMSK_REG;
76 } 91
92 irq_setup_generic_chip(gc, IRQ_MSK(SE7343_FPGA_IRQ_NR),
93 IRQ_GC_INIT_MASK_CACHE,
94 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
77 95
78 irq_set_chained_handler(IRQ0_IRQ, se7343_irq_demux); 96 irq_set_chained_handler(IRQ0_IRQ, se7343_irq_demux);
79 irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 97 irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
98
80 irq_set_chained_handler(IRQ1_IRQ, se7343_irq_demux); 99 irq_set_chained_handler(IRQ1_IRQ, se7343_irq_demux);
81 irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); 100 irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
101
82 irq_set_chained_handler(IRQ4_IRQ, se7343_irq_demux); 102 irq_set_chained_handler(IRQ4_IRQ, se7343_irq_demux);
83 irq_set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW); 103 irq_set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW);
104
84 irq_set_chained_handler(IRQ5_IRQ, se7343_irq_demux); 105 irq_set_chained_handler(IRQ5_IRQ, se7343_irq_demux);
85 irq_set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW); 106 irq_set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW);
86} 107}
108
109/*
110 * Initialize IRQ setting
111 */
112void __init init_7343se_IRQ(void)
113{
114 se7343_irq_regs = ioremap(PA_CPLD_BASE_ADDR, SZ_16);
115 if (unlikely(!se7343_irq_regs)) {
116 pr_err("Failed to remap CPLD\n");
117 return;
118 }
119
120 /*
121 * All FPGA IRQs disabled by default
122 */
123 iowrite16(0, se7343_irq_regs + PA_CPLD_IMSK_REG);
124
125 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
126
127 se7343_domain_init();
128 se7343_gc_init();
129}
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c
index d2370af56d77..8ce4f2a202a8 100644
--- a/arch/sh/boards/mach-se/7343/setup.c
+++ b/arch/sh/boards/mach-se/7343/setup.c
@@ -5,6 +5,7 @@
5#include <linux/serial_reg.h> 5#include <linux/serial_reg.h>
6#include <linux/usb/isp116x.h> 6#include <linux/usb/isp116x.h>
7#include <linux/delay.h> 7#include <linux/delay.h>
8#include <linux/irqdomain.h>
8#include <asm/machvec.h> 9#include <asm/machvec.h>
9#include <mach-se/mach/se7343.h> 10#include <mach-se/mach/se7343.h>
10#include <asm/heartbeat.h> 11#include <asm/heartbeat.h>
@@ -145,11 +146,12 @@ static struct platform_device *sh7343se_platform_devices[] __initdata = {
145static int __init sh7343se_devices_setup(void) 146static int __init sh7343se_devices_setup(void)
146{ 147{
147 /* Wire-up dynamic vectors */ 148 /* Wire-up dynamic vectors */
148 serial_platform_data[0].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTA]; 149 serial_platform_data[0].irq = irq_find_mapping(se7343_irq_domain,
149 serial_platform_data[1].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTB]; 150 SE7343_FPGA_IRQ_UARTA);
150 151 serial_platform_data[1].irq = irq_find_mapping(se7343_irq_domain,
152 SE7343_FPGA_IRQ_UARTB);
151 usb_resources[2].start = usb_resources[2].end = 153 usb_resources[2].start = usb_resources[2].end =
152 se7343_fpga_irq[SE7343_FPGA_IRQ_USB]; 154 irq_find_mapping(se7343_irq_domain, SE7343_FPGA_IRQ_USB);
153 155
154 return platform_add_devices(sh7343se_platform_devices, 156 return platform_add_devices(sh7343se_platform_devices,
155 ARRAY_SIZE(sh7343se_platform_devices)); 157 ARRAY_SIZE(sh7343se_platform_devices));
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index aac92f21ebd2..f5e2af1bf040 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -1,79 +1,96 @@
1/* 1/*
2 * linux/arch/sh/boards/se/7722/irq.c 2 * Hitachi UL SolutionEngine 7722 FPGA IRQ Support.
3 * 3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu 4 * Copyright (C) 2007 Nobuhiro Iwamatsu
5 * 5 * Copyright (C) 2012 Paul Mundt
6 * Hitachi UL SolutionEngine 7722 Support.
7 * 6 *
8 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
10 * for more details. 9 * for more details.
11 */ 10 */
11#define DRV_NAME "SE7722-FPGA"
12#define pr_fmt(fmt) DRV_NAME ": " fmt
13
14#define irq_reg_readl ioread16
15#define irq_reg_writel iowrite16
16
12#include <linux/init.h> 17#include <linux/init.h>
13#include <linux/irq.h> 18#include <linux/irq.h>
14#include <linux/interrupt.h> 19#include <linux/interrupt.h>
15#include <asm/irq.h> 20#include <linux/irqdomain.h>
16#include <asm/io.h> 21#include <linux/io.h>
22#include <linux/err.h>
23#include <asm/sizes.h>
17#include <mach-se/mach/se7722.h> 24#include <mach-se/mach/se7722.h>
18 25
19unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, }; 26#define IRQ01_BASE_ADDR 0x11800000
27#define IRQ01_MODE_REG 0
28#define IRQ01_STS_REG 4
29#define IRQ01_MASK_REG 8
20 30
21static void disable_se7722_irq(struct irq_data *data) 31static void __iomem *se7722_irq_regs;
22{ 32struct irq_domain *se7722_irq_domain;
23 unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
24 __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
25}
26 33
27static void enable_se7722_irq(struct irq_data *data) 34static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
28{ 35{
29 unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data); 36 struct irq_data *data = irq_get_irq_data(irq);
30 __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK); 37 struct irq_chip *chip = irq_data_get_irq_chip(data);
31} 38 unsigned long mask;
39 int bit;
32 40
33static struct irq_chip se7722_irq_chip __read_mostly = { 41 chip->irq_mask_ack(data);
34 .name = "SE7722-FPGA",
35 .irq_mask = disable_se7722_irq,
36 .irq_unmask = enable_se7722_irq,
37};
38 42
39static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc) 43 mask = ioread16(se7722_irq_regs + IRQ01_STS_REG);
44
45 for_each_set_bit(bit, &mask, SE7722_FPGA_IRQ_NR)
46 generic_handle_irq(irq_linear_revmap(se7722_irq_domain, bit));
47
48 chip->irq_unmask(data);
49}
50
51static void __init se7722_domain_init(void)
40{ 52{
41 unsigned short intv = __raw_readw(IRQ01_STS); 53 int i;
42 unsigned int ext_irq = 0;
43 54
44 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1; 55 se7722_irq_domain = irq_domain_add_linear(NULL, SE7722_FPGA_IRQ_NR,
56 &irq_domain_simple_ops, NULL);
57 if (unlikely(!se7722_irq_domain)) {
58 printk("Failed to get IRQ domain\n");
59 return;
60 }
45 61
46 for (; intv; intv >>= 1, ext_irq++) { 62 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
47 if (!(intv & 1)) 63 int irq = irq_create_mapping(se7722_irq_domain, i);
48 continue;
49 64
50 generic_handle_irq(se7722_fpga_irq[ext_irq]); 65 if (unlikely(irq == 0)) {
66 printk("Failed to allocate IRQ %d\n", i);
67 return;
68 }
51 } 69 }
52} 70}
53 71
54/* 72static void __init se7722_gc_init(void)
55 * Initialize IRQ setting
56 */
57void __init init_se7722_IRQ(void)
58{ 73{
59 int i, irq; 74 struct irq_chip_generic *gc;
75 struct irq_chip_type *ct;
76 unsigned int irq_base;
60 77
61 __raw_writew(0, IRQ01_MASK); /* disable all irqs */ 78 irq_base = irq_linear_revmap(se7722_irq_domain, 0);
62 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
63 79
64 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) { 80 gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7722_irq_regs,
65 irq = create_irq(); 81 handle_level_irq);
66 if (irq < 0) 82 if (unlikely(!gc))
67 return; 83 return;
68 se7722_fpga_irq[i] = irq;
69 84
70 irq_set_chip_and_handler_name(se7722_fpga_irq[i], 85 ct = gc->chip_types;
71 &se7722_irq_chip, 86 ct->chip.irq_mask = irq_gc_mask_set_bit;
72 handle_level_irq, 87 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
73 "level");
74 88
75 irq_set_chip_data(se7722_fpga_irq[i], (void *)i); 89 ct->regs.mask = IRQ01_MASK_REG;
76 } 90
91 irq_setup_generic_chip(gc, IRQ_MSK(SE7722_FPGA_IRQ_NR),
92 IRQ_GC_INIT_MASK_CACHE,
93 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
77 94
78 irq_set_chained_handler(IRQ0_IRQ, se7722_irq_demux); 95 irq_set_chained_handler(IRQ0_IRQ, se7722_irq_demux);
79 irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 96 irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
@@ -81,3 +98,25 @@ void __init init_se7722_IRQ(void)
81 irq_set_chained_handler(IRQ1_IRQ, se7722_irq_demux); 98 irq_set_chained_handler(IRQ1_IRQ, se7722_irq_demux);
82 irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); 99 irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
83} 100}
101
102/*
103 * Initialize FPGA IRQs
104 */
105void __init init_se7722_IRQ(void)
106{
107 se7722_irq_regs = ioremap(IRQ01_BASE_ADDR, SZ_16);
108 if (unlikely(!se7722_irq_regs)) {
109 printk("Failed to remap IRQ01 regs\n");
110 return;
111 }
112
113 /*
114 * All FPGA IRQs disabled by default
115 */
116 iowrite16(0, se7722_irq_regs + IRQ01_MASK_REG);
117
118 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
119
120 se7722_domain_init();
121 se7722_gc_init();
122}
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index 8f7f0550cfde..e04e2bc46984 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -2,6 +2,7 @@
2 * linux/arch/sh/boards/se/7722/setup.c 2 * linux/arch/sh/boards/se/7722/setup.c
3 * 3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu 4 * Copyright (C) 2007 Nobuhiro Iwamatsu
5 * Copyright (C) 2012 Paul Mundt
5 * 6 *
6 * Hitachi UL SolutionEngine 7722 Support. 7 * Hitachi UL SolutionEngine 7722 Support.
7 * 8 *
@@ -15,6 +16,7 @@
15#include <linux/ata_platform.h> 16#include <linux/ata_platform.h>
16#include <linux/input.h> 17#include <linux/input.h>
17#include <linux/input/sh_keysc.h> 18#include <linux/input/sh_keysc.h>
19#include <linux/irqdomain.h>
18#include <linux/smc91x.h> 20#include <linux/smc91x.h>
19#include <linux/sh_intc.h> 21#include <linux/sh_intc.h>
20#include <mach-se/mach/se7722.h> 22#include <mach-se/mach/se7722.h>
@@ -143,10 +145,10 @@ static int __init se7722_devices_setup(void)
143 145
144 /* Wire-up dynamic vectors */ 146 /* Wire-up dynamic vectors */
145 cf_ide_resources[2].start = cf_ide_resources[2].end = 147 cf_ide_resources[2].start = cf_ide_resources[2].end =
146 se7722_fpga_irq[SE7722_FPGA_IRQ_MRSHPC0]; 148 irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_MRSHPC0);
147 149
148 smc91x_eth_resources[1].start = smc91x_eth_resources[1].end = 150 smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
149 se7722_fpga_irq[SE7722_FPGA_IRQ_SMC]; 151 irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_SMC);
150 152
151 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices)); 153 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
152} 154}
diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c
index c6342ce7768d..5d1d3ec9a6cd 100644
--- a/arch/sh/boards/mach-se/7724/irq.c
+++ b/arch/sh/boards/mach-se/7724/irq.c
@@ -17,8 +17,10 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/irq.h> 18#include <linux/irq.h>
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <asm/irq.h> 20#include <linux/export.h>
21#include <asm/io.h> 21#include <linux/topology.h>
22#include <linux/io.h>
23#include <linux/err.h>
22#include <mach-se/mach/se7724.h> 24#include <mach-se/mach/se7724.h>
23 25
24struct fpga_irq { 26struct fpga_irq {
@@ -111,7 +113,7 @@ static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
111 */ 113 */
112void __init init_se7724_IRQ(void) 114void __init init_se7724_IRQ(void)
113{ 115{
114 int i, nid = cpu_to_node(boot_cpu_data); 116 int irq_base, i;
115 117
116 __raw_writew(0xffff, IRQ0_MR); /* mask all */ 118 __raw_writew(0xffff, IRQ0_MR); /* mask all */
117 __raw_writew(0xffff, IRQ1_MR); /* mask all */ 119 __raw_writew(0xffff, IRQ1_MR); /* mask all */
@@ -121,28 +123,16 @@ void __init init_se7724_IRQ(void)
121 __raw_writew(0x0000, IRQ2_SR); /* clear irq */ 123 __raw_writew(0x0000, IRQ2_SR); /* clear irq */
122 __raw_writew(0x002a, IRQ_MODE); /* set irq type */ 124 __raw_writew(0x002a, IRQ_MODE); /* set irq type */
123 125
124 for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) { 126 irq_base = irq_alloc_descs(SE7724_FPGA_IRQ_BASE, SE7724_FPGA_IRQ_BASE,
125 int irq, wanted; 127 SE7724_FPGA_IRQ_NR, numa_node_id());
126 128 if (IS_ERR_VALUE(irq_base)) {
127 wanted = SE7724_FPGA_IRQ_BASE + i; 129 pr_err("%s: failed hooking irqs for FPGA\n", __func__);
128 130 return;
129 irq = create_irq_nr(wanted, nid); 131 }
130 if (unlikely(irq == 0)) {
131 pr_err("%s: failed hooking irq %d for FPGA\n",
132 __func__, wanted);
133 return;
134 }
135
136 if (unlikely(irq != wanted)) {
137 pr_err("%s: got irq %d but wanted %d, bailing.\n",
138 __func__, irq, wanted);
139 destroy_irq(irq);
140 return;
141 }
142 132
143 irq_set_chip_and_handler_name(irq, &se7724_irq_chip, 133 for (i = 0; i < SE7724_FPGA_IRQ_NR; i++)
134 irq_set_chip_and_handler_name(irq_base + i, &se7724_irq_chip,
144 handle_level_irq, "level"); 135 handle_level_irq, "level");
145 }
146 136
147 irq_set_chained_handler(IRQ0_IRQ, se7724_irq_demux); 137 irq_set_chained_handler(IRQ0_IRQ, se7724_irq_demux);
148 irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 138 irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
diff --git a/arch/sh/boards/mach-x3proto/gpio.c b/arch/sh/boards/mach-x3proto/gpio.c
index f33b2b57019c..3ea65e9b56e8 100644
--- a/arch/sh/boards/mach-x3proto/gpio.c
+++ b/arch/sh/boards/mach-x3proto/gpio.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Renesas SH-X3 Prototype Baseboard GPIO Support. 4 * Renesas SH-X3 Prototype Baseboard GPIO Support.
5 * 5 *
6 * Copyright (C) 2010 Paul Mundt 6 * Copyright (C) 2010 - 2012 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -17,6 +17,7 @@
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/spinlock.h> 19#include <linux/spinlock.h>
20#include <linux/irqdomain.h>
20#include <linux/io.h> 21#include <linux/io.h>
21#include <mach/ilsel.h> 22#include <mach/ilsel.h>
22#include <mach/hardware.h> 23#include <mach/hardware.h>
@@ -26,7 +27,7 @@
26#define KEYDETR 0xb81c0004 27#define KEYDETR 0xb81c0004
27 28
28static DEFINE_SPINLOCK(x3proto_gpio_lock); 29static DEFINE_SPINLOCK(x3proto_gpio_lock);
29static unsigned int x3proto_gpio_irq_map[NR_BASEBOARD_GPIOS] = { 0, }; 30static struct irq_domain *x3proto_irq_domain;
30 31
31static int x3proto_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) 32static int x3proto_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
32{ 33{
@@ -49,7 +50,14 @@ static int x3proto_gpio_get(struct gpio_chip *chip, unsigned gpio)
49 50
50static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) 51static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
51{ 52{
52 return x3proto_gpio_irq_map[gpio]; 53 int virq;
54
55 if (gpio < chip->ngpio)
56 virq = irq_create_mapping(x3proto_irq_domain, gpio);
57 else
58 virq = -ENXIO;
59
60 return virq;
53} 61}
54 62
55static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 63static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -62,9 +70,8 @@ static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
62 chip->irq_mask_ack(data); 70 chip->irq_mask_ack(data);
63 71
64 mask = __raw_readw(KEYDETR); 72 mask = __raw_readw(KEYDETR);
65
66 for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS) 73 for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS)
67 generic_handle_irq(x3proto_gpio_to_irq(NULL, pin)); 74 generic_handle_irq(irq_linear_revmap(x3proto_irq_domain, pin));
68 75
69 chip->irq_unmask(data); 76 chip->irq_unmask(data);
70} 77}
@@ -78,10 +85,23 @@ struct gpio_chip x3proto_gpio_chip = {
78 .ngpio = NR_BASEBOARD_GPIOS, 85 .ngpio = NR_BASEBOARD_GPIOS,
79}; 86};
80 87
88static int x3proto_gpio_irq_map(struct irq_domain *domain, unsigned int virq,
89 irq_hw_number_t hwirq)
90{
91 irq_set_chip_and_handler_name(virq, &dummy_irq_chip, handle_simple_irq,
92 "gpio");
93
94 return 0;
95}
96
97static struct irq_domain_ops x3proto_gpio_irq_ops = {
98 .map = x3proto_gpio_irq_map,
99 .xlate = irq_domain_xlate_twocell,
100};
101
81int __init x3proto_gpio_setup(void) 102int __init x3proto_gpio_setup(void)
82{ 103{
83 int ilsel; 104 int ilsel, ret;
84 int ret, i;
85 105
86 ilsel = ilsel_enable(ILSEL_KEY); 106 ilsel = ilsel_enable(ILSEL_KEY);
87 if (unlikely(ilsel < 0)) 107 if (unlikely(ilsel < 0))
@@ -91,21 +111,10 @@ int __init x3proto_gpio_setup(void)
91 if (unlikely(ret)) 111 if (unlikely(ret))
92 goto err_gpio; 112 goto err_gpio;
93 113
94 for (i = 0; i < NR_BASEBOARD_GPIOS; i++) { 114 x3proto_irq_domain = irq_domain_add_linear(NULL, NR_BASEBOARD_GPIOS,
95 unsigned long flags; 115 &x3proto_gpio_irq_ops, NULL);
96 int irq = create_irq(); 116 if (unlikely(!x3proto_irq_domain))
97 117 goto err_irq;
98 if (unlikely(irq < 0)) {
99 ret = -EINVAL;
100 goto err_irq;
101 }
102
103 spin_lock_irqsave(&x3proto_gpio_lock, flags);
104 x3proto_gpio_irq_map[i] = irq;
105 irq_set_chip_and_handler_name(irq, &dummy_irq_chip,
106 handle_simple_irq, "gpio");
107 spin_unlock_irqrestore(&x3proto_gpio_lock, flags);
108 }
109 118
110 pr_info("registering '%s' support, handling GPIOs %u -> %u, " 119 pr_info("registering '%s' support, handling GPIOs %u -> %u, "
111 "bound to IRQ %u\n", 120 "bound to IRQ %u\n",
@@ -119,10 +128,6 @@ int __init x3proto_gpio_setup(void)
119 return 0; 128 return 0;
120 129
121err_irq: 130err_irq:
122 for (; i >= 0; --i)
123 if (x3proto_gpio_irq_map[i])
124 destroy_irq(x3proto_gpio_irq_map[i]);
125
126 ret = gpiochip_remove(&x3proto_gpio_chip); 131 ret = gpiochip_remove(&x3proto_gpio_chip);
127 if (unlikely(ret)) 132 if (unlikely(ret))
128 pr_err("Failed deregistering GPIO\n"); 133 pr_err("Failed deregistering GPIO\n");
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index eb4ea4d44d59..e9735616bdc8 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -73,10 +73,7 @@ static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
73 73
74int __init setup_hd64461(void) 74int __init setup_hd64461(void)
75{ 75{
76 int i, nid = cpu_to_node(boot_cpu_data); 76 int irq_base, i;
77
78 if (!MACH_HD64461)
79 return 0;
80 77
81 printk(KERN_INFO 78 printk(KERN_INFO
82 "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n", 79 "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
@@ -89,28 +86,16 @@ int __init setup_hd64461(void)
89#endif 86#endif
90 __raw_writew(0xffff, HD64461_NIMR); 87 __raw_writew(0xffff, HD64461_NIMR);
91 88
92 /* IRQ 80 -> 95 belongs to HD64461 */ 89 irq_base = irq_alloc_descs(HD64461_IRQBASE, HD64461_IRQBASE, 16, -1);
93 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) { 90 if (IS_ERR_VALUE(irq_base)) {
94 unsigned int irq; 91 pr_err("%s: failed hooking irqs for HD64461\n", __func__);
95 92 return irq_base;
96 irq = create_irq_nr(i, nid);
97 if (unlikely(irq == 0)) {
98 pr_err("%s: failed hooking irq %d for HD64461\n",
99 __func__, i);
100 return -EBUSY;
101 }
102
103 if (unlikely(irq != i)) {
104 pr_err("%s: got irq %d but wanted %d, bailing.\n",
105 __func__, irq, i);
106 destroy_irq(irq);
107 return -EINVAL;
108 }
109
110 irq_set_chip_and_handler(i, &hd64461_irq_chip,
111 handle_level_irq);
112 } 93 }
113 94
95 for (i = 0; i < 16; i++)
96 irq_set_chip_and_handler(irq_base + i, &hd64461_irq_chip,
97 handle_level_irq);
98
114 irq_set_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux); 99 irq_set_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
115 irq_set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW); 100 irq_set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
116 101
diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c
index edeea8960c30..a5fe1b54c952 100644
--- a/arch/sh/drivers/pci/fixups-dreamcast.c
+++ b/arch/sh/drivers/pci/fixups-dreamcast.c
@@ -28,7 +28,7 @@
28#include <asm/irq.h> 28#include <asm/irq.h>
29#include <mach/pci.h> 29#include <mach/pci.h>
30 30
31static void __init gapspci_fixup_resources(struct pci_dev *dev) 31static void __devinit gapspci_fixup_resources(struct pci_dev *dev)
32{ 32{
33 struct pci_channel *p = dev->sysdata; 33 struct pci_channel *p = dev->sysdata;
34 34
diff --git a/arch/sh/drivers/pci/fixups-sdk7786.c b/arch/sh/drivers/pci/fixups-sdk7786.c
index 0e18ee332553..36eb6fc3c18a 100644
--- a/arch/sh/drivers/pci/fixups-sdk7786.c
+++ b/arch/sh/drivers/pci/fixups-sdk7786.c
@@ -23,9 +23,9 @@
23 * Misconfigurations can be detected through the FPGA via the slot 23 * Misconfigurations can be detected through the FPGA via the slot
24 * resistors to determine card presence. Hotplug remains unsupported. 24 * resistors to determine card presence. Hotplug remains unsupported.
25 */ 25 */
26static unsigned int slot4en __devinitdata; 26static unsigned int slot4en __initdata;
27 27
28char *__devinit pcibios_setup(char *str) 28char *__init pcibios_setup(char *str)
29{ 29{
30 if (strcmp(str, "slot4en") == 0) { 30 if (strcmp(str, "slot4en") == 0) {
31 slot4en = 1; 31 slot4en = 1;
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 9d10a3cb8797..40db2d0aef3f 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -59,7 +59,7 @@ static void __devinit pcibios_scanbus(struct pci_channel *hose)
59 need_domain_info = need_domain_info || hose->index; 59 need_domain_info = need_domain_info || hose->index;
60 hose->need_domain_info = need_domain_info; 60 hose->need_domain_info = need_domain_info;
61 if (bus) { 61 if (bus) {
62 next_busno = bus->subordinate + 1; 62 next_busno = bus->busn_res.end + 1;
63 /* Don't allow 8-bit bus number overflow inside the hose - 63 /* Don't allow 8-bit bus number overflow inside the hose -
64 reserve some space for bridges. */ 64 reserve some space for bridges. */
65 if (next_busno > 224) { 65 if (next_busno > 224) {
@@ -197,11 +197,6 @@ void __init pcibios_update_irq(struct pci_dev *dev, int irq)
197 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 197 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
198} 198}
199 199
200char * __devinit __weak pcibios_setup(char *str)
201{
202 return str;
203}
204
205static void __init 200static void __init
206pcibios_bus_report_status_early(struct pci_channel *hose, 201pcibios_bus_report_status_early(struct pci_channel *hose,
207 int top_bus, int current_bus, 202 int top_bus, int current_bus,
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index c045142f7338..9e702f2f8045 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -239,7 +239,7 @@ static int __init pcie_clk_init(struct sh7786_pcie_port *port)
239 clk->enable_reg = (void __iomem *)(chan->reg_base + SH4A_PCIEPHYCTLR); 239 clk->enable_reg = (void __iomem *)(chan->reg_base + SH4A_PCIEPHYCTLR);
240 clk->enable_bit = BITS_CKE; 240 clk->enable_bit = BITS_CKE;
241 241
242 ret = sh_clk_mstp32_register(clk, 1); 242 ret = sh_clk_mstp_register(clk, 1);
243 if (unlikely(ret < 0)) 243 if (unlikely(ret < 0))
244 goto err_phy; 244 goto err_phy;
245 245
diff --git a/arch/sh/include/asm/bug.h b/arch/sh/include/asm/bug.h
index 2b87d86bfc41..dcf278075429 100644
--- a/arch/sh/include/asm/bug.h
+++ b/arch/sh/include/asm/bug.h
@@ -110,6 +110,10 @@ do { \
110#include <asm-generic/bug.h> 110#include <asm-generic/bug.h>
111 111
112struct pt_regs; 112struct pt_regs;
113
114/* arch/sh/kernel/traps.c */
113extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); 115extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
116extern void die_if_kernel(const char *str, struct pt_regs *regs, long err);
117extern void die_if_no_fixup(const char *str, struct pt_regs *regs, long err);
114 118
115#endif /* __ASM_SH_BUG_H */ 119#endif /* __ASM_SH_BUG_H */
diff --git a/arch/sh/include/asm/io_noioport.h b/arch/sh/include/asm/io_noioport.h
index e136d28d1d2e..4d48f1436a63 100644
--- a/arch/sh/include/asm/io_noioport.h
+++ b/arch/sh/include/asm/io_noioport.h
@@ -19,9 +19,20 @@ static inline u32 inl(unsigned long addr)
19 return -1; 19 return -1;
20} 20}
21 21
22#define outb(x, y) BUG() 22static inline void outb(unsigned char x, unsigned long port)
23#define outw(x, y) BUG() 23{
24#define outl(x, y) BUG() 24 BUG();
25}
26
27static inline void outw(unsigned short x, unsigned long port)
28{
29 BUG();
30}
31
32static inline void outl(unsigned int x, unsigned long port)
33{
34 BUG();
35}
25 36
26#define inb_p(addr) inb(addr) 37#define inb_p(addr) inb(addr)
27#define inw_p(addr) inw(addr) 38#define inw_p(addr) inw(addr)
diff --git a/arch/sh/include/asm/kdebug.h b/arch/sh/include/asm/kdebug.h
index a6201f10c273..8d6a831e7ba1 100644
--- a/arch/sh/include/asm/kdebug.h
+++ b/arch/sh/include/asm/kdebug.h
@@ -10,6 +10,8 @@ enum die_val {
10 DIE_SSTEP, 10 DIE_SSTEP,
11}; 11};
12 12
13/* arch/sh/kernel/dumpstack.c */
13extern void printk_address(unsigned long address, int reliable); 14extern void printk_address(unsigned long address, int reliable);
15extern void dump_mem(const char *str, unsigned long bottom, unsigned long top);
14 16
15#endif /* __ASM_SH_KDEBUG_H */ 17#endif /* __ASM_SH_KDEBUG_H */
diff --git a/arch/sh/include/asm/siu.h b/arch/sh/include/asm/siu.h
index 1d95c78808d1..580b7ac228b7 100644
--- a/arch/sh/include/asm/siu.h
+++ b/arch/sh/include/asm/siu.h
@@ -14,7 +14,6 @@
14struct device; 14struct device;
15 15
16struct siu_platform { 16struct siu_platform {
17 struct device *dma_dev;
18 unsigned int dma_slave_tx_a; 17 unsigned int dma_slave_tx_a;
19 unsigned int dma_slave_rx_a; 18 unsigned int dma_slave_rx_a;
20 unsigned int dma_slave_tx_b; 19 unsigned int dma_slave_tx_b;
diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h
index 50b5d575dff0..542521c970c6 100644
--- a/arch/sh/include/mach-se/mach/se7343.h
+++ b/arch/sh/include/mach-se/mach/se7343.h
@@ -50,9 +50,6 @@
50#define PA_LED 0xb0C00000 /* LED */ 50#define PA_LED 0xb0C00000 /* LED */
51#define LED_SHIFT 0 51#define LED_SHIFT 0
52#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ 52#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
53#define PA_CPLD_MODESET 0xb1400004 /* CPLD Mode set register */
54#define PA_CPLD_ST 0xb1400008 /* CPLD Interrupt status register */
55#define PA_CPLD_IMSK 0xb140000a /* CPLD Interrupt mask register */
56/* Area 5 */ 53/* Area 5 */
57#define PA_EXT5 0x14000000 54#define PA_EXT5 0x14000000
58#define PA_EXT5_SIZE 0x04000000 55#define PA_EXT5_SIZE 0x04000000
@@ -135,8 +132,10 @@
135 132
136#define SE7343_FPGA_IRQ_NR 12 133#define SE7343_FPGA_IRQ_NR 12
137 134
135struct irq_domain;
136
138/* arch/sh/boards/se/7343/irq.c */ 137/* arch/sh/boards/se/7343/irq.c */
139extern unsigned int se7343_fpga_irq[]; 138extern struct irq_domain *se7343_irq_domain;
140 139
141void init_7343se_IRQ(void); 140void init_7343se_IRQ(void);
142 141
diff --git a/arch/sh/include/mach-se/mach/se7722.h b/arch/sh/include/mach-se/mach/se7722.h
index 201081ebdbce..637e7ac753f8 100644
--- a/arch/sh/include/mach-se/mach/se7722.h
+++ b/arch/sh/include/mach-se/mach/se7722.h
@@ -81,12 +81,6 @@
81#define IRQ0_IRQ evt2irq(0x600) 81#define IRQ0_IRQ evt2irq(0x600)
82#define IRQ1_IRQ evt2irq(0x620) 82#define IRQ1_IRQ evt2irq(0x620)
83 83
84#define IRQ01_MODE 0xb1800000
85#define IRQ01_STS 0xb1800004
86#define IRQ01_MASK 0xb1800008
87
88/* Bits in IRQ01_* registers */
89
90#define SE7722_FPGA_IRQ_USB 0 /* IRQ0 */ 84#define SE7722_FPGA_IRQ_USB 0 /* IRQ0 */
91#define SE7722_FPGA_IRQ_SMC 1 /* IRQ0 */ 85#define SE7722_FPGA_IRQ_SMC 1 /* IRQ0 */
92#define SE7722_FPGA_IRQ_MRSHPC0 2 /* IRQ1 */ 86#define SE7722_FPGA_IRQ_MRSHPC0 2 /* IRQ1 */
@@ -95,8 +89,10 @@
95#define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */ 89#define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */
96#define SE7722_FPGA_IRQ_NR 6 90#define SE7722_FPGA_IRQ_NR 6
97 91
92struct irq_domain;
93
98/* arch/sh/boards/se/7722/irq.c */ 94/* arch/sh/boards/se/7722/irq.c */
99extern unsigned int se7722_fpga_irq[]; 95extern struct irq_domain *se7722_irq_domain;
100 96
101void init_se7722_IRQ(void); 97void init_se7722_IRQ(void);
102 98
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh7720.c b/arch/sh/kernel/cpu/sh3/serial-sh7720.c
index 8832c526cdf9..c4a0336660dd 100644
--- a/arch/sh/kernel/cpu/sh3/serial-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/serial-sh7720.c
@@ -2,7 +2,7 @@
2#include <linux/serial_core.h> 2#include <linux/serial_core.h>
3#include <linux/io.h> 3#include <linux/io.h>
4#include <cpu/serial.h> 4#include <cpu/serial.h>
5#include <asm/gpio.h> 5#include <cpu/gpio.h>
6 6
7static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag) 7static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag)
8{ 8{
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index ea01a72f1b94..53638e231cd0 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -283,7 +283,7 @@ int __init arch_clk_init(void)
283 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 283 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
284 284
285 if (!ret) 285 if (!ret)
286 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 286 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
287 287
288 return ret; 288 return ret;
289} 289}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index 7ac07b4f75de..22e485d1990b 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -276,7 +276,7 @@ int __init arch_clk_init(void)
276 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 276 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
277 277
278 if (!ret) 278 if (!ret)
279 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 279 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
280 280
281 return ret; 281 return ret;
282} 282}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 8e1f97010c0d..c4cb740e4d10 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -261,7 +261,7 @@ int __init arch_clk_init(void)
261 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 261 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
262 262
263 if (!ret) 263 if (!ret)
264 ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR); 264 ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
265 265
266 return ret; 266 return ret;
267} 267}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 35f75cf0c7e5..37c41c7747a3 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -311,7 +311,7 @@ int __init arch_clk_init(void)
311 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 311 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
312 312
313 if (!ret) 313 if (!ret)
314 ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR); 314 ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
315 315
316 return ret; 316 return ret;
317} 317}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 2a87901673fe..c87e78f73234 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -375,7 +375,7 @@ int __init arch_clk_init(void)
375 ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR); 375 ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
376 376
377 if (!ret) 377 if (!ret)
378 ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR); 378 ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
379 379
380 return ret; 380 return ret;
381} 381}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
index 1697642c1f73..deb683abacf0 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
@@ -260,7 +260,7 @@ int __init arch_clk_init(void)
260 &div4_table); 260 &div4_table);
261 261
262 if (!ret) 262 if (!ret)
263 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 263 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
264 264
265 return ret; 265 return ret;
266} 266}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index 04ab5aeaf920..e84a43229b9c 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -148,7 +148,7 @@ int __init arch_clk_init(void)
148 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 148 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
149 &div4_table); 149 &div4_table);
150 if (!ret) 150 if (!ret)
151 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 151 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
152 152
153 return ret; 153 return ret;
154} 154}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index ab1c58f2d101..1c83788db76a 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -175,7 +175,7 @@ int __init arch_clk_init(void)
175 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 175 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
176 &div4_table); 176 &div4_table);
177 if (!ret) 177 if (!ret)
178 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 178 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
179 179
180 return ret; 180 return ret;
181} 181}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index 491709483e10..8bba6f159023 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -194,7 +194,7 @@ int __init arch_clk_init(void)
194 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 194 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
195 &div4_table); 195 &div4_table);
196 if (!ret) 196 if (!ret)
197 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 197 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
198 198
199 return ret; 199 return ret;
200} 200}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index 0f11b392bf46..a9422dab0ce7 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -149,7 +149,7 @@ int __init arch_clk_init(void)
149 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 149 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
150 &div4_table); 150 &div4_table);
151 if (!ret) 151 if (!ret)
152 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 152 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
153 153
154 return ret; 154 return ret;
155} 155}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 0f5a21907da6..65786c7f5ded 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -512,7 +512,6 @@ static struct platform_device tmu2_device = {
512}; 512};
513 513
514static struct siu_platform siu_platform_data = { 514static struct siu_platform siu_platform_data = {
515 .dma_dev = &dma_device.dev,
516 .dma_slave_tx_a = SHDMA_SLAVE_SIUA_TX, 515 .dma_slave_tx_a = SHDMA_SLAVE_SIUA_TX,
517 .dma_slave_rx_a = SHDMA_SLAVE_SIUA_RX, 516 .dma_slave_rx_a = SHDMA_SLAVE_SIUA_RX,
518 .dma_slave_tx_b = SHDMA_SLAVE_SIUB_TX, 517 .dma_slave_tx_b = SHDMA_SLAVE_SIUB_TX,
diff --git a/arch/sh/kernel/cpu/sh5/unwind.c b/arch/sh/kernel/cpu/sh5/unwind.c
index b205b25eaf45..10aed41757fc 100644
--- a/arch/sh/kernel/cpu/sh5/unwind.c
+++ b/arch/sh/kernel/cpu/sh5/unwind.c
@@ -16,6 +16,8 @@
16#include <asm/ptrace.h> 16#include <asm/ptrace.h>
17#include <asm/processor.h> 17#include <asm/processor.h>
18#include <asm/io.h> 18#include <asm/io.h>
19#include <asm/unwinder.h>
20#include <asm/stacktrace.h>
19 21
20static u8 regcache[63]; 22static u8 regcache[63];
21 23
@@ -199,8 +201,11 @@ static int lookup_prev_stack_frame(unsigned long fp, unsigned long pc,
199 return 0; 201 return 0;
200} 202}
201 203
202/* Don't put this on the stack since we'll want to call sh64_unwind 204/*
203 * when we're close to underflowing the stack anyway. */ 205 * Don't put this on the stack since we'll want to call in to
206 * sh64_unwinder_dump() when we're close to underflowing the stack
207 * anyway.
208 */
204static struct pt_regs here_regs; 209static struct pt_regs here_regs;
205 210
206extern const char syscall_ret; 211extern const char syscall_ret;
@@ -208,17 +213,19 @@ extern const char ret_from_syscall;
208extern const char ret_from_exception; 213extern const char ret_from_exception;
209extern const char ret_from_irq; 214extern const char ret_from_irq;
210 215
211static void sh64_unwind_inner(struct pt_regs *regs); 216static void sh64_unwind_inner(const struct stacktrace_ops *ops,
217 void *data, struct pt_regs *regs);
212 218
213static void unwind_nested (unsigned long pc, unsigned long fp) 219static inline void unwind_nested(const struct stacktrace_ops *ops, void *data,
220 unsigned long pc, unsigned long fp)
214{ 221{
215 if ((fp >= __MEMORY_START) && 222 if ((fp >= __MEMORY_START) &&
216 ((fp & 7) == 0)) { 223 ((fp & 7) == 0))
217 sh64_unwind_inner((struct pt_regs *) fp); 224 sh64_unwind_inner(ops, data, (struct pt_regs *)fp);
218 }
219} 225}
220 226
221static void sh64_unwind_inner(struct pt_regs *regs) 227static void sh64_unwind_inner(const struct stacktrace_ops *ops,
228 void *data, struct pt_regs *regs)
222{ 229{
223 unsigned long pc, fp; 230 unsigned long pc, fp;
224 int ofs = 0; 231 int ofs = 0;
@@ -232,29 +239,29 @@ static void sh64_unwind_inner(struct pt_regs *regs)
232 int cond; 239 int cond;
233 unsigned long next_fp, next_pc; 240 unsigned long next_fp, next_pc;
234 241
235 if (pc == ((unsigned long) &syscall_ret & ~1)) { 242 if (pc == ((unsigned long)&syscall_ret & ~1)) {
236 printk("SYSCALL\n"); 243 printk("SYSCALL\n");
237 unwind_nested(pc,fp); 244 unwind_nested(ops, data, pc, fp);
238 return; 245 return;
239 } 246 }
240 247
241 if (pc == ((unsigned long) &ret_from_syscall & ~1)) { 248 if (pc == ((unsigned long)&ret_from_syscall & ~1)) {
242 printk("SYSCALL (PREEMPTED)\n"); 249 printk("SYSCALL (PREEMPTED)\n");
243 unwind_nested(pc,fp); 250 unwind_nested(ops, data, pc, fp);
244 return; 251 return;
245 } 252 }
246 253
247 /* In this case, the PC is discovered by lookup_prev_stack_frame but 254 /* In this case, the PC is discovered by lookup_prev_stack_frame but
248 it has 4 taken off it to look like the 'caller' */ 255 it has 4 taken off it to look like the 'caller' */
249 if (pc == ((unsigned long) &ret_from_exception & ~1)) { 256 if (pc == ((unsigned long)&ret_from_exception & ~1)) {
250 printk("EXCEPTION\n"); 257 printk("EXCEPTION\n");
251 unwind_nested(pc,fp); 258 unwind_nested(ops, data, pc, fp);
252 return; 259 return;
253 } 260 }
254 261
255 if (pc == ((unsigned long) &ret_from_irq & ~1)) { 262 if (pc == ((unsigned long)&ret_from_irq & ~1)) {
256 printk("IRQ\n"); 263 printk("IRQ\n");
257 unwind_nested(pc,fp); 264 unwind_nested(ops, data, pc, fp);
258 return; 265 return;
259 } 266 }
260 267
@@ -263,8 +270,7 @@ static void sh64_unwind_inner(struct pt_regs *regs)
263 270
264 pc -= ofs; 271 pc -= ofs;
265 272
266 printk("[<%08lx>] ", pc); 273 ops->address(data, pc, 1);
267 print_symbol("%s\n", pc);
268 274
269 if (first_pass) { 275 if (first_pass) {
270 /* If the innermost frame is a leaf function, it's 276 /* If the innermost frame is a leaf function, it's
@@ -287,10 +293,13 @@ static void sh64_unwind_inner(struct pt_regs *regs)
287 } 293 }
288 294
289 printk("\n"); 295 printk("\n");
290
291} 296}
292 297
293void sh64_unwind(struct pt_regs *regs) 298static void sh64_unwinder_dump(struct task_struct *task,
299 struct pt_regs *regs,
300 unsigned long *sp,
301 const struct stacktrace_ops *ops,
302 void *data)
294{ 303{
295 if (!regs) { 304 if (!regs) {
296 /* 305 /*
@@ -320,7 +329,17 @@ void sh64_unwind(struct pt_regs *regs)
320 ); 329 );
321 } 330 }
322 331
323 printk("\nCall Trace:\n"); 332 sh64_unwind_inner(ops, data, regs);
324 sh64_unwind_inner(regs);
325} 333}
326 334
335static struct unwinder sh64_unwinder = {
336 .name = "sh64-unwinder",
337 .dump = sh64_unwinder_dump,
338 .rating = 150,
339};
340
341static int __init sh64_unwinder_init(void)
342{
343 return unwinder_register(&sh64_unwinder);
344}
345early_initcall(sh64_unwinder_init);
diff --git a/arch/sh/kernel/dumpstack.c b/arch/sh/kernel/dumpstack.c
index 694158b9a50f..7617dc4129ac 100644
--- a/arch/sh/kernel/dumpstack.c
+++ b/arch/sh/kernel/dumpstack.c
@@ -2,13 +2,48 @@
2 * Copyright (C) 1991, 1992 Linus Torvalds 2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 * Copyright (C) 2009 Matt Fleming 4 * Copyright (C) 2009 Matt Fleming
5 * Copyright (C) 2002 - 2012 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
5 */ 10 */
6#include <linux/kallsyms.h> 11#include <linux/kallsyms.h>
7#include <linux/ftrace.h> 12#include <linux/ftrace.h>
8#include <linux/debug_locks.h> 13#include <linux/debug_locks.h>
14#include <linux/kdebug.h>
15#include <linux/export.h>
16#include <linux/uaccess.h>
9#include <asm/unwinder.h> 17#include <asm/unwinder.h>
10#include <asm/stacktrace.h> 18#include <asm/stacktrace.h>
11 19
20void dump_mem(const char *str, unsigned long bottom, unsigned long top)
21{
22 unsigned long p;
23 int i;
24
25 printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
26
27 for (p = bottom & ~31; p < top; ) {
28 printk("%04lx: ", p & 0xffff);
29
30 for (i = 0; i < 8; i++, p += 4) {
31 unsigned int val;
32
33 if (p < bottom || p >= top)
34 printk(" ");
35 else {
36 if (__get_user(val, (unsigned int __user *)p)) {
37 printk("\n");
38 return;
39 }
40 printk("%08x ", val);
41 }
42 }
43 printk("\n");
44 }
45}
46
12void printk_address(unsigned long address, int reliable) 47void printk_address(unsigned long address, int reliable)
13{ 48{
14 printk(" [<%p>] %s%pS\n", (void *) address, 49 printk(" [<%p>] %s%pS\n", (void *) address,
@@ -106,3 +141,26 @@ void show_trace(struct task_struct *tsk, unsigned long *sp,
106 141
107 debug_show_held_locks(tsk); 142 debug_show_held_locks(tsk);
108} 143}
144
145void show_stack(struct task_struct *tsk, unsigned long *sp)
146{
147 unsigned long stack;
148
149 if (!tsk)
150 tsk = current;
151 if (tsk == current)
152 sp = (unsigned long *)current_stack_pointer;
153 else
154 sp = (unsigned long *)tsk->thread.sp;
155
156 stack = (unsigned long)sp;
157 dump_mem("Stack: ", stack, THREAD_SIZE +
158 (unsigned long)task_stack_page(tsk));
159 show_trace(tsk, sp, NULL);
160}
161
162void dump_stack(void)
163{
164 show_stack(NULL, NULL);
165}
166EXPORT_SYMBOL(dump_stack);
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index dadce735f746..063af10ff3c1 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -231,16 +231,6 @@ void __init init_IRQ(void)
231 irq_ctx_init(smp_processor_id()); 231 irq_ctx_init(smp_processor_id());
232} 232}
233 233
234#ifdef CONFIG_SPARSE_IRQ
235int __init arch_probe_nr_irqs(void)
236{
237 /*
238 * No pre-allocated IRQs.
239 */
240 return 0;
241}
242#endif
243
244#ifdef CONFIG_HOTPLUG_CPU 234#ifdef CONFIG_HOTPLUG_CPU
245static void route_irq(struct irq_data *data, unsigned int irq, unsigned int cpu) 235static void route_irq(struct irq_data *data, unsigned int irq, unsigned int cpu)
246{ 236{
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index a87e58a9e38f..72246bc06884 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -6,9 +6,80 @@
6#include <linux/sched.h> 6#include <linux/sched.h>
7#include <linux/uaccess.h> 7#include <linux/uaccess.h>
8#include <linux/hardirq.h> 8#include <linux/hardirq.h>
9#include <linux/kernel.h>
10#include <linux/kexec.h>
11#include <linux/module.h>
9#include <asm/unwinder.h> 12#include <asm/unwinder.h>
10#include <asm/traps.h> 13#include <asm/traps.h>
11 14
15static DEFINE_SPINLOCK(die_lock);
16
17void die(const char *str, struct pt_regs *regs, long err)
18{
19 static int die_counter;
20
21 oops_enter();
22
23 spin_lock_irq(&die_lock);
24 console_verbose();
25 bust_spinlocks(1);
26
27 printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
28 print_modules();
29 show_regs(regs);
30
31 printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm,
32 task_pid_nr(current), task_stack_page(current) + 1);
33
34 if (!user_mode(regs) || in_interrupt())
35 dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
36 (unsigned long)task_stack_page(current));
37
38 notify_die(DIE_OOPS, str, regs, err, 255, SIGSEGV);
39
40 bust_spinlocks(0);
41 add_taint(TAINT_DIE);
42 spin_unlock_irq(&die_lock);
43 oops_exit();
44
45 if (kexec_should_crash(current))
46 crash_kexec(regs);
47
48 if (in_interrupt())
49 panic("Fatal exception in interrupt");
50
51 if (panic_on_oops)
52 panic("Fatal exception");
53
54 do_exit(SIGSEGV);
55}
56
57void die_if_kernel(const char *str, struct pt_regs *regs, long err)
58{
59 if (!user_mode(regs))
60 die(str, regs, err);
61}
62
63/*
64 * try and fix up kernelspace address errors
65 * - userspace errors just cause EFAULT to be returned, resulting in SEGV
66 * - kernel/userspace interfaces cause a jump to an appropriate handler
67 * - other kernel errors are bad
68 */
69void die_if_no_fixup(const char *str, struct pt_regs *regs, long err)
70{
71 if (!user_mode(regs)) {
72 const struct exception_table_entry *fixup;
73 fixup = search_exception_tables(regs->pc);
74 if (fixup) {
75 regs->pc = fixup->fixup;
76 return;
77 }
78
79 die(str, regs, err);
80 }
81}
82
12#ifdef CONFIG_GENERIC_BUG 83#ifdef CONFIG_GENERIC_BUG
13static void handle_BUG(struct pt_regs *regs) 84static void handle_BUG(struct pt_regs *regs)
14{ 85{
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index a37175deb73f..5f513a64dedf 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -16,13 +16,11 @@
16#include <linux/hardirq.h> 16#include <linux/hardirq.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/spinlock.h> 18#include <linux/spinlock.h>
19#include <linux/module.h>
20#include <linux/kallsyms.h> 19#include <linux/kallsyms.h>
21#include <linux/io.h> 20#include <linux/io.h>
22#include <linux/bug.h> 21#include <linux/bug.h>
23#include <linux/debug_locks.h> 22#include <linux/debug_locks.h>
24#include <linux/kdebug.h> 23#include <linux/kdebug.h>
25#include <linux/kexec.h>
26#include <linux/limits.h> 24#include <linux/limits.h>
27#include <linux/sysfs.h> 25#include <linux/sysfs.h>
28#include <linux/uaccess.h> 26#include <linux/uaccess.h>
@@ -48,102 +46,6 @@
48#define TRAP_ILLEGAL_SLOT_INST 13 46#define TRAP_ILLEGAL_SLOT_INST 13
49#endif 47#endif
50 48
51static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
52{
53 unsigned long p;
54 int i;
55
56 printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
57
58 for (p = bottom & ~31; p < top; ) {
59 printk("%04lx: ", p & 0xffff);
60
61 for (i = 0; i < 8; i++, p += 4) {
62 unsigned int val;
63
64 if (p < bottom || p >= top)
65 printk(" ");
66 else {
67 if (__get_user(val, (unsigned int __user *)p)) {
68 printk("\n");
69 return;
70 }
71 printk("%08x ", val);
72 }
73 }
74 printk("\n");
75 }
76}
77
78static DEFINE_SPINLOCK(die_lock);
79
80void die(const char * str, struct pt_regs * regs, long err)
81{
82 static int die_counter;
83
84 oops_enter();
85
86 spin_lock_irq(&die_lock);
87 console_verbose();
88 bust_spinlocks(1);
89
90 printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
91 print_modules();
92 show_regs(regs);
93
94 printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm,
95 task_pid_nr(current), task_stack_page(current) + 1);
96
97 if (!user_mode(regs) || in_interrupt())
98 dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
99 (unsigned long)task_stack_page(current));
100
101 notify_die(DIE_OOPS, str, regs, err, 255, SIGSEGV);
102
103 bust_spinlocks(0);
104 add_taint(TAINT_DIE);
105 spin_unlock_irq(&die_lock);
106 oops_exit();
107
108 if (kexec_should_crash(current))
109 crash_kexec(regs);
110
111 if (in_interrupt())
112 panic("Fatal exception in interrupt");
113
114 if (panic_on_oops)
115 panic("Fatal exception");
116
117 do_exit(SIGSEGV);
118}
119
120static inline void die_if_kernel(const char *str, struct pt_regs *regs,
121 long err)
122{
123 if (!user_mode(regs))
124 die(str, regs, err);
125}
126
127/*
128 * try and fix up kernelspace address errors
129 * - userspace errors just cause EFAULT to be returned, resulting in SEGV
130 * - kernel/userspace interfaces cause a jump to an appropriate handler
131 * - other kernel errors are bad
132 */
133static void die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
134{
135 if (!user_mode(regs)) {
136 const struct exception_table_entry *fixup;
137 fixup = search_exception_tables(regs->pc);
138 if (fixup) {
139 regs->pc = fixup->fixup;
140 return;
141 }
142
143 die(str, regs, err);
144 }
145}
146
147static inline void sign_extend(unsigned int count, unsigned char *dst) 49static inline void sign_extend(unsigned int count, unsigned char *dst)
148{ 50{
149#ifdef __LITTLE_ENDIAN__ 51#ifdef __LITTLE_ENDIAN__
@@ -900,26 +802,3 @@ void __init trap_init(void)
900 set_exception_table_vec(TRAP_UBC, breakpoint_trap_handler); 802 set_exception_table_vec(TRAP_UBC, breakpoint_trap_handler);
901#endif 803#endif
902} 804}
903
904void show_stack(struct task_struct *tsk, unsigned long *sp)
905{
906 unsigned long stack;
907
908 if (!tsk)
909 tsk = current;
910 if (tsk == current)
911 sp = (unsigned long *)current_stack_pointer;
912 else
913 sp = (unsigned long *)tsk->thread.sp;
914
915 stack = (unsigned long)sp;
916 dump_mem("Stack: ", stack, THREAD_SIZE +
917 (unsigned long)task_stack_page(tsk));
918 show_trace(tsk, sp, NULL);
919}
920
921void dump_stack(void)
922{
923 show_stack(NULL, NULL);
924}
925EXPORT_SYMBOL(dump_stack);
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index 8dae93ed8aff..f87d20da1791 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -27,283 +27,25 @@
27#include <linux/perf_event.h> 27#include <linux/perf_event.h>
28#include <asm/uaccess.h> 28#include <asm/uaccess.h>
29#include <asm/io.h> 29#include <asm/io.h>
30#include <linux/atomic.h> 30#include <asm/alignment.h>
31#include <asm/processor.h> 31#include <asm/processor.h>
32#include <asm/pgtable.h> 32#include <asm/pgtable.h>
33#include <asm/fpu.h> 33#include <asm/fpu.h>
34 34
35#undef DEBUG_EXCEPTION 35static int read_opcode(reg_size_t pc, insn_size_t *result_opcode, int from_user_mode)
36#ifdef DEBUG_EXCEPTION
37/* implemented in ../lib/dbg.c */
38extern void show_excp_regs(char *fname, int trapnr, int signr,
39 struct pt_regs *regs);
40#else
41#define show_excp_regs(a, b, c, d)
42#endif
43
44static void do_unhandled_exception(int trapnr, int signr, char *str, char *fn_name,
45 unsigned long error_code, struct pt_regs *regs, struct task_struct *tsk);
46
47#define DO_ERROR(trapnr, signr, str, name, tsk) \
48asmlinkage void do_##name(unsigned long error_code, struct pt_regs *regs) \
49{ \
50 do_unhandled_exception(trapnr, signr, str, __stringify(name), error_code, regs, current); \
51}
52
53static DEFINE_SPINLOCK(die_lock);
54
55void die(const char * str, struct pt_regs * regs, long err)
56{
57 console_verbose();
58 spin_lock_irq(&die_lock);
59 printk("%s: %lx\n", str, (err & 0xffffff));
60 show_regs(regs);
61 spin_unlock_irq(&die_lock);
62 do_exit(SIGSEGV);
63}
64
65static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
66{
67 if (!user_mode(regs))
68 die(str, regs, err);
69}
70
71static void die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
72{
73 if (!user_mode(regs)) {
74 const struct exception_table_entry *fixup;
75 fixup = search_exception_tables(regs->pc);
76 if (fixup) {
77 regs->pc = fixup->fixup;
78 return;
79 }
80 die(str, regs, err);
81 }
82}
83
84DO_ERROR(13, SIGILL, "illegal slot instruction", illegal_slot_inst, current)
85DO_ERROR(87, SIGSEGV, "address error (exec)", address_error_exec, current)
86
87
88/* Implement misaligned load/store handling for kernel (and optionally for user
89 mode too). Limitation : only SHmedia mode code is handled - there is no
90 handling at all for misaligned accesses occurring in SHcompact code yet. */
91
92static int misaligned_fixup(struct pt_regs *regs);
93
94asmlinkage void do_address_error_load(unsigned long error_code, struct pt_regs *regs)
95{
96 if (misaligned_fixup(regs) < 0) {
97 do_unhandled_exception(7, SIGSEGV, "address error(load)",
98 "do_address_error_load",
99 error_code, regs, current);
100 }
101 return;
102}
103
104asmlinkage void do_address_error_store(unsigned long error_code, struct pt_regs *regs)
105{
106 if (misaligned_fixup(regs) < 0) {
107 do_unhandled_exception(8, SIGSEGV, "address error(store)",
108 "do_address_error_store",
109 error_code, regs, current);
110 }
111 return;
112}
113
114#if defined(CONFIG_SH64_ID2815_WORKAROUND)
115
116#define OPCODE_INVALID 0
117#define OPCODE_USER_VALID 1
118#define OPCODE_PRIV_VALID 2
119
120/* getcon/putcon - requires checking which control register is referenced. */
121#define OPCODE_CTRL_REG 3
122
123/* Table of valid opcodes for SHmedia mode.
124 Form a 10-bit value by concatenating the major/minor opcodes i.e.
125 opcode[31:26,20:16]. The 6 MSBs of this value index into the following
126 array. The 4 LSBs select the bit-pair in the entry (bits 1:0 correspond to
127 LSBs==4'b0000 etc). */
128static unsigned long shmedia_opcode_table[64] = {
129 0x55554044,0x54445055,0x15141514,0x14541414,0x00000000,0x10001000,0x01110055,0x04050015,
130 0x00000444,0xc0000000,0x44545515,0x40405555,0x55550015,0x10005555,0x55555505,0x04050000,
131 0x00000555,0x00000404,0x00040445,0x15151414,0x00000000,0x00000000,0x00000000,0x00000000,
132 0x00000055,0x40404444,0x00000404,0xc0009495,0x00000000,0x00000000,0x00000000,0x00000000,
133 0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
134 0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
135 0x80005050,0x04005055,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
136 0x81055554,0x00000404,0x55555555,0x55555555,0x00000000,0x00000000,0x00000000,0x00000000
137};
138
139void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
140{
141 /* Workaround SH5-101 cut2 silicon defect #2815 :
142 in some situations, inter-mode branches from SHcompact -> SHmedia
143 which should take ITLBMISS or EXECPROT exceptions at the target
144 falsely take RESINST at the target instead. */
145
146 unsigned long opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
147 unsigned long pc, aligned_pc;
148 int get_user_error;
149 int trapnr = 12;
150 int signr = SIGILL;
151 char *exception_name = "reserved_instruction";
152
153 pc = regs->pc;
154 if ((pc & 3) == 1) {
155 /* SHmedia : check for defect. This requires executable vmas
156 to be readable too. */
157 aligned_pc = pc & ~3;
158 if (!access_ok(VERIFY_READ, aligned_pc, sizeof(unsigned long))) {
159 get_user_error = -EFAULT;
160 } else {
161 get_user_error = __get_user(opcode, (unsigned long *)aligned_pc);
162 }
163 if (get_user_error >= 0) {
164 unsigned long index, shift;
165 unsigned long major, minor, combined;
166 unsigned long reserved_field;
167 reserved_field = opcode & 0xf; /* These bits are currently reserved as zero in all valid opcodes */
168 major = (opcode >> 26) & 0x3f;
169 minor = (opcode >> 16) & 0xf;
170 combined = (major << 4) | minor;
171 index = major;
172 shift = minor << 1;
173 if (reserved_field == 0) {
174 int opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
175 switch (opcode_state) {
176 case OPCODE_INVALID:
177 /* Trap. */
178 break;
179 case OPCODE_USER_VALID:
180 /* Restart the instruction : the branch to the instruction will now be from an RTE
181 not from SHcompact so the silicon defect won't be triggered. */
182 return;
183 case OPCODE_PRIV_VALID:
184 if (!user_mode(regs)) {
185 /* Should only ever get here if a module has
186 SHcompact code inside it. If so, the same fix up is needed. */
187 return; /* same reason */
188 }
189 /* Otherwise, user mode trying to execute a privileged instruction -
190 fall through to trap. */
191 break;
192 case OPCODE_CTRL_REG:
193 /* If in privileged mode, return as above. */
194 if (!user_mode(regs)) return;
195 /* In user mode ... */
196 if (combined == 0x9f) { /* GETCON */
197 unsigned long regno = (opcode >> 20) & 0x3f;
198 if (regno >= 62) {
199 return;
200 }
201 /* Otherwise, reserved or privileged control register, => trap */
202 } else if (combined == 0x1bf) { /* PUTCON */
203 unsigned long regno = (opcode >> 4) & 0x3f;
204 if (regno >= 62) {
205 return;
206 }
207 /* Otherwise, reserved or privileged control register, => trap */
208 } else {
209 /* Trap */
210 }
211 break;
212 default:
213 /* Fall through to trap. */
214 break;
215 }
216 }
217 /* fall through to normal resinst processing */
218 } else {
219 /* Error trying to read opcode. This typically means a
220 real fault, not a RESINST any more. So change the
221 codes. */
222 trapnr = 87;
223 exception_name = "address error (exec)";
224 signr = SIGSEGV;
225 }
226 }
227
228 do_unhandled_exception(trapnr, signr, exception_name, "do_reserved_inst", error_code, regs, current);
229}
230
231#else /* CONFIG_SH64_ID2815_WORKAROUND */
232
233/* If the workaround isn't needed, this is just a straightforward reserved
234 instruction */
235DO_ERROR(12, SIGILL, "reserved instruction", reserved_inst, current)
236
237#endif /* CONFIG_SH64_ID2815_WORKAROUND */
238
239/* Called with interrupts disabled */
240asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
241{
242 show_excp_regs(__func__, -1, -1, regs);
243 die_if_kernel("exception", regs, ex);
244}
245
246int do_unknown_trapa(unsigned long scId, struct pt_regs *regs)
247{
248 /* Syscall debug */
249 printk("System call ID error: [0x1#args:8 #syscall:16 0x%lx]\n", scId);
250
251 die_if_kernel("unknown trapa", regs, scId);
252
253 return -ENOSYS;
254}
255
256void show_stack(struct task_struct *tsk, unsigned long *sp)
257{
258#ifdef CONFIG_KALLSYMS
259 extern void sh64_unwind(struct pt_regs *regs);
260 struct pt_regs *regs;
261
262 regs = tsk ? tsk->thread.kregs : NULL;
263
264 sh64_unwind(regs);
265#else
266 printk(KERN_ERR "Can't backtrace on sh64 without CONFIG_KALLSYMS\n");
267#endif
268}
269
270void show_task(unsigned long *sp)
271{
272 show_stack(NULL, sp);
273}
274
275void dump_stack(void)
276{
277 show_task(NULL);
278}
279/* Needed by any user of WARN_ON in view of the defn in include/asm-sh/bug.h */
280EXPORT_SYMBOL(dump_stack);
281
282static void do_unhandled_exception(int trapnr, int signr, char *str, char *fn_name,
283 unsigned long error_code, struct pt_regs *regs, struct task_struct *tsk)
284{
285 show_excp_regs(fn_name, trapnr, signr, regs);
286
287 if (user_mode(regs))
288 force_sig(signr, tsk);
289
290 die_if_no_fixup(str, regs, error_code);
291}
292
293static int read_opcode(unsigned long long pc, unsigned long *result_opcode, int from_user_mode)
294{ 36{
295 int get_user_error; 37 int get_user_error;
296 unsigned long aligned_pc; 38 unsigned long aligned_pc;
297 unsigned long opcode; 39 insn_size_t opcode;
298 40
299 if ((pc & 3) == 1) { 41 if ((pc & 3) == 1) {
300 /* SHmedia */ 42 /* SHmedia */
301 aligned_pc = pc & ~3; 43 aligned_pc = pc & ~3;
302 if (from_user_mode) { 44 if (from_user_mode) {
303 if (!access_ok(VERIFY_READ, aligned_pc, sizeof(unsigned long))) { 45 if (!access_ok(VERIFY_READ, aligned_pc, sizeof(insn_size_t))) {
304 get_user_error = -EFAULT; 46 get_user_error = -EFAULT;
305 } else { 47 } else {
306 get_user_error = __get_user(opcode, (unsigned long *)aligned_pc); 48 get_user_error = __get_user(opcode, (insn_size_t *)aligned_pc);
307 *result_opcode = opcode; 49 *result_opcode = opcode;
308 } 50 }
309 return get_user_error; 51 return get_user_error;
@@ -311,7 +53,7 @@ static int read_opcode(unsigned long long pc, unsigned long *result_opcode, int
311 /* If the fault was in the kernel, we can either read 53 /* If the fault was in the kernel, we can either read
312 * this directly, or if not, we fault. 54 * this directly, or if not, we fault.
313 */ 55 */
314 *result_opcode = *(unsigned long *) aligned_pc; 56 *result_opcode = *(insn_size_t *)aligned_pc;
315 return 0; 57 return 0;
316 } 58 }
317 } else if ((pc & 1) == 0) { 59 } else if ((pc & 1) == 0) {
@@ -337,17 +79,23 @@ static int address_is_sign_extended(__u64 a)
337#endif 79#endif
338} 80}
339 81
82/* return -1 for fault, 0 for OK */
340static int generate_and_check_address(struct pt_regs *regs, 83static int generate_and_check_address(struct pt_regs *regs,
341 __u32 opcode, 84 insn_size_t opcode,
342 int displacement_not_indexed, 85 int displacement_not_indexed,
343 int width_shift, 86 int width_shift,
344 __u64 *address) 87 __u64 *address)
345{ 88{
346 /* return -1 for fault, 0 for OK */
347
348 __u64 base_address, addr; 89 __u64 base_address, addr;
349 int basereg; 90 int basereg;
350 91
92 switch (1 << width_shift) {
93 case 1: inc_unaligned_byte_access(); break;
94 case 2: inc_unaligned_word_access(); break;
95 case 4: inc_unaligned_dword_access(); break;
96 case 8: inc_unaligned_multi_access(); break;
97 }
98
351 basereg = (opcode >> 20) & 0x3f; 99 basereg = (opcode >> 20) & 0x3f;
352 base_address = regs->regs[basereg]; 100 base_address = regs->regs[basereg];
353 if (displacement_not_indexed) { 101 if (displacement_not_indexed) {
@@ -364,28 +112,28 @@ static int generate_and_check_address(struct pt_regs *regs,
364 } 112 }
365 113
366 /* Check sign extended */ 114 /* Check sign extended */
367 if (!address_is_sign_extended(addr)) { 115 if (!address_is_sign_extended(addr))
368 return -1; 116 return -1;
369 }
370 117
371 /* Check accessible. For misaligned access in the kernel, assume the 118 /* Check accessible. For misaligned access in the kernel, assume the
372 address is always accessible (and if not, just fault when the 119 address is always accessible (and if not, just fault when the
373 load/store gets done.) */ 120 load/store gets done.) */
374 if (user_mode(regs)) { 121 if (user_mode(regs)) {
375 if (addr >= TASK_SIZE) { 122 inc_unaligned_user_access();
123
124 if (addr >= TASK_SIZE)
376 return -1; 125 return -1;
377 } 126 } else
378 /* Do access_ok check later - it depends on whether it's a load or a store. */ 127 inc_unaligned_kernel_access();
379 }
380 128
381 *address = addr; 129 *address = addr;
130
131 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, addr);
132 unaligned_fixups_notify(current, opcode, regs);
133
382 return 0; 134 return 0;
383} 135}
384 136
385static int user_mode_unaligned_fixup_count = 10;
386static int user_mode_unaligned_fixup_enable = 1;
387static int kernel_mode_unaligned_fixup_count = 32;
388
389static void misaligned_kernel_word_load(__u64 address, int do_sign_extend, __u64 *result) 137static void misaligned_kernel_word_load(__u64 address, int do_sign_extend, __u64 *result)
390{ 138{
391 unsigned short x; 139 unsigned short x;
@@ -415,7 +163,7 @@ static void misaligned_kernel_word_store(__u64 address, __u64 value)
415} 163}
416 164
417static int misaligned_load(struct pt_regs *regs, 165static int misaligned_load(struct pt_regs *regs,
418 __u32 opcode, 166 insn_size_t opcode,
419 int displacement_not_indexed, 167 int displacement_not_indexed,
420 int width_shift, 168 int width_shift,
421 int do_sign_extend) 169 int do_sign_extend)
@@ -427,11 +175,8 @@ static int misaligned_load(struct pt_regs *regs,
427 175
428 error = generate_and_check_address(regs, opcode, 176 error = generate_and_check_address(regs, opcode,
429 displacement_not_indexed, width_shift, &address); 177 displacement_not_indexed, width_shift, &address);
430 if (error < 0) { 178 if (error < 0)
431 return error; 179 return error;
432 }
433
434 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, address);
435 180
436 destreg = (opcode >> 4) & 0x3f; 181 destreg = (opcode >> 4) & 0x3f;
437 if (user_mode(regs)) { 182 if (user_mode(regs)) {
@@ -490,11 +235,10 @@ static int misaligned_load(struct pt_regs *regs,
490 } 235 }
491 236
492 return 0; 237 return 0;
493
494} 238}
495 239
496static int misaligned_store(struct pt_regs *regs, 240static int misaligned_store(struct pt_regs *regs,
497 __u32 opcode, 241 insn_size_t opcode,
498 int displacement_not_indexed, 242 int displacement_not_indexed,
499 int width_shift) 243 int width_shift)
500{ 244{
@@ -505,11 +249,8 @@ static int misaligned_store(struct pt_regs *regs,
505 249
506 error = generate_and_check_address(regs, opcode, 250 error = generate_and_check_address(regs, opcode,
507 displacement_not_indexed, width_shift, &address); 251 displacement_not_indexed, width_shift, &address);
508 if (error < 0) { 252 if (error < 0)
509 return error; 253 return error;
510 }
511
512 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, address);
513 254
514 srcreg = (opcode >> 4) & 0x3f; 255 srcreg = (opcode >> 4) & 0x3f;
515 if (user_mode(regs)) { 256 if (user_mode(regs)) {
@@ -563,13 +304,12 @@ static int misaligned_store(struct pt_regs *regs,
563 } 304 }
564 305
565 return 0; 306 return 0;
566
567} 307}
568 308
569/* Never need to fix up misaligned FPU accesses within the kernel since that's a real 309/* Never need to fix up misaligned FPU accesses within the kernel since that's a real
570 error. */ 310 error. */
571static int misaligned_fpu_load(struct pt_regs *regs, 311static int misaligned_fpu_load(struct pt_regs *regs,
572 __u32 opcode, 312 insn_size_t opcode,
573 int displacement_not_indexed, 313 int displacement_not_indexed,
574 int width_shift, 314 int width_shift,
575 int do_paired_load) 315 int do_paired_load)
@@ -581,11 +321,8 @@ static int misaligned_fpu_load(struct pt_regs *regs,
581 321
582 error = generate_and_check_address(regs, opcode, 322 error = generate_and_check_address(regs, opcode,
583 displacement_not_indexed, width_shift, &address); 323 displacement_not_indexed, width_shift, &address);
584 if (error < 0) { 324 if (error < 0)
585 return error; 325 return error;
586 }
587
588 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, address);
589 326
590 destreg = (opcode >> 4) & 0x3f; 327 destreg = (opcode >> 4) & 0x3f;
591 if (user_mode(regs)) { 328 if (user_mode(regs)) {
@@ -641,12 +378,10 @@ static int misaligned_fpu_load(struct pt_regs *regs,
641 die ("Misaligned FPU load inside kernel", regs, 0); 378 die ("Misaligned FPU load inside kernel", regs, 0);
642 return -1; 379 return -1;
643 } 380 }
644
645
646} 381}
647 382
648static int misaligned_fpu_store(struct pt_regs *regs, 383static int misaligned_fpu_store(struct pt_regs *regs,
649 __u32 opcode, 384 insn_size_t opcode,
650 int displacement_not_indexed, 385 int displacement_not_indexed,
651 int width_shift, 386 int width_shift,
652 int do_paired_load) 387 int do_paired_load)
@@ -658,11 +393,8 @@ static int misaligned_fpu_store(struct pt_regs *regs,
658 393
659 error = generate_and_check_address(regs, opcode, 394 error = generate_and_check_address(regs, opcode,
660 displacement_not_indexed, width_shift, &address); 395 displacement_not_indexed, width_shift, &address);
661 if (error < 0) { 396 if (error < 0)
662 return error; 397 return error;
663 }
664
665 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, address);
666 398
667 srcreg = (opcode >> 4) & 0x3f; 399 srcreg = (opcode >> 4) & 0x3f;
668 if (user_mode(regs)) { 400 if (user_mode(regs)) {
@@ -723,11 +455,13 @@ static int misaligned_fpu_store(struct pt_regs *regs,
723 455
724static int misaligned_fixup(struct pt_regs *regs) 456static int misaligned_fixup(struct pt_regs *regs)
725{ 457{
726 unsigned long opcode; 458 insn_size_t opcode;
727 int error; 459 int error;
728 int major, minor; 460 int major, minor;
461 unsigned int user_action;
729 462
730 if (!user_mode_unaligned_fixup_enable) 463 user_action = unaligned_user_action();
464 if (!(user_action & UM_FIXUP))
731 return -1; 465 return -1;
732 466
733 error = read_opcode(regs->pc, &opcode, user_mode(regs)); 467 error = read_opcode(regs->pc, &opcode, user_mode(regs));
@@ -737,23 +471,6 @@ static int misaligned_fixup(struct pt_regs *regs)
737 major = (opcode >> 26) & 0x3f; 471 major = (opcode >> 26) & 0x3f;
738 minor = (opcode >> 16) & 0xf; 472 minor = (opcode >> 16) & 0xf;
739 473
740 if (user_mode(regs) && (user_mode_unaligned_fixup_count > 0)) {
741 --user_mode_unaligned_fixup_count;
742 /* Only do 'count' worth of these reports, to remove a potential DoS against syslog */
743 printk("Fixing up unaligned userspace access in \"%s\" pid=%d pc=0x%08x ins=0x%08lx\n",
744 current->comm, task_pid_nr(current), (__u32)regs->pc, opcode);
745 } else if (!user_mode(regs) && (kernel_mode_unaligned_fixup_count > 0)) {
746 --kernel_mode_unaligned_fixup_count;
747 if (in_interrupt()) {
748 printk("Fixing up unaligned kernelspace access in interrupt pc=0x%08x ins=0x%08lx\n",
749 (__u32)regs->pc, opcode);
750 } else {
751 printk("Fixing up unaligned kernelspace access in \"%s\" pid=%d pc=0x%08x ins=0x%08lx\n",
752 current->comm, task_pid_nr(current), (__u32)regs->pc, opcode);
753 }
754 }
755
756
757 switch (major) { 474 switch (major) {
758 case (0x84>>2): /* LD.W */ 475 case (0x84>>2): /* LD.W */
759 error = misaligned_load(regs, opcode, 1, 1, 1); 476 error = misaligned_load(regs, opcode, 1, 1, 1);
@@ -878,59 +595,202 @@ static int misaligned_fixup(struct pt_regs *regs)
878 regs->pc += 4; /* Skip the instruction that's just been emulated */ 595 regs->pc += 4; /* Skip the instruction that's just been emulated */
879 return 0; 596 return 0;
880 } 597 }
598}
599
600static void do_unhandled_exception(int signr, char *str, unsigned long error,
601 struct pt_regs *regs)
602{
603 if (user_mode(regs))
604 force_sig(signr, current);
881 605
606 die_if_no_fixup(str, regs, error);
882} 607}
883 608
884static ctl_table unaligned_table[] = { 609#define DO_ERROR(signr, str, name) \
885 { 610asmlinkage void do_##name(unsigned long error_code, struct pt_regs *regs) \
886 .procname = "kernel_reports", 611{ \
887 .data = &kernel_mode_unaligned_fixup_count, 612 do_unhandled_exception(signr, str, error_code, regs); \
888 .maxlen = sizeof(int), 613}
889 .mode = 0644,
890 .proc_handler = proc_dointvec
891 },
892 {
893 .procname = "user_reports",
894 .data = &user_mode_unaligned_fixup_count,
895 .maxlen = sizeof(int),
896 .mode = 0644,
897 .proc_handler = proc_dointvec
898 },
899 {
900 .procname = "user_enable",
901 .data = &user_mode_unaligned_fixup_enable,
902 .maxlen = sizeof(int),
903 .mode = 0644,
904 .proc_handler = proc_dointvec},
905 {}
906};
907 614
908static ctl_table unaligned_root[] = { 615DO_ERROR(SIGILL, "illegal slot instruction", illegal_slot_inst)
909 { 616DO_ERROR(SIGSEGV, "address error (exec)", address_error_exec)
910 .procname = "unaligned_fixup", 617
911 .mode = 0555, 618#if defined(CONFIG_SH64_ID2815_WORKAROUND)
912 .child = unaligned_table 619
913 }, 620#define OPCODE_INVALID 0
914 {} 621#define OPCODE_USER_VALID 1
915}; 622#define OPCODE_PRIV_VALID 2
916 623
917static ctl_table sh64_root[] = { 624/* getcon/putcon - requires checking which control register is referenced. */
918 { 625#define OPCODE_CTRL_REG 3
919 .procname = "sh64", 626
920 .mode = 0555, 627/* Table of valid opcodes for SHmedia mode.
921 .child = unaligned_root 628 Form a 10-bit value by concatenating the major/minor opcodes i.e.
922 }, 629 opcode[31:26,20:16]. The 6 MSBs of this value index into the following
923 {} 630 array. The 4 LSBs select the bit-pair in the entry (bits 1:0 correspond to
631 LSBs==4'b0000 etc). */
632static unsigned long shmedia_opcode_table[64] = {
633 0x55554044,0x54445055,0x15141514,0x14541414,0x00000000,0x10001000,0x01110055,0x04050015,
634 0x00000444,0xc0000000,0x44545515,0x40405555,0x55550015,0x10005555,0x55555505,0x04050000,
635 0x00000555,0x00000404,0x00040445,0x15151414,0x00000000,0x00000000,0x00000000,0x00000000,
636 0x00000055,0x40404444,0x00000404,0xc0009495,0x00000000,0x00000000,0x00000000,0x00000000,
637 0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
638 0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
639 0x80005050,0x04005055,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
640 0x81055554,0x00000404,0x55555555,0x55555555,0x00000000,0x00000000,0x00000000,0x00000000
924}; 641};
925static struct ctl_table_header *sysctl_header; 642
926static int __init init_sysctl(void) 643/* Workaround SH5-101 cut2 silicon defect #2815 :
644 in some situations, inter-mode branches from SHcompact -> SHmedia
645 which should take ITLBMISS or EXECPROT exceptions at the target
646 falsely take RESINST at the target instead. */
647void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
927{ 648{
928 sysctl_header = register_sysctl_table(sh64_root); 649 insn_size_t opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
929 return 0; 650 unsigned long pc, aligned_pc;
651 unsigned long index, shift;
652 unsigned long major, minor, combined;
653 unsigned long reserved_field;
654 int opcode_state;
655 int get_user_error;
656 int signr = SIGILL;
657 char *exception_name = "reserved_instruction";
658
659 pc = regs->pc;
660
661 /* SHcompact is not handled */
662 if (unlikely((pc & 3) == 0))
663 goto out;
664
665 /* SHmedia : check for defect. This requires executable vmas
666 to be readable too. */
667 aligned_pc = pc & ~3;
668 if (!access_ok(VERIFY_READ, aligned_pc, sizeof(insn_size_t)))
669 get_user_error = -EFAULT;
670 else
671 get_user_error = __get_user(opcode, (insn_size_t *)aligned_pc);
672
673 if (get_user_error < 0) {
674 /*
675 * Error trying to read opcode. This typically means a
676 * real fault, not a RESINST any more. So change the
677 * codes.
678 */
679 exception_name = "address error (exec)";
680 signr = SIGSEGV;
681 goto out;
682 }
683
684 /* These bits are currently reserved as zero in all valid opcodes */
685 reserved_field = opcode & 0xf;
686 if (unlikely(reserved_field))
687 goto out; /* invalid opcode */
688
689 major = (opcode >> 26) & 0x3f;
690 minor = (opcode >> 16) & 0xf;
691 combined = (major << 4) | minor;
692 index = major;
693 shift = minor << 1;
694 opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
695 switch (opcode_state) {
696 case OPCODE_INVALID:
697 /* Trap. */
698 break;
699 case OPCODE_USER_VALID:
700 /*
701 * Restart the instruction: the branch to the instruction
702 * will now be from an RTE not from SHcompact so the
703 * silicon defect won't be triggered.
704 */
705 return;
706 case OPCODE_PRIV_VALID:
707 if (!user_mode(regs)) {
708 /*
709 * Should only ever get here if a module has
710 * SHcompact code inside it. If so, the same fix
711 * up is needed.
712 */
713 return; /* same reason */
714 }
715
716 /*
717 * Otherwise, user mode trying to execute a privileged
718 * instruction - fall through to trap.
719 */
720 break;
721 case OPCODE_CTRL_REG:
722 /* If in privileged mode, return as above. */
723 if (!user_mode(regs))
724 return;
725
726 /* In user mode ... */
727 if (combined == 0x9f) { /* GETCON */
728 unsigned long regno = (opcode >> 20) & 0x3f;
729
730 if (regno >= 62)
731 return;
732
733 /* reserved/privileged control register => trap */
734 } else if (combined == 0x1bf) { /* PUTCON */
735 unsigned long regno = (opcode >> 4) & 0x3f;
736
737 if (regno >= 62)
738 return;
739
740 /* reserved/privileged control register => trap */
741 }
742
743 break;
744 default:
745 /* Fall through to trap. */
746 break;
747 }
748
749out:
750 do_unhandled_exception(signr, exception_name, error_code, regs);
930} 751}
931 752
932__initcall(init_sysctl); 753#else /* CONFIG_SH64_ID2815_WORKAROUND */
933 754
755/* If the workaround isn't needed, this is just a straightforward reserved
756 instruction */
757DO_ERROR(SIGILL, "reserved instruction", reserved_inst)
758
759#endif /* CONFIG_SH64_ID2815_WORKAROUND */
760
761/* Called with interrupts disabled */
762asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
763{
764 die_if_kernel("exception", regs, ex);
765}
766
767asmlinkage int do_unknown_trapa(unsigned long scId, struct pt_regs *regs)
768{
769 /* Syscall debug */
770 printk("System call ID error: [0x1#args:8 #syscall:16 0x%lx]\n", scId);
771
772 die_if_kernel("unknown trapa", regs, scId);
773
774 return -ENOSYS;
775}
776
777/* Implement misaligned load/store handling for kernel (and optionally for user
778 mode too). Limitation : only SHmedia mode code is handled - there is no
779 handling at all for misaligned accesses occurring in SHcompact code yet. */
780
781asmlinkage void do_address_error_load(unsigned long error_code, struct pt_regs *regs)
782{
783 if (misaligned_fixup(regs) < 0)
784 do_unhandled_exception(SIGSEGV, "address error(load)",
785 error_code, regs);
786}
787
788asmlinkage void do_address_error_store(unsigned long error_code, struct pt_regs *regs)
789{
790 if (misaligned_fixup(regs) < 0)
791 do_unhandled_exception(SIGSEGV, "address error(store)",
792 error_code, regs);
793}
934 794
935asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs) 795asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
936{ 796{
@@ -942,10 +802,9 @@ asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
942 of access we make to them - just go direct to their physical 802 of access we make to them - just go direct to their physical
943 addresses. */ 803 addresses. */
944 exp_cause = peek_real_address_q(DM_EXP_CAUSE_PHY); 804 exp_cause = peek_real_address_q(DM_EXP_CAUSE_PHY);
945 if (exp_cause & ~4) { 805 if (exp_cause & ~4)
946 printk("DM.EXP_CAUSE had unexpected bits set (=%08lx)\n", 806 printk("DM.EXP_CAUSE had unexpected bits set (=%08lx)\n",
947 (unsigned long)(exp_cause & 0xffffffff)); 807 (unsigned long)(exp_cause & 0xffffffff));
948 }
949 show_state(); 808 show_state();
950 /* Clear all DEBUGINT causes */ 809 /* Clear all DEBUGINT causes */
951 poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0); 810 poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0);
diff --git a/arch/sh/lib64/Makefile b/arch/sh/lib64/Makefile
index 1fee75aa1f98..69779ff741df 100644
--- a/arch/sh/lib64/Makefile
+++ b/arch/sh/lib64/Makefile
@@ -10,7 +10,7 @@
10# 10#
11 11
12# Panic should really be compiled as PIC 12# Panic should really be compiled as PIC
13lib-y := udelay.o dbg.o panic.o memcpy.o memset.o \ 13lib-y := udelay.o panic.o memcpy.o memset.o \
14 copy_user_memcpy.o copy_page.o strcpy.o strlen.o 14 copy_user_memcpy.o copy_page.o strcpy.o strlen.o
15 15
16# Extracted from libgcc 16# Extracted from libgcc
diff --git a/arch/sh/lib64/dbg.c b/arch/sh/lib64/dbg.c
deleted file mode 100644
index 6152a6a6d9c6..000000000000
--- a/arch/sh/lib64/dbg.c
+++ /dev/null
@@ -1,248 +0,0 @@
1/*--------------------------------------------------------------------------
2--
3-- Identity : Linux50 Debug Funcions
4--
5-- File : arch/sh/lib64/dbg.c
6--
7-- Copyright 2000, 2001 STMicroelectronics Limited.
8-- Copyright 2004 Richard Curnow (evt_debug etc)
9--
10--------------------------------------------------------------------------*/
11#include <linux/types.h>
12#include <linux/kernel.h>
13#include <linux/sched.h>
14#include <linux/mm.h>
15#include <linux/fs.h>
16#include <asm/mmu_context.h>
17
18typedef u64 regType_t;
19
20static regType_t getConfigReg(u64 id)
21{
22 register u64 reg __asm__("r2");
23 asm volatile ("getcfg %1, 0, %0":"=r" (reg):"r"(id));
24 return (reg);
25}
26
27/* ======================================================================= */
28
29static char *szTab[] = { "4k", "64k", "1M", "512M" };
30static char *protTab[] = { "----",
31 "---R",
32 "--X-",
33 "--XR",
34 "-W--",
35 "-W-R",
36 "-WX-",
37 "-WXR",
38 "U---",
39 "U--R",
40 "U-X-",
41 "U-XR",
42 "UW--",
43 "UW-R",
44 "UWX-",
45 "UWXR"
46};
47#define ITLB_BASE 0x00000000
48#define DTLB_BASE 0x00800000
49#define MAX_TLBs 64
50/* PTE High */
51#define GET_VALID(pte) ((pte) & 0x1)
52#define GET_SHARED(pte) ((pte) & 0x2)
53#define GET_ASID(pte) ((pte >> 2) & 0x0ff)
54#define GET_EPN(pte) ((pte) & 0xfffff000)
55
56/* PTE Low */
57#define GET_CBEHAVIOR(pte) ((pte) & 0x3)
58#define GET_PAGE_SIZE(pte) szTab[((pte >> 3) & 0x3)]
59#define GET_PROTECTION(pte) protTab[((pte >> 6) & 0xf)]
60#define GET_PPN(pte) ((pte) & 0xfffff000)
61
62#define PAGE_1K_MASK 0x00000000
63#define PAGE_4K_MASK 0x00000010
64#define PAGE_64K_MASK 0x00000080
65#define MMU_PAGESIZE_MASK (PAGE_64K_MASK | PAGE_4K_MASK)
66#define PAGE_1MB_MASK MMU_PAGESIZE_MASK
67#define PAGE_1K (1024)
68#define PAGE_4K (1024 * 4)
69#define PAGE_64K (1024 * 64)
70#define PAGE_1MB (1024 * 1024)
71
72#define HOW_TO_READ_TLB_CONTENT \
73 "[ ID] PPN EPN ASID Share CB P.Size PROT.\n"
74
75void print_single_tlb(unsigned long tlb, int single_print)
76{
77 regType_t pteH;
78 regType_t pteL;
79 unsigned int valid, shared, asid, epn, cb, ppn;
80 char *pSize;
81 char *pProt;
82
83 /*
84 ** in case of single print <single_print> is true, this implies:
85 ** 1) print the TLB in any case also if NOT VALID
86 ** 2) print out the header
87 */
88
89 pteH = getConfigReg(tlb);
90 valid = GET_VALID(pteH);
91 if (single_print)
92 printk(HOW_TO_READ_TLB_CONTENT);
93 else if (!valid)
94 return;
95
96 pteL = getConfigReg(tlb + 1);
97
98 shared = GET_SHARED(pteH);
99 asid = GET_ASID(pteH);
100 epn = GET_EPN(pteH);
101 cb = GET_CBEHAVIOR(pteL);
102 pSize = GET_PAGE_SIZE(pteL);
103 pProt = GET_PROTECTION(pteL);
104 ppn = GET_PPN(pteL);
105 printk("[%c%2ld] 0x%08x 0x%08x %03d %02x %02x %4s %s\n",
106 ((valid) ? ' ' : 'u'), ((tlb & 0x0ffff) / TLB_STEP),
107 ppn, epn, asid, shared, cb, pSize, pProt);
108}
109
110void print_dtlb(void)
111{
112 int count;
113 unsigned long tlb;
114
115 printk(" ================= SH-5 D-TLBs Status ===================\n");
116 printk(HOW_TO_READ_TLB_CONTENT);
117 tlb = DTLB_BASE;
118 for (count = 0; count < MAX_TLBs; count++, tlb += TLB_STEP)
119 print_single_tlb(tlb, 0);
120 printk
121 (" =============================================================\n");
122}
123
124void print_itlb(void)
125{
126 int count;
127 unsigned long tlb;
128
129 printk(" ================= SH-5 I-TLBs Status ===================\n");
130 printk(HOW_TO_READ_TLB_CONTENT);
131 tlb = ITLB_BASE;
132 for (count = 0; count < MAX_TLBs; count++, tlb += TLB_STEP)
133 print_single_tlb(tlb, 0);
134 printk
135 (" =============================================================\n");
136}
137
138void show_excp_regs(char *from, int trapnr, int signr, struct pt_regs *regs)
139{
140
141 unsigned long long ah, al, bh, bl, ch, cl;
142
143 printk("\n");
144 printk("EXCEPTION - %s: task %d; Linux trap # %d; signal = %d\n",
145 ((from) ? from : "???"), current->pid, trapnr, signr);
146
147 asm volatile ("getcon " __EXPEVT ", %0":"=r"(ah));
148 asm volatile ("getcon " __EXPEVT ", %0":"=r"(al));
149 ah = (ah) >> 32;
150 al = (al) & 0xffffffff;
151 asm volatile ("getcon " __KCR1 ", %0":"=r"(bh));
152 asm volatile ("getcon " __KCR1 ", %0":"=r"(bl));
153 bh = (bh) >> 32;
154 bl = (bl) & 0xffffffff;
155 asm volatile ("getcon " __INTEVT ", %0":"=r"(ch));
156 asm volatile ("getcon " __INTEVT ", %0":"=r"(cl));
157 ch = (ch) >> 32;
158 cl = (cl) & 0xffffffff;
159 printk("EXPE: %08Lx%08Lx KCR1: %08Lx%08Lx INTE: %08Lx%08Lx\n",
160 ah, al, bh, bl, ch, cl);
161
162 asm volatile ("getcon " __PEXPEVT ", %0":"=r"(ah));
163 asm volatile ("getcon " __PEXPEVT ", %0":"=r"(al));
164 ah = (ah) >> 32;
165 al = (al) & 0xffffffff;
166 asm volatile ("getcon " __PSPC ", %0":"=r"(bh));
167 asm volatile ("getcon " __PSPC ", %0":"=r"(bl));
168 bh = (bh) >> 32;
169 bl = (bl) & 0xffffffff;
170 asm volatile ("getcon " __PSSR ", %0":"=r"(ch));
171 asm volatile ("getcon " __PSSR ", %0":"=r"(cl));
172 ch = (ch) >> 32;
173 cl = (cl) & 0xffffffff;
174 printk("PEXP: %08Lx%08Lx PSPC: %08Lx%08Lx PSSR: %08Lx%08Lx\n",
175 ah, al, bh, bl, ch, cl);
176
177 ah = (regs->pc) >> 32;
178 al = (regs->pc) & 0xffffffff;
179 bh = (regs->regs[18]) >> 32;
180 bl = (regs->regs[18]) & 0xffffffff;
181 ch = (regs->regs[15]) >> 32;
182 cl = (regs->regs[15]) & 0xffffffff;
183 printk("PC : %08Lx%08Lx LINK: %08Lx%08Lx SP : %08Lx%08Lx\n",
184 ah, al, bh, bl, ch, cl);
185
186 ah = (regs->sr) >> 32;
187 al = (regs->sr) & 0xffffffff;
188 asm volatile ("getcon " __TEA ", %0":"=r"(bh));
189 asm volatile ("getcon " __TEA ", %0":"=r"(bl));
190 bh = (bh) >> 32;
191 bl = (bl) & 0xffffffff;
192 asm volatile ("getcon " __KCR0 ", %0":"=r"(ch));
193 asm volatile ("getcon " __KCR0 ", %0":"=r"(cl));
194 ch = (ch) >> 32;
195 cl = (cl) & 0xffffffff;
196 printk("SR : %08Lx%08Lx TEA : %08Lx%08Lx KCR0: %08Lx%08Lx\n",
197 ah, al, bh, bl, ch, cl);
198
199 ah = (regs->regs[0]) >> 32;
200 al = (regs->regs[0]) & 0xffffffff;
201 bh = (regs->regs[1]) >> 32;
202 bl = (regs->regs[1]) & 0xffffffff;
203 ch = (regs->regs[2]) >> 32;
204 cl = (regs->regs[2]) & 0xffffffff;
205 printk("R0 : %08Lx%08Lx R1 : %08Lx%08Lx R2 : %08Lx%08Lx\n",
206 ah, al, bh, bl, ch, cl);
207
208 ah = (regs->regs[3]) >> 32;
209 al = (regs->regs[3]) & 0xffffffff;
210 bh = (regs->regs[4]) >> 32;
211 bl = (regs->regs[4]) & 0xffffffff;
212 ch = (regs->regs[5]) >> 32;
213 cl = (regs->regs[5]) & 0xffffffff;
214 printk("R3 : %08Lx%08Lx R4 : %08Lx%08Lx R5 : %08Lx%08Lx\n",
215 ah, al, bh, bl, ch, cl);
216
217 ah = (regs->regs[6]) >> 32;
218 al = (regs->regs[6]) & 0xffffffff;
219 bh = (regs->regs[7]) >> 32;
220 bl = (regs->regs[7]) & 0xffffffff;
221 ch = (regs->regs[8]) >> 32;
222 cl = (regs->regs[8]) & 0xffffffff;
223 printk("R6 : %08Lx%08Lx R7 : %08Lx%08Lx R8 : %08Lx%08Lx\n",
224 ah, al, bh, bl, ch, cl);
225
226 ah = (regs->regs[9]) >> 32;
227 al = (regs->regs[9]) & 0xffffffff;
228 bh = (regs->regs[10]) >> 32;
229 bl = (regs->regs[10]) & 0xffffffff;
230 ch = (regs->regs[11]) >> 32;
231 cl = (regs->regs[11]) & 0xffffffff;
232 printk("R9 : %08Lx%08Lx R10 : %08Lx%08Lx R11 : %08Lx%08Lx\n",
233 ah, al, bh, bl, ch, cl);
234 printk("....\n");
235
236 ah = (regs->tregs[0]) >> 32;
237 al = (regs->tregs[0]) & 0xffffffff;
238 bh = (regs->tregs[1]) >> 32;
239 bl = (regs->tregs[1]) & 0xffffffff;
240 ch = (regs->tregs[2]) >> 32;
241 cl = (regs->tregs[2]) & 0xffffffff;
242 printk("T0 : %08Lx%08Lx T1 : %08Lx%08Lx T2 : %08Lx%08Lx\n",
243 ah, al, bh, bl, ch, cl);
244 printk("....\n");
245
246 print_dtlb();
247 print_itlb();
248}
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c
index 3aea25dc431a..ff1c40a31cbc 100644
--- a/arch/sh/mm/tlb-sh5.c
+++ b/arch/sh/mm/tlb-sh5.c
@@ -17,7 +17,7 @@
17/** 17/**
18 * sh64_tlb_init - Perform initial setup for the DTLB and ITLB. 18 * sh64_tlb_init - Perform initial setup for the DTLB and ITLB.
19 */ 19 */
20int __init sh64_tlb_init(void) 20int __cpuinit sh64_tlb_init(void)
21{ 21{
22 /* Assign some sane DTLB defaults */ 22 /* Assign some sane DTLB defaults */
23 cpu_data->dtlb.entries = 64; 23 cpu_data->dtlb.entries = 64;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 20:57:20 -0500