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-rw-r--r--arch/sh/Kconfig537
-rw-r--r--arch/sh/Kconfig.debug2
-rw-r--r--arch/sh/Makefile60
-rw-r--r--arch/sh/mm/Kconfig233
4 files changed, 482 insertions, 350 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 8cf6d437a630..01bc7d589afe 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -33,9 +33,11 @@ config GENERIC_CALIBRATE_DELAY
33 bool 33 bool
34 default y 34 default y
35 35
36config GENERIC_IOMAP
37 bool
38
36config ARCH_MAY_HAVE_PC_FDC 39config ARCH_MAY_HAVE_PC_FDC
37 bool 40 bool
38 default y
39 41
40source "init/Kconfig" 42source "init/Kconfig"
41 43
@@ -53,24 +55,28 @@ config SH_SOLUTION_ENGINE
53 55
54config SH_7751_SOLUTION_ENGINE 56config SH_7751_SOLUTION_ENGINE
55 bool "SolutionEngine7751" 57 bool "SolutionEngine7751"
58 select CPU_SUBTYPE_SH7751
56 help 59 help
57 Select 7751 SolutionEngine if configuring for a Hitachi SH7751 60 Select 7751 SolutionEngine if configuring for a Hitachi SH7751
58 evaluation board. 61 evaluation board.
59 62
60config SH_7300_SOLUTION_ENGINE 63config SH_7300_SOLUTION_ENGINE
61 bool "SolutionEngine7300" 64 bool "SolutionEngine7300"
65 select CPU_SUBTYPE_SH7300
62 help 66 help
63 Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V) 67 Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V)
64 evaluation board. 68 evaluation board.
65 69
66config SH_73180_SOLUTION_ENGINE 70config SH_73180_SOLUTION_ENGINE
67 bool "SolutionEngine73180" 71 bool "SolutionEngine73180"
72 select CPU_SUBTYPE_SH73180
68 help 73 help
69 Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3) 74 Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3)
70 evaluation board. 75 evaluation board.
71 76
72config SH_7751_SYSTEMH 77config SH_7751_SYSTEMH
73 bool "SystemH7751R" 78 bool "SystemH7751R"
79 select CPU_SUBTYPE_SH7751R
74 help 80 help
75 Select SystemH if you are configuring for a Renesas SystemH 81 Select SystemH if you are configuring for a Renesas SystemH
76 7751R evaluation board. 82 7751R evaluation board.
@@ -81,27 +87,13 @@ config SH_STB1_HARP
81config SH_STB1_OVERDRIVE 87config SH_STB1_OVERDRIVE
82 bool "STB1_Overdrive" 88 bool "STB1_Overdrive"
83 89
84config SH_HP620 90config SH_HP6XX
85 bool "HP620" 91 bool "HP6XX"
86 help 92 help
87 Select HP620 if configuring for a HP jornada HP620. 93 Select HP6XX if configuring for a HP jornada HP6xx.
88 More information (hardware only) at 94 More information (hardware only) at
89 <http://www.hp.com/jornada/>. 95 <http://www.hp.com/jornada/>.
90 96
91config SH_HP680
92 bool "HP680"
93 help
94 Select HP680 if configuring for a HP Jornada HP680.
95 More information (hardware only) at
96 <http://www.hp.com/jornada/products/680/>.
97
98config SH_HP690
99 bool "HP690"
100 help
101 Select HP690 if configuring for a HP Jornada HP690.
102 More information (hardware only)
103 at <http://www.hp.com/jornada/products/680/>.
104
105config SH_CQREEK 97config SH_CQREEK
106 bool "CqREEK" 98 bool "CqREEK"
107 help 99 help
@@ -123,11 +115,13 @@ config SH_EC3104
123 115
124config SH_SATURN 116config SH_SATURN
125 bool "Saturn" 117 bool "Saturn"
118 select CPU_SUBTYPE_SH7604
126 help 119 help
127 Select Saturn if configuring for a SEGA Saturn. 120 Select Saturn if configuring for a SEGA Saturn.
128 121
129config SH_DREAMCAST 122config SH_DREAMCAST
130 bool "Dreamcast" 123 bool "Dreamcast"
124 select CPU_SUBTYPE_SH7091
131 help 125 help
132 Select Dreamcast if configuring for a SEGA Dreamcast. 126 Select Dreamcast if configuring for a SEGA Dreamcast.
133 More information at 127 More information at
@@ -142,6 +136,7 @@ config SH_BIGSUR
142 136
143config SH_SH2000 137config SH_SH2000
144 bool "SH2000" 138 bool "SH2000"
139 select CPU_SUBTYPE_SH7709
145 help 140 help
146 SH-2000 is a single-board computer based around SH7709A chip 141 SH-2000 is a single-board computer based around SH7709A chip
147 intended for embedded applications. 142 intended for embedded applications.
@@ -153,20 +148,22 @@ config SH_ADX
153 bool "ADX" 148 bool "ADX"
154 149
155config SH_MPC1211 150config SH_MPC1211
156 bool "MPC1211" 151 bool "Interface MPC1211"
152 help
153 CTP/PCI-SH02 is a CPU module computer that is produced
154 by Interface Corporation.
155 More information at <http://www.interface.co.jp>
157 156
158config SH_SH03 157config SH_SH03
159 bool "SH03" 158 bool "Interface CTP/PCI-SH03"
160 help 159 help
161 CTP/PCI-SH03 is a CPU module computer that produced 160 CTP/PCI-SH03 is a CPU module computer that is produced
162 by Interface Corporation. 161 by Interface Corporation.
163 It is compact and excellent in durability.
164 It will play an active part in your factory or laboratory
165 as a FA computer.
166 More information at <http://www.interface.co.jp> 162 More information at <http://www.interface.co.jp>
167 163
168config SH_SECUREEDGE5410 164config SH_SECUREEDGE5410
169 bool "SecureEdge5410" 165 bool "SecureEdge5410"
166 select CPU_SUBTYPE_SH7751R
170 help 167 help
171 Select SecureEdge5410 if configuring for a SnapGear SH board. 168 Select SecureEdge5410 if configuring for a SnapGear SH board.
172 This includes both the OEM SecureEdge products as well as the 169 This includes both the OEM SecureEdge products as well as the
@@ -174,25 +171,49 @@ config SH_SECUREEDGE5410
174 171
175config SH_HS7751RVOIP 172config SH_HS7751RVOIP
176 bool "HS7751RVOIP" 173 bool "HS7751RVOIP"
174 select CPU_SUBTYPE_SH7751R
177 help 175 help
178 Select HS7751RVOIP if configuring for a Renesas Technology 176 Select HS7751RVOIP if configuring for a Renesas Technology
179 Sales VoIP board. 177 Sales VoIP board.
180 178
181config SH_RTS7751R2D 179config SH_RTS7751R2D
182 bool "RTS7751R2D" 180 bool "RTS7751R2D"
181 select CPU_SUBTYPE_SH7751R
183 help 182 help
184 Select RTS7751R2D if configuring for a Renesas Technology 183 Select RTS7751R2D if configuring for a Renesas Technology
185 Sales SH-Graphics board. 184 Sales SH-Graphics board.
186 185
186config SH_R7780RP
187 bool "R7780RP-1"
188 select CPU_SUBTYPE_SH7780
189 help
190 Select R7780RP-1 if configuring for a Renesas Solutions
191 HIGHLANDER board.
192
187config SH_EDOSK7705 193config SH_EDOSK7705
188 bool "EDOSK7705" 194 bool "EDOSK7705"
195 select CPU_SUBTYPE_SH7705
189 196
190config SH_SH4202_MICRODEV 197config SH_SH4202_MICRODEV
191 bool "SH4-202 MicroDev" 198 bool "SH4-202 MicroDev"
199 select CPU_SUBTYPE_SH4_202
192 help 200 help
193 Select SH4-202 MicroDev if configuring for a SuperH MicroDev board 201 Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
194 with an SH4-202 CPU. 202 with an SH4-202 CPU.
195 203
204config SH_LANDISK
205 bool "LANDISK"
206 select CPU_SUBTYPE_SH7751R
207 help
208 I-O DATA DEVICE, INC. "LANDISK Series" support.
209
210config SH_TITAN
211 bool "TITAN"
212 select CPU_SUBTYPE_SH7751R
213 help
214 Select Titan if you are configuring for a Nimble Microsystems
215 NetEngine NP51R.
216
196config SH_UNKNOWN 217config SH_UNKNOWN
197 bool "BareCPU" 218 bool "BareCPU"
198 help 219 help
@@ -207,168 +228,27 @@ config SH_UNKNOWN
207 228
208endchoice 229endchoice
209 230
210choice 231source "arch/sh/mm/Kconfig"
211 prompt "Processor family"
212 default CPU_SH4
213 help
214 This option determines the CPU family to compile for. Supported
215 targets are SH-2, SH-3, and SH-4. These options are independent of
216 CPU functionality. As such, SH-DSP users will still want to select
217 their respective processor family in addition to the DSP support
218 option.
219
220config CPU_SH2
221 bool "SH-2"
222 select SH_WRITETHROUGH
223
224config CPU_SH3
225 bool "SH-3"
226
227config CPU_SH4
228 bool "SH-4"
229
230endchoice
231
232choice
233 prompt "Processor subtype"
234
235config CPU_SUBTYPE_SH7604
236 bool "SH7604"
237 depends on CPU_SH2
238 help
239 Select SH7604 if you have SH7604
240
241config CPU_SUBTYPE_SH7300
242 bool "SH7300"
243 depends on CPU_SH3
244
245config CPU_SUBTYPE_SH7705
246 bool "SH7705"
247 depends on CPU_SH3
248
249config CPU_SUBTYPE_SH7707
250 bool "SH7707"
251 depends on CPU_SH3
252 help
253 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
254
255config CPU_SUBTYPE_SH7708
256 bool "SH7708"
257 depends on CPU_SH3
258 help
259 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
260 if you have a 100 Mhz SH-3 HD6417708R CPU.
261
262config CPU_SUBTYPE_SH7709
263 bool "SH7709"
264 depends on CPU_SH3
265 help
266 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
267
268config CPU_SUBTYPE_SH7750
269 bool "SH7750"
270 depends on CPU_SH4
271 help
272 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
273
274config CPU_SUBTYPE_SH7751
275 bool "SH7751/SH7751R"
276 depends on CPU_SH4
277 help
278 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
279 or if you have a HD6417751R CPU.
280
281config CPU_SUBTYPE_SH7760
282 bool "SH7760"
283 depends on CPU_SH4
284
285config CPU_SUBTYPE_SH73180
286 bool "SH73180"
287 depends on CPU_SH4
288
289config CPU_SUBTYPE_ST40STB1
290 bool "ST40STB1 / ST40RA"
291 depends on CPU_SH4
292 help
293 Select ST40STB1 if you have a ST40RA CPU.
294 This was previously called the ST40STB1, hence the option name.
295
296config CPU_SUBTYPE_ST40GX1
297 bool "ST40GX1"
298 depends on CPU_SH4
299 help
300 Select ST40GX1 if you have a ST40GX1 CPU.
301
302config CPU_SUBTYPE_SH4_202
303 bool "SH4-202"
304 depends on CPU_SH4
305
306endchoice
307
308config SH7705_CACHE_32KB
309 bool "Enable 32KB cache size for SH7705"
310 depends on CPU_SUBTYPE_SH7705
311 default y
312
313config MMU
314 bool "Support for memory management hardware"
315 depends on !CPU_SH2
316 default y
317 help
318 Early SH processors (such as the SH7604) lack an MMU. In order to
319 boot on these systems, this option must not be set.
320
321 On other systems (such as the SH-3 and 4) where an MMU exists,
322 turning this off will boot the kernel on these machines with the
323 MMU implicitly switched off.
324
325choice
326 prompt "HugeTLB page size"
327 depends on HUGETLB_PAGE && CPU_SH4 && MMU
328 default HUGETLB_PAGE_SIZE_64K
329
330config HUGETLB_PAGE_SIZE_64K
331 bool "64K"
332
333config HUGETLB_PAGE_SIZE_1MB
334 bool "1MB"
335
336endchoice
337
338config CMDLINE_BOOL
339 bool "Default bootloader kernel arguments"
340
341config CMDLINE
342 string "Initial kernel command string"
343 depends on CMDLINE_BOOL
344 default "console=ttySC1,115200"
345 232
346# Platform-specific memory start and size definitions
347config MEMORY_START 233config MEMORY_START
348 hex "Physical memory start address" if !MEMORY_SET || MEMORY_OVERRIDE 234 hex "Physical memory start address"
349 default "0x08000000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || SH_MPC1211 || SH_SH03 || SH_SECUREEDGE5410 || SH_SH4202_MICRODEV 235 default "0x08000000"
350 default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_73180_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_EDOSK7705)
351 ---help--- 236 ---help---
352 Computers built with Hitachi SuperH processors always 237 Computers built with Hitachi SuperH processors always
353 map the ROM starting at address zero. But the processor 238 map the ROM starting at address zero. But the processor
354 does not specify the range that RAM takes. 239 does not specify the range that RAM takes.
355 240
356 The physical memory (RAM) start address will be automatically 241 The physical memory (RAM) start address will be automatically
357 set to 08000000, unless you selected one of the following 242 set to 08000000. Other platforms, such as the Solution Engine
358 processor types: SolutionEngine, Overdrive, HP620, HP680, HP690, 243 boards typically map RAM at 0C000000.
359 in which case the start address will be set to 0c000000.
360 244
361 Tweak this only when porting to a new machine which is not already 245 Tweak this only when porting to a new machine which does not
362 known by the config system. Changing it from the known correct 246 already have a defconfig. Changing it from the known correct
363 value on any of the known systems will only lead to disaster. 247 value on any of the known systems will only lead to disaster.
364 248
365config MEMORY_SIZE 249config MEMORY_SIZE
366 hex "Physical memory size" if !MEMORY_SET || MEMORY_OVERRIDE 250 hex "Physical memory size"
367 default "0x00400000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || !MEMORY_OVERRIDE && (SH_HP600 || SH_BIGSUR || SH_SH2000) 251 default "0x00400000"
368 default "0x01000000" if !MEMORY_OVERRIDE && SH_DREAMCAST || SH_SECUREEDGE5410 || SH_EDOSK7705
369 default "0x02000000" if !MEMORY_OVERRIDE && (SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE)
370 default "0x04000000" if !MEMORY_OVERRIDE && (SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV)
371 default "0x08000000" if SH_MPC1211 || SH_SH03
372 help 252 help
373 This sets the default memory size assumed by your SH kernel. It can 253 This sets the default memory size assumed by your SH kernel. It can
374 be overridden as normal by the 'mem=' argument on the kernel command 254 be overridden as normal by the 'mem=' argument on the kernel command
@@ -376,21 +256,6 @@ config MEMORY_SIZE
376 as 0x00400000 which was the default value before this became 256 as 0x00400000 which was the default value before this became
377 configurable. 257 configurable.
378 258
379config MEMORY_SET
380 bool
381 depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_SH03 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410 || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_EDOSK7705)
382 default y
383 help
384 This is an option about which you will never be asked a question.
385 Therefore, I conclude that you do not exist - go away.
386
387 There is a grue here.
388
389# If none of the above have set memory start/size, ask the user.
390config MEMORY_OVERRIDE
391 bool "Override default load address and memory size"
392
393# XXX: break these out into the board-specific configs below
394config CF_ENABLER 259config CF_ENABLER
395 bool "Compact Flash Enabler support" 260 bool "Compact Flash Enabler support"
396 depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701 || SH_SH03 261 depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701 || SH_SH03
@@ -434,10 +299,21 @@ config CF_BASE_ADDR
434 default "0xb8000000" if CF_AREA6 299 default "0xb8000000" if CF_AREA6
435 default "0xb4000000" if CF_AREA5 300 default "0xb4000000" if CF_AREA5
436 301
302menu "Processor features"
303
304config CPU_LITTLE_ENDIAN
305 bool "Little Endian"
306 help
307 Some SuperH machines can be configured for either little or big
308 endian byte order. These modes require different kernels. Say Y if
309 your machine is little endian, N if it's a big endian machine.
310
437# The SH7750 RTC module is disabled in the Dreamcast 311# The SH7750 RTC module is disabled in the Dreamcast
438config SH_RTC 312config SH_RTC
439 bool 313 bool
440 depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && !SH_73180_SOLUTION_ENGINE 314 depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && \
315 !SH_73180_SOLUTION_ENGINE && !SH_LANDISK && \
316 !SH_R7780RP
441 default y 317 default y
442 help 318 help
443 Selecting this option will allow the Linux kernel to emulate 319 Selecting this option will allow the Linux kernel to emulate
@@ -476,104 +352,131 @@ config SH_ADC
476 352
477 If unsure, say N. 353 If unsure, say N.
478 354
479config SH_HP600 355config SH_STORE_QUEUES
356 bool "Support for Store Queues"
357 depends on CPU_SH4
358 help
359 Selecting this option will enable an in-kernel API for manipulating
360 the store queues integrated in the SH-4 processors.
361
362config CPU_HAS_INTEVT
480 bool 363 bool
481 depends on SH_HP620 || SH_HP680 || SH_HP690
482 default y
483 364
484config CPU_SUBTYPE_ST40 365config CPU_HAS_PINT_IRQ
485 bool 366 bool
486 depends on CPU_SUBTYPE_ST40STB1 || CPU_SUBTYPE_ST40GX1
487 default y
488 367
489source "mm/Kconfig" 368config CPU_HAS_INTC2_IRQ
369 bool
490 370
491config ZERO_PAGE_OFFSET 371config CPU_HAS_SR_RB
492 hex "Zero page offset" 372 bool "CPU has SR.RB"
493 default "0x00001000" if !(SH_MPC1211 || SH_SH03) 373 depends on CPU_SH3 || CPU_SH4
494 default "0x00004000" if SH_MPC1211 || SH_SH03 374 default y
495 help 375 help
496 This sets the default offset of zero page. 376 This will enable the use of SR.RB register bank usage. Processors
377 that are lacking this bit must have another method in place for
378 accomplishing what is taken care of by the banked registers.
497 379
498# XXX: needs to lose subtype for system type 380 See <file:Documentation/sh/register-banks.txt> for further
499config ST40_LMI_MEMORY 381 information on SR.RB and register banking in the kernel in general.
500 bool "Memory on LMI"
501 depends on CPU_SUBTYPE_ST40STB1
502 382
503config MEMORY_START 383endmenu
504 hex
505 depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
506 default "0x08000000"
507 384
508config MEMORY_SIZE 385menu "Timer support"
509 hex
510 depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
511 default "0x00400000"
512 386
513config MEMORY_SET 387config SH_TMU
514 bool 388 bool "TMU timer support"
515 depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
516 default y 389 default y
517
518config BOOT_LINK_OFFSET
519 hex "Link address offset for booting"
520 default "0x00800000"
521 help 390 help
522 This option allows you to set the link address offset of the zImage. 391 This enables the use of the TMU as the system timer.
523 This can be useful if you are on a board which has a small amount of
524 memory.
525 392
526config CPU_LITTLE_ENDIAN 393endmenu
527 bool "Little Endian"
528 help
529 Some SuperH machines can be configured for either little or big
530 endian byte order. These modes require different kernels. Say Y if
531 your machine is little endian, N if it's a big endian machine.
532 394
533config PREEMPT 395source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
534 bool "Preemptible Kernel (EXPERIMENTAL)"
535 depends on EXPERIMENTAL
536 396
537config UBC_WAKEUP 397source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
538 bool "Wakeup UBC on startup" 398
399config SH_PCLK_FREQ_BOOL
400 bool "Set default pclk frequency"
401 default y if !SH_RTC
402 default n
403
404config SH_PCLK_FREQ
405 int "Peripheral clock frequency (in Hz)"
406 depends on SH_PCLK_FREQ_BOOL
407 default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780
408 default "60000000" if CPU_SUBTYPE_SH7751
409 default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7760
410 default "27000000" if CPU_SUBTYPE_SH73180
411 default "66000000" if CPU_SUBTYPE_SH4_202
539 help 412 help
540 Selecting this option will wakeup the User Break Controller (UBC) on 413 This option is used to specify the peripheral clock frequency.
541 startup. Although the UBC is left in an awake state when the processor 414 This is necessary for determining the reference clock value on
542 comes up, some boot loaders misbehave by putting the UBC to sleep in a 415 platforms lacking an RTC.
543 power saving state, which causes issues with things like ptrace().
544 416
545 If unsure, say N. 417menu "CPU Frequency scaling"
418
419source "drivers/cpufreq/Kconfig"
546 420
547config SH_WRITETHROUGH 421config SH_CPU_FREQ
548 bool "Use write-through caching" 422 tristate "SuperH CPU Frequency driver"
549 default y if CPU_SH2 423 depends on CPU_FREQ
424 select CPU_FREQ_TABLE
550 help 425 help
551 Selecting this option will configure the caches in write-through 426 This adds the cpufreq driver for SuperH. At present, only
552 mode, as opposed to the default write-back configuration. 427 the SH-4 is supported.
553 428
554 Since there's sill some aliasing issues on SH-4, this option will 429 For details, take a look at <file:Documentation/cpu-freq>.
555 unfortunately still require the majority of flushing functions to
556 be implemented to deal with aliasing.
557 430
558 If unsure, say N. 431 If unsure, say N.
559 432
560config SH_OCRAM 433endmenu
561 bool "Operand Cache RAM (OCRAM) support" 434
435source "arch/sh/drivers/dma/Kconfig"
436
437source "arch/sh/cchips/Kconfig"
438
439config HEARTBEAT
440 bool "Heartbeat LED"
441 depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || \
442 SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || \
443 SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || \
444 SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || \
445 SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK
562 help 446 help
563 Selecting this option will automatically tear down the number of 447 Use the power-on LED on your machine as a load meter. The exact
564 sets in the dcache by half, which in turn exposes a memory range. 448 behavior is platform-dependent, but normally the flash frequency is
449 a hyperbolic function of the 5-minute load average.
565 450
566 The addresses for the OC RAM base will vary according to the 451endmenu
567 processor version. Consult vendor documentation for specifics.
568 452
569 If unsure, say N. 453config ISA_DMA_API
454 bool
455 depends on MPC1211
456 default y
570 457
571config SH_STORE_QUEUES 458menu "Kernel features"
572 bool "Support for Store Queues" 459
573 depends on CPU_SH4 460config KEXEC
461 bool "kexec system call (EXPERIMENTAL)"
462 depends on EXPERIMENTAL
574 help 463 help
575 Selecting this option will enable an in-kernel API for manipulating 464 kexec is a system call that implements the ability to shutdown your
576 the store queues integrated in the SH-4 processors. 465 current kernel, and to start another kernel. It is like a reboot
466 but it is indepedent of the system firmware. And like a reboot
467 you can start any kernel with it, not just Linux.
468
469 The name comes from the similiarity to the exec system call.
470
471 It is an ongoing process to be certain the hardware in a machine
472 is properly shutdown, so do not be surprised if this code does not
473 initially work for you. It may help to enable device hotplugging
474 support. As of this writing the exact hardware interface is
475 strongly in flux, so no good recommendation can be made.
476
477config PREEMPT
478 bool "Preemptible Kernel (EXPERIMENTAL)"
479 depends on EXPERIMENTAL
577 480
578config SMP 481config SMP
579 bool "Symmetric multi-processing support" 482 bool "Symmetric multi-processing support"
@@ -610,87 +513,58 @@ config NR_CPUS
610 This is purely to save memory - each supported CPU adds 513 This is purely to save memory - each supported CPU adds
611 approximately eight kilobytes to the kernel image. 514 approximately eight kilobytes to the kernel image.
612 515
613config HS7751RVOIP_CODEC 516config CPU_HAS_SR_RB
614 bool "Support VoIP Codec section" 517 bool "CPU has SR.RB"
615 depends on SH_HS7751RVOIP 518 depends on CPU_SH3 || CPU_SH4
616 help
617 Selecting this option will support CODEC section.
618
619config RTS7751R2D_REV11
620 bool "RTS7751R2D Rev. 1.1 board support"
621 depends on SH_RTS7751R2D
622 help
623 Selecting this option will support version rev. 1.1.
624
625config SH_PCLK_CALC
626 bool
627 default n if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH73180
628 default y 519 default y
629 help 520 help
630 This option will cause the PCLK value to be probed at run-time. It 521 This will enable the use of SR.RB register bank usage. Processors
631 will display a notification if the probed value has greater than a 522 that are lacking this bit must have another method in place for
632 1% variance of the hardcoded CONFIG_SH_PCLK_FREQ. 523 accomplishing what is taken care of by the banked registers.
633 524
634config SH_PCLK_FREQ 525 See <file:Documentation/sh/register-banks.txt> for further
635 int "Peripheral clock frequency (in Hz)" 526 information on SR.RB and register banking in the kernel in general.
636 default "50000000" if CPU_SUBTYPE_SH7750
637 default "60000000" if CPU_SUBTYPE_SH7751
638 default "33333333" if CPU_SUBTYPE_SH7300
639 default "27000000" if CPU_SUBTYPE_SH73180
640 default "66000000" if CPU_SUBTYPE_SH4_202
641 default "1193182"
642 help
643 This option is used to specify the peripheral clock frequency. This
644 option must be set for each processor in order for the kernel to
645 function reliably. If no sane default exists, we use a default from
646 the legacy i8254. Any discrepancies will be reported on boot time
647 with an auto-probed frequency which should be considered the proper
648 value for your hardware.
649 527
650menu "CPU Frequency scaling" 528endmenu
651 529
652source "drivers/cpufreq/Kconfig" 530menu "Boot options"
653 531
654config SH_CPU_FREQ 532config ZERO_PAGE_OFFSET
655 tristate "SuperH CPU Frequency driver" 533 hex "Zero page offset"
656 depends on CPU_FREQ 534 default "0x00004000" if SH_MPC1211 || SH_SH03
657 select CPU_FREQ_TABLE 535 default "0x00001000"
658 help 536 help
659 This adds the cpufreq driver for SuperH. At present, only 537 This sets the default offset of zero page.
660 the SH-4 is supported.
661
662 For details, take a look at <file:Documentation/cpu-freq>.
663
664 If unsure, say N.
665 538
666endmenu 539config BOOT_LINK_OFFSET
540 hex "Link address offset for booting"
541 default "0x00800000"
542 help
543 This option allows you to set the link address offset of the zImage.
544 This can be useful if you are on a board which has a small amount of
545 memory.
667 546
668source "arch/sh/drivers/dma/Kconfig" 547config UBC_WAKEUP
548 bool "Wakeup UBC on startup"
549 help
550 Selecting this option will wakeup the User Break Controller (UBC) on
551 startup. Although the UBC is left in an awake state when the processor
552 comes up, some boot loaders misbehave by putting the UBC to sleep in a
553 power saving state, which causes issues with things like ptrace().
669 554
670source "arch/sh/cchips/Kconfig" 555 If unsure, say N.
671 556
672config HEARTBEAT 557config CMDLINE_BOOL
673 bool "Heartbeat LED" 558 bool "Default bootloader kernel arguments"
674 depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_RTS7751R2D || SH_SH4202_MICRODEV
675 help
676 Use the power-on LED on your machine as a load meter. The exact
677 behavior is platform-dependent, but normally the flash frequency is
678 a hyperbolic function of the 5-minute load average.
679 559
680config RTC_9701JE 560config CMDLINE
681 tristate "EPSON RTC-9701JE support" 561 string "Initial kernel command string"
682 depends on SH_RTS7751R2D 562 depends on CMDLINE_BOOL
683 help 563 default "console=ttySC1,115200"
684 Selecting this option will support EPSON RTC-9701JE.
685 564
686endmenu 565endmenu
687 566
688config ISA_DMA_API 567menu "Bus options"
689 bool
690 depends on MPC1211
691 default y
692
693menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
694 568
695# Even on SuperH devices which don't have an ISA bus, 569# Even on SuperH devices which don't have an ISA bus,
696# this variable helps the PCMCIA modules handle 570# this variable helps the PCMCIA modules handle
@@ -701,7 +575,7 @@ menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
701# PCMCIA outright. -- PFM. 575# PCMCIA outright. -- PFM.
702config ISA 576config ISA
703 bool 577 bool
704 default y if PCMCIA || SMC91X 578 default y if PCMCIA
705 help 579 help
706 Find out whether you have ISA slots on your motherboard. ISA is the 580 Find out whether you have ISA slots on your motherboard. ISA is the
707 name of a bus system, i.e. the way the CPU talks to the other stuff 581 name of a bus system, i.e. the way the CPU talks to the other stuff
@@ -735,10 +609,9 @@ config MCA
735config SBUS 609config SBUS
736 bool 610 bool
737 611
738config MAPLE 612config SUPERHYWAY
739 tristate "Maple Bus support" 613 tristate "SuperHyway Bus support"
740 depends on SH_DREAMCAST 614 depends on CPU_SUBTYPE_SH4_202
741 default y
742 615
743source "arch/sh/drivers/pci/Kconfig" 616source "arch/sh/drivers/pci/Kconfig"
744 617
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 3fab181da364..8fb31ab2c02c 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -17,7 +17,7 @@ config SH_STANDARD_BIOS
17 17
18config EARLY_SCIF_CONSOLE 18config EARLY_SCIF_CONSOLE
19 bool "Use early SCIF console" 19 bool "Use early SCIF console"
20 depends on CPU_SH4 20 depends on CPU_SH4 || CPU_SH2A && !SH_STANDARD_BIOS
21 21
22config EARLY_PRINTK 22config EARLY_PRINTK
23 bool "Early printk support" 23 bool "Early printk support"
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 67192d6b00d8..08c9515c4806 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -17,10 +17,30 @@
17cflags-y := -mb 17cflags-y := -mb
18cflags-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml 18cflags-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml
19 19
20isa-y := any
21isa-$(CONFIG_CPU_SH2) := sh2
22isa-$(CONFIG_CPU_SH3) := sh3
23isa-$(CONFIG_CPU_SH4) := sh4
24isa-$(CONFIG_CPU_SH4A) := sh4a
25isa-$(CONFIG_CPU_SH2A) := sh2a
26
27isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp
28
29ifndef CONFIG_MMU
30isa-y := $(isa-y)-nommu
31endif
32
33ifndef CONFIG_SH_FPU
34isa-y := $(isa-y)-nofpu
35endif
36
37cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
38
20cflags-$(CONFIG_CPU_SH2) += -m2 39cflags-$(CONFIG_CPU_SH2) += -m2
21cflags-$(CONFIG_CPU_SH3) += -m3 40cflags-$(CONFIG_CPU_SH3) += -m3
22cflags-$(CONFIG_CPU_SH4) += -m4 \ 41cflags-$(CONFIG_CPU_SH4) += -m4 \
23 $(call cc-option,-mno-implicit-fp,-m4-nofpu) 42 $(call cc-option,-mno-implicit-fp,-m4-nofpu)
43cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a-nofpu,)
24 44
25cflags-$(CONFIG_SH_DSP) += -Wa,-dsp 45cflags-$(CONFIG_SH_DSP) += -Wa,-dsp
26cflags-$(CONFIG_SH_KGDB) += -g 46cflags-$(CONFIG_SH_KGDB) += -g
@@ -67,9 +87,7 @@ machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300
67machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180 87machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
68machdir-$(CONFIG_SH_STB1_HARP) := harp 88machdir-$(CONFIG_SH_STB1_HARP) := harp
69machdir-$(CONFIG_SH_STB1_OVERDRIVE) := overdrive 89machdir-$(CONFIG_SH_STB1_OVERDRIVE) := overdrive
70machdir-$(CONFIG_SH_HP620) := hp6xx/hp620 90machdir-$(CONFIG_SH_HP6XX) := hp6xx
71machdir-$(CONFIG_SH_HP680) := hp6xx/hp680
72machdir-$(CONFIG_SH_HP690) := hp6xx/hp690
73machdir-$(CONFIG_SH_CQREEK) := cqreek 91machdir-$(CONFIG_SH_CQREEK) := cqreek
74machdir-$(CONFIG_SH_DMIDA) := dmida 92machdir-$(CONFIG_SH_DMIDA) := dmida
75machdir-$(CONFIG_SH_EC3104) := ec3104 93machdir-$(CONFIG_SH_EC3104) := ec3104
@@ -119,31 +137,39 @@ boot := arch/sh/boot
119 137
120CPPFLAGS_vmlinux.lds := -traditional 138CPPFLAGS_vmlinux.lds := -traditional
121 139
140ifneq ($(KBUILD_SRC),)
141incdir-prefix := $(srctree)/include/asm-sh/
142else
143incdir-prefix :=
144endif
145
122# Update machine arch and proc symlinks if something which affects 146# Update machine arch and proc symlinks if something which affects
123# them changed. We use .arch and .mach to indicate when they were 147# them changed. We use .arch and .mach to indicate when they were
124# updated last, otherwise make uses the target directory mtime. 148# updated last, otherwise make uses the target directory mtime.
125 149
126include/asm-sh/.cpu: $(wildcard include/config/cpu/*.h) include/config/MARKER 150include/asm-sh/.cpu: $(wildcard include/config/cpu/*.h) include/config/MARKER
127 @echo ' SYMLINK include/asm-sh/cpu -> include/asm-sh/$(cpuincdir-y)' 151 @echo ' SYMLINK include/asm-sh/cpu -> include/asm-sh/$(cpuincdir-y)'
128ifneq ($(KBUILD_SRC),) 152 $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi
129 $(Q)mkdir -p include/asm-sh 153 $(Q)ln -fsn $(incdir-prefix)$(cpuincdir-y) include/asm-sh/cpu
130 $(Q)ln -fsn $(srctree)/include/asm-sh/$(cpuincdir-y) include/asm-sh/cpu
131else
132 $(Q)ln -fsn $(cpuincdir-y) include/asm-sh/cpu
133endif
134 @touch $@ 154 @touch $@
135 155
156# Most boards have their own mach directories. For the ones that
157# don't, just reference the parent directory so the semantics are
158# kept roughly the same.
159
136include/asm-sh/.mach: $(wildcard include/config/sh/*.h) include/config/MARKER 160include/asm-sh/.mach: $(wildcard include/config/sh/*.h) include/config/MARKER
137 @echo ' SYMLINK include/asm-sh/mach -> include/asm-sh/$(incdir-y)' 161 @echo -n ' SYMLINK include/asm-sh/mach -> '
138ifneq ($(KBUILD_SRC),) 162 $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi
139 $(Q)mkdir -p include/asm-sh 163 $(Q)if [ -d $(incdir-prefix)$(incdir-y) ]; then \
140 $(Q)ln -fsn $(srctree)/include/asm-sh/$(incdir-y) include/asm-sh/mach 164 echo -e 'include/asm-sh/$(incdir-y)'; \
141else 165 ln -fsn $(incdir-prefix)$(incdir-y) \
142 $(Q)ln -fsn $(incdir-y) include/asm-sh/mach 166 include/asm-sh/mach; \
143endif 167 else \
168 echo -e 'include/asm-sh'; \
169 ln -fsn $(incdir-prefix) include/asm-sh/mach; \
170 fi
144 @touch $@ 171 @touch $@
145 172
146
147archprepare: maketools include/asm-sh/.cpu include/asm-sh/.mach 173archprepare: maketools include/asm-sh/.cpu include/asm-sh/.mach
148 174
149.PHONY: maketools FORCE 175.PHONY: maketools FORCE
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
new file mode 100644
index 000000000000..fb586b1cf8bb
--- /dev/null
+++ b/arch/sh/mm/Kconfig
@@ -0,0 +1,233 @@
1menu "Processor selection"
2
3#
4# Processor families
5#
6config CPU_SH2
7 bool
8 select SH_WRITETHROUGH
9
10config CPU_SH3
11 bool
12 select CPU_HAS_INTEVT
13 select CPU_HAS_SR_RB
14
15config CPU_SH4
16 bool
17 select CPU_HAS_INTEVT
18 select CPU_HAS_SR_RB
19
20config CPU_SH4A
21 bool
22 select CPU_SH4
23 select CPU_HAS_INTC2_IRQ
24
25config CPU_SUBTYPE_ST40
26 bool
27 select CPU_SH4
28 select CPU_HAS_INTC2_IRQ
29
30#
31# Processor subtypes
32#
33
34comment "SH-2 Processor Support"
35
36config CPU_SUBTYPE_SH7604
37 bool "Support SH7604 processor"
38 select CPU_SH2
39
40comment "SH-3 Processor Support"
41
42config CPU_SUBTYPE_SH7300
43 bool "Support SH7300 processor"
44 select CPU_SH3
45
46config CPU_SUBTYPE_SH7705
47 bool "Support SH7705 processor"
48 select CPU_SH3
49 select CPU_HAS_PINT_IRQ
50
51config CPU_SUBTYPE_SH7707
52 bool "Support SH7707 processor"
53 select CPU_SH3
54 select CPU_HAS_PINT_IRQ
55 help
56 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
57
58config CPU_SUBTYPE_SH7708
59 bool "Support SH7708 processor"
60 select CPU_SH3
61 help
62 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
63 if you have a 100 Mhz SH-3 HD6417708R CPU.
64
65config CPU_SUBTYPE_SH7709
66 bool "Support SH7709 processor"
67 select CPU_SH3
68 select CPU_HAS_PINT_IRQ
69 help
70 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
71
72comment "SH-4 Processor Support"
73
74config CPU_SUBTYPE_SH7750
75 bool "Support SH7750 processor"
76 select CPU_SH4
77 help
78 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
79
80config CPU_SUBTYPE_SH7091
81 bool "Support SH7091 processor"
82 select CPU_SH4
83 select CPU_SUBTYPE_SH7750
84 help
85 Select SH7091 if you have an SH-4 based Sega device (such as
86 the Dreamcast, Naomi, and Naomi 2).
87
88config CPU_SUBTYPE_SH7750R
89 bool "Support SH7750R processor"
90 select CPU_SH4
91 select CPU_SUBTYPE_SH7750
92
93config CPU_SUBTYPE_SH7750S
94 bool "Support SH7750S processor"
95 select CPU_SH4
96 select CPU_SUBTYPE_SH7750
97
98config CPU_SUBTYPE_SH7751
99 bool "Support SH7751 processor"
100 select CPU_SH4
101 help
102 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
103 or if you have a HD6417751R CPU.
104
105config CPU_SUBTYPE_SH7751R
106 bool "Support SH7751R processor"
107 select CPU_SH4
108 select CPU_SUBTYPE_SH7751
109
110config CPU_SUBTYPE_SH7760
111 bool "Support SH7760 processor"
112 select CPU_SH4
113 select CPU_HAS_INTC2_IRQ
114
115config CPU_SUBTYPE_SH4_202
116 bool "Support SH4-202 processor"
117 select CPU_SH4
118
119comment "ST40 Processor Support"
120
121config CPU_SUBTYPE_ST40STB1
122 bool "Support ST40STB1/ST40RA processors"
123 select CPU_SUBTYPE_ST40
124 help
125 Select ST40STB1 if you have a ST40RA CPU.
126 This was previously called the ST40STB1, hence the option name.
127
128config CPU_SUBTYPE_ST40GX1
129 bool "Support ST40GX1 processor"
130 select CPU_SUBTYPE_ST40
131 help
132 Select ST40GX1 if you have a ST40GX1 CPU.
133
134comment "SH-4A Processor Support"
135
136config CPU_SUBTYPE_SH73180
137 bool "Support SH73180 processor"
138 select CPU_SH4A
139
140config CPU_SUBTYPE_SH7770
141 bool "Support SH7770 processor"
142 select CPU_SH4A
143
144config CPU_SUBTYPE_SH7780
145 bool "Support SH7780 processor"
146 select CPU_SH4A
147
148endmenu
149
150menu "Memory management options"
151
152config MMU
153 bool "Support for memory management hardware"
154 depends on !CPU_SH2
155 default y
156 help
157 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
158 boot on these systems, this option must not be set.
159
160 On other systems (such as the SH-3 and 4) where an MMU exists,
161 turning this off will boot the kernel on these machines with the
162 MMU implicitly switched off.
163
164config 32BIT
165 bool "Support 32-bit physical addressing through PMB"
166 depends on CPU_SH4A
167 default y
168 help
169 If you say Y here, physical addressing will be extended to
170 32-bits through the SH-4A PMB. If this is not set, legacy
171 29-bit physical addressing will be used.
172
173choice
174 prompt "HugeTLB page size"
175 depends on HUGETLB_PAGE && CPU_SH4 && MMU
176 default HUGETLB_PAGE_SIZE_64K
177
178config HUGETLB_PAGE_SIZE_64K
179 bool "64K"
180
181config HUGETLB_PAGE_SIZE_1MB
182 bool "1MB"
183
184endchoice
185
186source "mm/Kconfig"
187
188endmenu
189
190menu "Cache configuration"
191
192config SH7705_CACHE_32KB
193 bool "Enable 32KB cache size for SH7705"
194 depends on CPU_SUBTYPE_SH7705
195 default y
196
197config SH_DIRECT_MAPPED
198 bool "Use direct-mapped caching"
199 default n
200 help
201 Selecting this option will configure the caches to be direct-mapped,
202 even if the cache supports a 2 or 4-way mode. This is useful primarily
203 for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R,
204 SH4-202, SH4-501, etc.)
205
206 Turn this option off for platforms that do not have a direct-mapped
207 cache, and you have no need to run the caches in such a configuration.
208
209config SH_WRITETHROUGH
210 bool "Use write-through caching"
211 default y if CPU_SH2
212 help
213 Selecting this option will configure the caches in write-through
214 mode, as opposed to the default write-back configuration.
215
216 Since there's sill some aliasing issues on SH-4, this option will
217 unfortunately still require the majority of flushing functions to
218 be implemented to deal with aliasing.
219
220 If unsure, say N.
221
222config SH_OCRAM
223 bool "Operand Cache RAM (OCRAM) support"
224 help
225 Selecting this option will automatically tear down the number of
226 sets in the dcache by half, which in turn exposes a memory range.
227
228 The addresses for the OC RAM base will vary according to the
229 processor version. Consult vendor documentation for specifics.
230
231 If unsure, say N.
232
233endmenu
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 04:37:49 -0500