diff options
Diffstat (limited to 'arch/sh')
24 files changed, 1314 insertions, 1048 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index cb2c87df70ce..80119b3398e7 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
@@ -24,7 +24,7 @@ config SUPERH32 | |||
24 | select HAVE_KPROBES | 24 | select HAVE_KPROBES |
25 | select HAVE_KRETPROBES | 25 | select HAVE_KRETPROBES |
26 | select HAVE_ARCH_TRACEHOOK | 26 | select HAVE_ARCH_TRACEHOOK |
27 | select HAVE_FTRACE | 27 | select HAVE_FUNCTION_TRACER |
28 | 28 | ||
29 | config SUPERH64 | 29 | config SUPERH64 |
30 | def_bool y if CPU_SH5 | 30 | def_bool y if CPU_SH5 |
diff --git a/arch/sh/Makefile b/arch/sh/Makefile index 1f409bf81809..c43eb0d7fa3b 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # arch/sh/Makefile | 2 | # arch/sh/Makefile |
3 | # | 3 | # |
4 | # Copyright (C) 1999 Kaz Kojima | 4 | # Copyright (C) 1999 Kaz Kojima |
5 | # Copyright (C) 2002, 2003, 2004 Paul Mundt | 5 | # Copyright (C) 2002 - 2008 Paul Mundt |
6 | # Copyright (C) 2002 M. R. Brown | 6 | # Copyright (C) 2002 M. R. Brown |
7 | # | 7 | # |
8 | # This file is subject to the terms and conditions of the GNU General Public | 8 | # This file is subject to the terms and conditions of the GNU General Public |
@@ -18,16 +18,12 @@ isa-$(CONFIG_CPU_SH4) := sh4 | |||
18 | isa-$(CONFIG_CPU_SH4A) := sh4a | 18 | isa-$(CONFIG_CPU_SH4A) := sh4a |
19 | isa-$(CONFIG_CPU_SH4AL_DSP) := sh4al | 19 | isa-$(CONFIG_CPU_SH4AL_DSP) := sh4al |
20 | isa-$(CONFIG_CPU_SH5) := shmedia | 20 | isa-$(CONFIG_CPU_SH5) := shmedia |
21 | isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp | ||
22 | 21 | ||
23 | ifndef CONFIG_SH_DSP | 22 | ifeq ($(CONFIG_SUPERH32),y) |
24 | ifndef CONFIG_SH_FPU | 23 | isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp |
25 | isa-y := $(isa-y)-nofpu | 24 | isa-y := $(isa-y)-up |
26 | endif | ||
27 | endif | 25 | endif |
28 | 26 | ||
29 | isa-y := $(isa-y)-up | ||
30 | |||
31 | cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,) | 27 | cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,) |
32 | cflags-$(CONFIG_CPU_SH2A) += $(call cc-option,-m2a,) \ | 28 | cflags-$(CONFIG_CPU_SH2A) += $(call cc-option,-m2a,) \ |
33 | $(call cc-option,-m2a-nofpu,) | 29 | $(call cc-option,-m2a-nofpu,) |
@@ -38,6 +34,22 @@ cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \ | |||
38 | $(call cc-option,-m4a-nofpu,) | 34 | $(call cc-option,-m4a-nofpu,) |
39 | cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,) | 35 | cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,) |
40 | 36 | ||
37 | ifeq ($(cflags-y),) | ||
38 | # | ||
39 | # In the case where we are stuck with a compiler that has been uselessly | ||
40 | # restricted to a particular ISA, a favourite default of newer GCCs when | ||
41 | # extensive multilib targets are not provided, ensure we get the best fit | ||
42 | # regarding FP generation. This is necessary to avoid references to FP | ||
43 | # variants in libgcc where integer variants exist, which otherwise result | ||
44 | # in link errors. This is intentionally stupid (albeit many orders of | ||
45 | # magnitude less than GCC's default behaviour), as anything with a large | ||
46 | # number of multilib targets better have been built correctly for | ||
47 | # the target in mind. | ||
48 | # | ||
49 | cflags-y += $(shell $(CC) $(KBUILD_CFLAGS) -print-multi-lib | \ | ||
50 | grep nofpu | sed q | sed -e 's/^/-/;s/;.*$$//') | ||
51 | endif | ||
52 | |||
41 | cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb | 53 | cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb |
42 | cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml | 54 | cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml |
43 | 55 | ||
@@ -65,7 +77,8 @@ OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment \ | |||
65 | -R .stab -R .stabstr -S | 77 | -R .stab -R .stabstr -S |
66 | 78 | ||
67 | # Give the various platforms the opportunity to set default image types | 79 | # Give the various platforms the opportunity to set default image types |
68 | defaultimage-$(CONFIG_SUPERH32) := zImage | 80 | defaultimage-$(CONFIG_SUPERH32) := zImage |
81 | defaultimage-$(CONFIG_SH_SH7785LCR) := uImage | ||
69 | 82 | ||
70 | # Set some sensible Kbuild defaults | 83 | # Set some sensible Kbuild defaults |
71 | KBUILD_DEFCONFIG := shx3_defconfig | 84 | KBUILD_DEFCONFIG := shx3_defconfig |
diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32 index 301e6d503256..b96a055b053e 100644 --- a/arch/sh/boot/compressed/Makefile_32 +++ b/arch/sh/boot/compressed/Makefile_32 | |||
@@ -23,7 +23,7 @@ IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \ | |||
23 | 23 | ||
24 | LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) | 24 | LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) |
25 | 25 | ||
26 | ifeq ($(CONFIG_FTRACE),y) | 26 | ifeq ($(CONFIG_FUNCTION_TRACER),y) |
27 | ORIG_CFLAGS := $(KBUILD_CFLAGS) | 27 | ORIG_CFLAGS := $(KBUILD_CFLAGS) |
28 | KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) | 28 | KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) |
29 | endif | 29 | endif |
diff --git a/arch/sh/cchips/Kconfig b/arch/sh/cchips/Kconfig index 7892361eedc8..f43d18373f22 100644 --- a/arch/sh/cchips/Kconfig +++ b/arch/sh/cchips/Kconfig | |||
@@ -22,20 +22,6 @@ config HD64461 | |||
22 | Say Y if you want support for the HD64461. | 22 | Say Y if you want support for the HD64461. |
23 | Otherwise, say N. | 23 | Otherwise, say N. |
24 | 24 | ||
25 | config HD64465 | ||
26 | bool "Hitachi HD64465 companion chip support" | ||
27 | ---help--- | ||
28 | The Hitachi HD64465 provides an interface for | ||
29 | the SH7750 CPU, supporting a LCD controller, | ||
30 | CRT color controller, IrDA, USB, PCMCIA, | ||
31 | keyboard controller, and a printer interface. | ||
32 | |||
33 | More information is available at | ||
34 | <http://global.hitachi.com/New/cnews/E/1998/981019B.html>. | ||
35 | |||
36 | Say Y if you want support for the HD64465. | ||
37 | Otherwise, say N. | ||
38 | |||
39 | endchoice | 25 | endchoice |
40 | 26 | ||
41 | # These will also be split into the Kconfig's below | 27 | # These will also be split into the Kconfig's below |
@@ -61,23 +47,4 @@ config HD64461_ENABLER | |||
61 | via the HD64461 companion chip. | 47 | via the HD64461 companion chip. |
62 | Otherwise, say N. | 48 | Otherwise, say N. |
63 | 49 | ||
64 | config HD64465_IOBASE | ||
65 | hex "HD64465 start address" | ||
66 | depends on HD64465 | ||
67 | default "0xb0000000" | ||
68 | help | ||
69 | The default setting of the HD64465 IO base address is 0xb0000000. | ||
70 | |||
71 | Do not change this unless you know what you are doing. | ||
72 | |||
73 | config HD64465_IRQ | ||
74 | int "HD64465 IRQ" | ||
75 | depends on HD64465 | ||
76 | default "5" | ||
77 | help | ||
78 | The default setting of the HD64465 IRQ is 5. | ||
79 | |||
80 | Do not change this unless you know what you are doing. | ||
81 | |||
82 | endmenu | 50 | endmenu |
83 | |||
diff --git a/arch/sh/cchips/hd6446x/Makefile b/arch/sh/cchips/hd6446x/Makefile index f7de4076e242..9682e3ab668f 100644 --- a/arch/sh/cchips/hd6446x/Makefile +++ b/arch/sh/cchips/hd6446x/Makefile | |||
@@ -1,4 +1,3 @@ | |||
1 | obj-$(CONFIG_HD64461) += hd64461.o | 1 | obj-$(CONFIG_HD64461) += hd64461.o |
2 | obj-$(CONFIG_HD64465) += hd64465/ | ||
3 | 2 | ||
4 | EXTRA_CFLAGS += -Werror | 3 | EXTRA_CFLAGS += -Werror |
diff --git a/arch/sh/cchips/hd6446x/hd64465/Makefile b/arch/sh/cchips/hd6446x/hd64465/Makefile deleted file mode 100644 index f66edcb52c5b..000000000000 --- a/arch/sh/cchips/hd6446x/hd64465/Makefile +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the HD64465 | ||
3 | # | ||
4 | |||
5 | obj-y := setup.o io.o gpio.o | ||
6 | |||
diff --git a/arch/sh/cchips/hd6446x/hd64465/gpio.c b/arch/sh/cchips/hd6446x/hd64465/gpio.c deleted file mode 100644 index 43431855ec86..000000000000 --- a/arch/sh/cchips/hd6446x/hd64465/gpio.c +++ /dev/null | |||
@@ -1,196 +0,0 @@ | |||
1 | /* | ||
2 | * $Id: gpio.c,v 1.4 2003/05/19 22:24:18 lethal Exp $ | ||
3 | * by Greg Banks <gbanks@pocketpenguins.com> | ||
4 | * (c) 2000 PocketPenguins Inc | ||
5 | * | ||
6 | * GPIO pin support for HD64465 companion chip. | ||
7 | */ | ||
8 | |||
9 | #include <linux/kernel.h> | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/sched.h> | ||
13 | #include <linux/ioport.h> | ||
14 | #include <asm/io.h> | ||
15 | #include <asm/hd64465/gpio.h> | ||
16 | |||
17 | #define _PORTOF(portpin) (((portpin)>>3)&0x7) | ||
18 | #define _PINOF(portpin) ((portpin)&0x7) | ||
19 | |||
20 | /* Register addresses parametrised on port */ | ||
21 | #define GPIO_CR(port) (HD64465_REG_GPACR+((port)<<1)) | ||
22 | #define GPIO_DR(port) (HD64465_REG_GPADR+((port)<<1)) | ||
23 | #define GPIO_ICR(port) (HD64465_REG_GPAICR+((port)<<1)) | ||
24 | #define GPIO_ISR(port) (HD64465_REG_GPAISR+((port)<<1)) | ||
25 | |||
26 | #define GPIO_NPORTS 5 | ||
27 | |||
28 | #define MODNAME "hd64465_gpio" | ||
29 | |||
30 | EXPORT_SYMBOL(hd64465_gpio_configure); | ||
31 | EXPORT_SYMBOL(hd64465_gpio_get_pin); | ||
32 | EXPORT_SYMBOL(hd64465_gpio_get_port); | ||
33 | EXPORT_SYMBOL(hd64465_gpio_register_irq); | ||
34 | EXPORT_SYMBOL(hd64465_gpio_set_pin); | ||
35 | EXPORT_SYMBOL(hd64465_gpio_set_port); | ||
36 | EXPORT_SYMBOL(hd64465_gpio_unregister_irq); | ||
37 | |||
38 | /* TODO: each port should be protected with a spinlock */ | ||
39 | |||
40 | |||
41 | void hd64465_gpio_configure(int portpin, int direction) | ||
42 | { | ||
43 | unsigned short cr; | ||
44 | unsigned int shift = (_PINOF(portpin)<<1); | ||
45 | |||
46 | cr = inw(GPIO_CR(_PORTOF(portpin))); | ||
47 | cr &= ~(3<<shift); | ||
48 | cr |= direction<<shift; | ||
49 | outw(cr, GPIO_CR(_PORTOF(portpin))); | ||
50 | } | ||
51 | |||
52 | void hd64465_gpio_set_pin(int portpin, unsigned int value) | ||
53 | { | ||
54 | unsigned short d; | ||
55 | unsigned short mask = 1<<(_PINOF(portpin)); | ||
56 | |||
57 | d = inw(GPIO_DR(_PORTOF(portpin))); | ||
58 | if (value) | ||
59 | d |= mask; | ||
60 | else | ||
61 | d &= ~mask; | ||
62 | outw(d, GPIO_DR(_PORTOF(portpin))); | ||
63 | } | ||
64 | |||
65 | unsigned int hd64465_gpio_get_pin(int portpin) | ||
66 | { | ||
67 | return inw(GPIO_DR(_PORTOF(portpin))) & (1<<(_PINOF(portpin))); | ||
68 | } | ||
69 | |||
70 | /* TODO: for cleaner atomicity semantics, add a mask to this routine */ | ||
71 | |||
72 | void hd64465_gpio_set_port(int port, unsigned int value) | ||
73 | { | ||
74 | outw(value, GPIO_DR(port)); | ||
75 | } | ||
76 | |||
77 | unsigned int hd64465_gpio_get_port(int port) | ||
78 | { | ||
79 | return inw(GPIO_DR(port)); | ||
80 | } | ||
81 | |||
82 | |||
83 | static struct { | ||
84 | void (*func)(int portpin, void *dev); | ||
85 | void *dev; | ||
86 | } handlers[GPIO_NPORTS * 8]; | ||
87 | |||
88 | static irqreturn_t hd64465_gpio_interrupt(int irq, void *dev) | ||
89 | { | ||
90 | unsigned short port, pin, isr, mask, portpin; | ||
91 | |||
92 | for (port=0 ; port<GPIO_NPORTS ; port++) { | ||
93 | isr = inw(GPIO_ISR(port)); | ||
94 | |||
95 | for (pin=0 ; pin<8 ; pin++) { | ||
96 | mask = 1<<pin; | ||
97 | if (isr & mask) { | ||
98 | portpin = (port<<3)|pin; | ||
99 | if (handlers[portpin].func != 0) | ||
100 | handlers[portpin].func(portpin, handlers[portpin].dev); | ||
101 | else | ||
102 | printk(KERN_NOTICE "unexpected GPIO interrupt, pin %c%d\n", | ||
103 | port+'A', (int)pin); | ||
104 | } | ||
105 | } | ||
106 | |||
107 | /* Write 1s back to ISR to clear it? That's what the manual says.. */ | ||
108 | outw(isr, GPIO_ISR(port)); | ||
109 | } | ||
110 | |||
111 | return IRQ_HANDLED; | ||
112 | } | ||
113 | |||
114 | void hd64465_gpio_register_irq(int portpin, int mode, | ||
115 | void (*handler)(int portpin, void *dev), void *dev) | ||
116 | { | ||
117 | unsigned long flags; | ||
118 | unsigned short icr, mask; | ||
119 | |||
120 | if (handler == 0) | ||
121 | return; | ||
122 | |||
123 | local_irq_save(flags); | ||
124 | |||
125 | handlers[portpin].func = handler; | ||
126 | handlers[portpin].dev = dev; | ||
127 | |||
128 | /* | ||
129 | * Configure Interrupt Control Register | ||
130 | */ | ||
131 | icr = inw(GPIO_ICR(_PORTOF(portpin))); | ||
132 | mask = (1<<_PINOF(portpin)); | ||
133 | |||
134 | /* unmask interrupt */ | ||
135 | icr &= ~mask; | ||
136 | |||
137 | /* set TS bit */ | ||
138 | mask <<= 8; | ||
139 | icr &= ~mask; | ||
140 | if (mode == HD64465_GPIO_RISING) | ||
141 | icr |= mask; | ||
142 | |||
143 | outw(icr, GPIO_ICR(_PORTOF(portpin))); | ||
144 | |||
145 | local_irq_restore(flags); | ||
146 | } | ||
147 | |||
148 | void hd64465_gpio_unregister_irq(int portpin) | ||
149 | { | ||
150 | unsigned long flags; | ||
151 | unsigned short icr; | ||
152 | |||
153 | local_irq_save(flags); | ||
154 | |||
155 | /* | ||
156 | * Configure Interrupt Control Register | ||
157 | */ | ||
158 | icr = inw(GPIO_ICR(_PORTOF(portpin))); | ||
159 | icr |= (1<<_PINOF(portpin)); /* mask interrupt */ | ||
160 | outw(icr, GPIO_ICR(_PORTOF(portpin))); | ||
161 | |||
162 | handlers[portpin].func = 0; | ||
163 | handlers[portpin].dev = 0; | ||
164 | |||
165 | local_irq_restore(flags); | ||
166 | } | ||
167 | |||
168 | static int __init hd64465_gpio_init(void) | ||
169 | { | ||
170 | if (!request_region(HD64465_REG_GPACR, 0x1000, MODNAME)) | ||
171 | return -EBUSY; | ||
172 | if (request_irq(HD64465_IRQ_GPIO, hd64465_gpio_interrupt, | ||
173 | IRQF_DISABLED, MODNAME, 0)) | ||
174 | goto out_irqfailed; | ||
175 | |||
176 | printk("HD64465 GPIO layer on irq %d\n", HD64465_IRQ_GPIO); | ||
177 | |||
178 | return 0; | ||
179 | |||
180 | out_irqfailed: | ||
181 | release_region(HD64465_REG_GPACR, 0x1000); | ||
182 | |||
183 | return -EINVAL; | ||
184 | } | ||
185 | |||
186 | static void __exit hd64465_gpio_exit(void) | ||
187 | { | ||
188 | release_region(HD64465_REG_GPACR, 0x1000); | ||
189 | free_irq(HD64465_IRQ_GPIO, 0); | ||
190 | } | ||
191 | |||
192 | module_init(hd64465_gpio_init); | ||
193 | module_exit(hd64465_gpio_exit); | ||
194 | |||
195 | MODULE_LICENSE("GPL"); | ||
196 | |||
diff --git a/arch/sh/cchips/hd6446x/hd64465/io.c b/arch/sh/cchips/hd6446x/hd64465/io.c deleted file mode 100644 index 58704d066ae2..000000000000 --- a/arch/sh/cchips/hd6446x/hd64465/io.c +++ /dev/null | |||
@@ -1,211 +0,0 @@ | |||
1 | /* | ||
2 | * $Id: io.c,v 1.4 2003/08/03 03:05:10 lethal Exp $ | ||
3 | * by Greg Banks <gbanks@pocketpenguins.com> | ||
4 | * (c) 2000 PocketPenguins Inc | ||
5 | * | ||
6 | * Derived from io_hd64461.c, which bore the message: | ||
7 | * Copyright (C) 2000 YAEGASHI Takeshi | ||
8 | * | ||
9 | * Typical I/O routines for HD64465 system. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <asm/io.h> | ||
15 | #include <asm/hd64465/hd64465.h> | ||
16 | |||
17 | |||
18 | #define HD64465_DEBUG 0 | ||
19 | |||
20 | #if HD64465_DEBUG | ||
21 | #define DPRINTK(args...) printk(args) | ||
22 | #define DIPRINTK(n, args...) if (hd64465_io_debug>(n)) printk(args) | ||
23 | #else | ||
24 | #define DPRINTK(args...) | ||
25 | #define DIPRINTK(n, args...) | ||
26 | #endif | ||
27 | |||
28 | |||
29 | |||
30 | /* This is a hack suitable only for debugging IO port problems */ | ||
31 | int hd64465_io_debug; | ||
32 | EXPORT_SYMBOL(hd64465_io_debug); | ||
33 | |||
34 | /* Low iomap maps port 0-1K to addresses in 8byte chunks */ | ||
35 | #define HD64465_IOMAP_LO_THRESH 0x400 | ||
36 | #define HD64465_IOMAP_LO_SHIFT 3 | ||
37 | #define HD64465_IOMAP_LO_MASK ((1<<HD64465_IOMAP_LO_SHIFT)-1) | ||
38 | #define HD64465_IOMAP_LO_NMAP (HD64465_IOMAP_LO_THRESH>>HD64465_IOMAP_LO_SHIFT) | ||
39 | static unsigned long hd64465_iomap_lo[HD64465_IOMAP_LO_NMAP]; | ||
40 | static unsigned char hd64465_iomap_lo_shift[HD64465_IOMAP_LO_NMAP]; | ||
41 | |||
42 | /* High iomap maps port 1K-64K to addresses in 1K chunks */ | ||
43 | #define HD64465_IOMAP_HI_THRESH 0x10000 | ||
44 | #define HD64465_IOMAP_HI_SHIFT 10 | ||
45 | #define HD64465_IOMAP_HI_MASK ((1<<HD64465_IOMAP_HI_SHIFT)-1) | ||
46 | #define HD64465_IOMAP_HI_NMAP (HD64465_IOMAP_HI_THRESH>>HD64465_IOMAP_HI_SHIFT) | ||
47 | static unsigned long hd64465_iomap_hi[HD64465_IOMAP_HI_NMAP]; | ||
48 | static unsigned char hd64465_iomap_hi_shift[HD64465_IOMAP_HI_NMAP]; | ||
49 | |||
50 | #define PORT2ADDR(x) (sh_mv.mv_isa_port2addr(x)) | ||
51 | |||
52 | void hd64465_port_map(unsigned short baseport, unsigned int nports, | ||
53 | unsigned long addr, unsigned char shift) | ||
54 | { | ||
55 | unsigned int port, endport = baseport + nports; | ||
56 | |||
57 | DPRINTK("hd64465_port_map(base=0x%04hx, n=0x%04hx, addr=0x%08lx,endport=0x%04x)\n", | ||
58 | baseport, nports, addr,endport); | ||
59 | |||
60 | for (port = baseport ; | ||
61 | port < endport && port < HD64465_IOMAP_LO_THRESH ; | ||
62 | port += (1<<HD64465_IOMAP_LO_SHIFT)) { | ||
63 | DPRINTK(" maplo[0x%x] = 0x%08lx\n", port, addr); | ||
64 | hd64465_iomap_lo[port>>HD64465_IOMAP_LO_SHIFT] = addr; | ||
65 | hd64465_iomap_lo_shift[port>>HD64465_IOMAP_LO_SHIFT] = shift; | ||
66 | addr += (1<<(HD64465_IOMAP_LO_SHIFT)); | ||
67 | } | ||
68 | |||
69 | for (port = max_t(unsigned int, baseport, HD64465_IOMAP_LO_THRESH); | ||
70 | port < endport && port < HD64465_IOMAP_HI_THRESH ; | ||
71 | port += (1<<HD64465_IOMAP_HI_SHIFT)) { | ||
72 | DPRINTK(" maphi[0x%x] = 0x%08lx\n", port, addr); | ||
73 | hd64465_iomap_hi[port>>HD64465_IOMAP_HI_SHIFT] = addr; | ||
74 | hd64465_iomap_hi_shift[port>>HD64465_IOMAP_HI_SHIFT] = shift; | ||
75 | addr += (1<<(HD64465_IOMAP_HI_SHIFT)); | ||
76 | } | ||
77 | } | ||
78 | EXPORT_SYMBOL(hd64465_port_map); | ||
79 | |||
80 | void hd64465_port_unmap(unsigned short baseport, unsigned int nports) | ||
81 | { | ||
82 | unsigned int port, endport = baseport + nports; | ||
83 | |||
84 | DPRINTK("hd64465_port_unmap(base=0x%04hx, n=0x%04hx)\n", | ||
85 | baseport, nports); | ||
86 | |||
87 | for (port = baseport ; | ||
88 | port < endport && port < HD64465_IOMAP_LO_THRESH ; | ||
89 | port += (1<<HD64465_IOMAP_LO_SHIFT)) { | ||
90 | hd64465_iomap_lo[port>>HD64465_IOMAP_LO_SHIFT] = 0; | ||
91 | } | ||
92 | |||
93 | for (port = max_t(unsigned int, baseport, HD64465_IOMAP_LO_THRESH); | ||
94 | port < endport && port < HD64465_IOMAP_HI_THRESH ; | ||
95 | port += (1<<HD64465_IOMAP_HI_SHIFT)) { | ||
96 | hd64465_iomap_hi[port>>HD64465_IOMAP_HI_SHIFT] = 0; | ||
97 | } | ||
98 | } | ||
99 | EXPORT_SYMBOL(hd64465_port_unmap); | ||
100 | |||
101 | unsigned long hd64465_isa_port2addr(unsigned long port) | ||
102 | { | ||
103 | unsigned long addr = 0; | ||
104 | unsigned char shift; | ||
105 | |||
106 | /* handle remapping of low IO ports */ | ||
107 | if (port < HD64465_IOMAP_LO_THRESH) { | ||
108 | addr = hd64465_iomap_lo[port >> HD64465_IOMAP_LO_SHIFT]; | ||
109 | shift = hd64465_iomap_lo_shift[port >> HD64465_IOMAP_LO_SHIFT]; | ||
110 | if (addr != 0) | ||
111 | addr += (port & HD64465_IOMAP_LO_MASK) << shift; | ||
112 | else | ||
113 | printk(KERN_NOTICE "io_hd64465: access to un-mapped port %lx\n", port); | ||
114 | } else if (port < HD64465_IOMAP_HI_THRESH) { | ||
115 | addr = hd64465_iomap_hi[port >> HD64465_IOMAP_HI_SHIFT]; | ||
116 | shift = hd64465_iomap_hi_shift[port >> HD64465_IOMAP_HI_SHIFT]; | ||
117 | if (addr != 0) | ||
118 | addr += (port & HD64465_IOMAP_HI_MASK) << shift; | ||
119 | else | ||
120 | printk(KERN_NOTICE "io_hd64465: access to un-mapped port %lx\n", port); | ||
121 | } | ||
122 | |||
123 | /* HD64465 internal devices (0xb0000000) */ | ||
124 | else if (port < 0x20000) | ||
125 | addr = CONFIG_HD64465_IOBASE + port - 0x10000; | ||
126 | |||
127 | /* Whole physical address space (0xa0000000) */ | ||
128 | else | ||
129 | addr = P2SEGADDR(port); | ||
130 | |||
131 | DIPRINTK(2, "PORT2ADDR(0x%08lx) = 0x%08lx\n", port, addr); | ||
132 | |||
133 | return addr; | ||
134 | } | ||
135 | |||
136 | static inline void delay(void) | ||
137 | { | ||
138 | ctrl_inw(0xa0000000); | ||
139 | } | ||
140 | |||
141 | unsigned char hd64465_inb(unsigned long port) | ||
142 | { | ||
143 | unsigned long addr = PORT2ADDR(port); | ||
144 | unsigned long b = (addr == 0 ? 0 : *(volatile unsigned char*)addr); | ||
145 | |||
146 | DIPRINTK(0, "inb(%08lx) = %02x\n", addr, (unsigned)b); | ||
147 | return b; | ||
148 | } | ||
149 | |||
150 | unsigned char hd64465_inb_p(unsigned long port) | ||
151 | { | ||
152 | unsigned long v; | ||
153 | unsigned long addr = PORT2ADDR(port); | ||
154 | |||
155 | v = (addr == 0 ? 0 : *(volatile unsigned char*)addr); | ||
156 | delay(); | ||
157 | DIPRINTK(0, "inb_p(%08lx) = %02x\n", addr, (unsigned)v); | ||
158 | return v; | ||
159 | } | ||
160 | |||
161 | unsigned short hd64465_inw(unsigned long port) | ||
162 | { | ||
163 | unsigned long addr = PORT2ADDR(port); | ||
164 | unsigned long b = (addr == 0 ? 0 : *(volatile unsigned short*)addr); | ||
165 | DIPRINTK(0, "inw(%08lx) = %04lx\n", addr, b); | ||
166 | return b; | ||
167 | } | ||
168 | |||
169 | unsigned int hd64465_inl(unsigned long port) | ||
170 | { | ||
171 | unsigned long addr = PORT2ADDR(port); | ||
172 | unsigned int b = (addr == 0 ? 0 : *(volatile unsigned long*)addr); | ||
173 | DIPRINTK(0, "inl(%08lx) = %08x\n", addr, b); | ||
174 | return b; | ||
175 | } | ||
176 | |||
177 | void hd64465_outb(unsigned char b, unsigned long port) | ||
178 | { | ||
179 | unsigned long addr = PORT2ADDR(port); | ||
180 | |||
181 | DIPRINTK(0, "outb(%02x, %08lx)\n", (unsigned)b, addr); | ||
182 | if (addr != 0) | ||
183 | *(volatile unsigned char*)addr = b; | ||
184 | } | ||
185 | |||
186 | void hd64465_outb_p(unsigned char b, unsigned long port) | ||
187 | { | ||
188 | unsigned long addr = PORT2ADDR(port); | ||
189 | |||
190 | DIPRINTK(0, "outb_p(%02x, %08lx)\n", (unsigned)b, addr); | ||
191 | if (addr != 0) | ||
192 | *(volatile unsigned char*)addr = b; | ||
193 | delay(); | ||
194 | } | ||
195 | |||
196 | void hd64465_outw(unsigned short b, unsigned long port) | ||
197 | { | ||
198 | unsigned long addr = PORT2ADDR(port); | ||
199 | DIPRINTK(0, "outw(%04x, %08lx)\n", (unsigned)b, addr); | ||
200 | if (addr != 0) | ||
201 | *(volatile unsigned short*)addr = b; | ||
202 | } | ||
203 | |||
204 | void hd64465_outl(unsigned int b, unsigned long port) | ||
205 | { | ||
206 | unsigned long addr = PORT2ADDR(port); | ||
207 | DIPRINTK(0, "outl(%08x, %08lx)\n", b, addr); | ||
208 | if (addr != 0) | ||
209 | *(volatile unsigned long*)addr = b; | ||
210 | } | ||
211 | |||
diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c deleted file mode 100644 index 9b8820c36701..000000000000 --- a/arch/sh/cchips/hd6446x/hd64465/setup.c +++ /dev/null | |||
@@ -1,181 +0,0 @@ | |||
1 | /* | ||
2 | * $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $ | ||
3 | * | ||
4 | * Setup and IRQ handling code for the HD64465 companion chip. | ||
5 | * by Greg Banks <gbanks@pocketpenguins.com> | ||
6 | * Copyright (c) 2000 PocketPenguins Inc | ||
7 | * | ||
8 | * Derived from setup_hd64461.c which bore the message: | ||
9 | * Copyright (C) 2000 YAEGASHI Takeshi | ||
10 | */ | ||
11 | |||
12 | #include <linux/sched.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/param.h> | ||
16 | #include <linux/ioport.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/irq.h> | ||
20 | #include <asm/io.h> | ||
21 | #include <asm/irq.h> | ||
22 | #include <asm/hd64465/hd64465.h> | ||
23 | |||
24 | static void disable_hd64465_irq(unsigned int irq) | ||
25 | { | ||
26 | unsigned short nimr; | ||
27 | unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); | ||
28 | |||
29 | pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask); | ||
30 | nimr = inw(HD64465_REG_NIMR); | ||
31 | nimr |= mask; | ||
32 | outw(nimr, HD64465_REG_NIMR); | ||
33 | } | ||
34 | |||
35 | static void enable_hd64465_irq(unsigned int irq) | ||
36 | { | ||
37 | unsigned short nimr; | ||
38 | unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); | ||
39 | |||
40 | pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask); | ||
41 | nimr = inw(HD64465_REG_NIMR); | ||
42 | nimr &= ~mask; | ||
43 | outw(nimr, HD64465_REG_NIMR); | ||
44 | } | ||
45 | |||
46 | static void mask_and_ack_hd64465(unsigned int irq) | ||
47 | { | ||
48 | disable_hd64465_irq(irq); | ||
49 | } | ||
50 | |||
51 | static void end_hd64465_irq(unsigned int irq) | ||
52 | { | ||
53 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | ||
54 | enable_hd64465_irq(irq); | ||
55 | } | ||
56 | |||
57 | static unsigned int startup_hd64465_irq(unsigned int irq) | ||
58 | { | ||
59 | enable_hd64465_irq(irq); | ||
60 | return 0; | ||
61 | } | ||
62 | |||
63 | static void shutdown_hd64465_irq(unsigned int irq) | ||
64 | { | ||
65 | disable_hd64465_irq(irq); | ||
66 | } | ||
67 | |||
68 | static struct hw_interrupt_type hd64465_irq_type = { | ||
69 | .typename = "HD64465-IRQ", | ||
70 | .startup = startup_hd64465_irq, | ||
71 | .shutdown = shutdown_hd64465_irq, | ||
72 | .enable = enable_hd64465_irq, | ||
73 | .disable = disable_hd64465_irq, | ||
74 | .ack = mask_and_ack_hd64465, | ||
75 | .end = end_hd64465_irq, | ||
76 | }; | ||
77 | |||
78 | static irqreturn_t hd64465_interrupt(int irq, void *dev_id) | ||
79 | { | ||
80 | printk(KERN_INFO | ||
81 | "HD64465: spurious interrupt, nirr: 0x%x nimr: 0x%x\n", | ||
82 | inw(HD64465_REG_NIRR), inw(HD64465_REG_NIMR)); | ||
83 | |||
84 | return IRQ_NONE; | ||
85 | } | ||
86 | |||
87 | /* | ||
88 | * Support for a secondary IRQ demux step. This is necessary | ||
89 | * because the HD64465 presents a very thin interface to the | ||
90 | * PCMCIA bus; a lot of features (such as remapping interrupts) | ||
91 | * normally done in hardware by other PCMCIA host bridges is | ||
92 | * instead done in software. | ||
93 | */ | ||
94 | static struct { | ||
95 | int (*func)(int, void *); | ||
96 | void *dev; | ||
97 | } hd64465_demux[HD64465_IRQ_NUM]; | ||
98 | |||
99 | void hd64465_register_irq_demux(int irq, | ||
100 | int (*demux)(int irq, void *dev), void *dev) | ||
101 | { | ||
102 | hd64465_demux[irq - HD64465_IRQ_BASE].func = demux; | ||
103 | hd64465_demux[irq - HD64465_IRQ_BASE].dev = dev; | ||
104 | } | ||
105 | EXPORT_SYMBOL(hd64465_register_irq_demux); | ||
106 | |||
107 | void hd64465_unregister_irq_demux(int irq) | ||
108 | { | ||
109 | hd64465_demux[irq - HD64465_IRQ_BASE].func = 0; | ||
110 | } | ||
111 | EXPORT_SYMBOL(hd64465_unregister_irq_demux); | ||
112 | |||
113 | int hd64465_irq_demux(int irq) | ||
114 | { | ||
115 | if (irq == CONFIG_HD64465_IRQ) { | ||
116 | unsigned short i, bit; | ||
117 | unsigned short nirr = inw(HD64465_REG_NIRR); | ||
118 | unsigned short nimr = inw(HD64465_REG_NIMR); | ||
119 | |||
120 | pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr); | ||
121 | nirr &= ~nimr; | ||
122 | for (bit = 1, i = 0 ; i < HD64465_IRQ_NUM ; bit <<= 1, i++) | ||
123 | if (nirr & bit) | ||
124 | break; | ||
125 | |||
126 | if (i < HD64465_IRQ_NUM) { | ||
127 | irq = HD64465_IRQ_BASE + i; | ||
128 | if (hd64465_demux[i].func != 0) | ||
129 | irq = hd64465_demux[i].func(irq, hd64465_demux[i].dev); | ||
130 | } | ||
131 | } | ||
132 | return irq; | ||
133 | } | ||
134 | |||
135 | static struct irqaction irq0 = { | ||
136 | .handler = hd64465_interrupt, | ||
137 | .flags = IRQF_DISABLED, | ||
138 | .mask = CPU_MASK_NONE, | ||
139 | .name = "HD64465", | ||
140 | }; | ||
141 | |||
142 | static int __init setup_hd64465(void) | ||
143 | { | ||
144 | int i; | ||
145 | unsigned short rev; | ||
146 | unsigned short smscr; | ||
147 | |||
148 | if (!MACH_HD64465) | ||
149 | return 0; | ||
150 | |||
151 | printk(KERN_INFO "HD64465 configured at 0x%x on irq %d(mapped into %d to %d)\n", | ||
152 | CONFIG_HD64465_IOBASE, | ||
153 | CONFIG_HD64465_IRQ, | ||
154 | HD64465_IRQ_BASE, | ||
155 | HD64465_IRQ_BASE+HD64465_IRQ_NUM-1); | ||
156 | |||
157 | if (inw(HD64465_REG_SDID) != HD64465_SDID) { | ||
158 | printk(KERN_ERR "HD64465 device ID not found, check base address\n"); | ||
159 | } | ||
160 | |||
161 | rev = inw(HD64465_REG_SRR); | ||
162 | printk(KERN_INFO "HD64465 hardware revision %d.%d\n", (rev >> 8) & 0xff, rev & 0xff); | ||
163 | |||
164 | outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */ | ||
165 | |||
166 | for (i = 0; i < HD64465_IRQ_NUM ; i++) { | ||
167 | irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type; | ||
168 | } | ||
169 | |||
170 | setup_irq(CONFIG_HD64465_IRQ, &irq0); | ||
171 | |||
172 | /* wake up the UART from STANDBY at this point */ | ||
173 | smscr = inw(HD64465_REG_SMSCR); | ||
174 | outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR); | ||
175 | |||
176 | /* remap IO ports for first ISA serial port to HD64465 UART */ | ||
177 | hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1); | ||
178 | |||
179 | return 0; | ||
180 | } | ||
181 | module_init(setup_hd64465); | ||
diff --git a/arch/sh/configs/migor_defconfig b/arch/sh/configs/migor_defconfig index 624c47aa66d3..30cac42f25e7 100644 --- a/arch/sh/configs/migor_defconfig +++ b/arch/sh/configs/migor_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.27 | 3 | # Linux kernel version: 2.6.28-rc2 |
4 | # Tue Oct 21 12:57:28 2008 | 4 | # Fri Oct 31 15:58:06 2008 |
5 | # | 5 | # |
6 | CONFIG_SUPERH=y | 6 | CONFIG_SUPERH=y |
7 | CONFIG_SUPERH32=y | 7 | CONFIG_SUPERH32=y |
@@ -73,7 +73,6 @@ CONFIG_EVENTFD=y | |||
73 | CONFIG_SHMEM=y | 73 | CONFIG_SHMEM=y |
74 | CONFIG_AIO=y | 74 | CONFIG_AIO=y |
75 | CONFIG_VM_EVENT_COUNTERS=y | 75 | CONFIG_VM_EVENT_COUNTERS=y |
76 | CONFIG_PCI_QUIRKS=y | ||
77 | CONFIG_SLAB=y | 76 | CONFIG_SLAB=y |
78 | # CONFIG_SLUB is not set | 77 | # CONFIG_SLUB is not set |
79 | # CONFIG_SLOB is not set | 78 | # CONFIG_SLOB is not set |
@@ -285,7 +284,7 @@ CONFIG_GUSA=y | |||
285 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 | 284 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 |
286 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | 285 | CONFIG_BOOT_LINK_OFFSET=0x00800000 |
287 | CONFIG_CMDLINE_BOOL=y | 286 | CONFIG_CMDLINE_BOOL=y |
288 | CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ip=on" | 287 | CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ip=on root=/dev/nfs ip=dhcp" |
289 | 288 | ||
290 | # | 289 | # |
291 | # Bus options | 290 | # Bus options |
@@ -718,6 +717,7 @@ CONFIG_SSB_POSSIBLE=y | |||
718 | # CONFIG_MFD_SM501 is not set | 717 | # CONFIG_MFD_SM501 is not set |
719 | # CONFIG_HTC_PASIC3 is not set | 718 | # CONFIG_HTC_PASIC3 is not set |
720 | # CONFIG_MFD_TMIO is not set | 719 | # CONFIG_MFD_TMIO is not set |
720 | # CONFIG_PMIC_DA903X is not set | ||
721 | # CONFIG_MFD_WM8400 is not set | 721 | # CONFIG_MFD_WM8400 is not set |
722 | # CONFIG_MFD_WM8350_I2C is not set | 722 | # CONFIG_MFD_WM8350_I2C is not set |
723 | 723 | ||
@@ -969,7 +969,23 @@ CONFIG_TMPFS=y | |||
969 | # CONFIG_ROMFS_FS is not set | 969 | # CONFIG_ROMFS_FS is not set |
970 | # CONFIG_SYSV_FS is not set | 970 | # CONFIG_SYSV_FS is not set |
971 | # CONFIG_UFS_FS is not set | 971 | # CONFIG_UFS_FS is not set |
972 | # CONFIG_NETWORK_FILESYSTEMS is not set | 972 | CONFIG_NETWORK_FILESYSTEMS=y |
973 | CONFIG_NFS_FS=y | ||
974 | # CONFIG_NFS_V3 is not set | ||
975 | # CONFIG_NFS_V4 is not set | ||
976 | CONFIG_ROOT_NFS=y | ||
977 | # CONFIG_NFSD is not set | ||
978 | CONFIG_LOCKD=y | ||
979 | CONFIG_NFS_COMMON=y | ||
980 | CONFIG_SUNRPC=y | ||
981 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
982 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
983 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
984 | # CONFIG_SMB_FS is not set | ||
985 | # CONFIG_CIFS is not set | ||
986 | # CONFIG_NCP_FS is not set | ||
987 | # CONFIG_CODA_FS is not set | ||
988 | # CONFIG_AFS_FS is not set | ||
973 | 989 | ||
974 | # | 990 | # |
975 | # Partition Types | 991 | # Partition Types |
@@ -1019,7 +1035,12 @@ CONFIG_CRYPTO=y | |||
1019 | # Crypto core or helper | 1035 | # Crypto core or helper |
1020 | # | 1036 | # |
1021 | # CONFIG_CRYPTO_FIPS is not set | 1037 | # CONFIG_CRYPTO_FIPS is not set |
1022 | # CONFIG_CRYPTO_MANAGER is not set | 1038 | CONFIG_CRYPTO_ALGAPI=y |
1039 | CONFIG_CRYPTO_AEAD=y | ||
1040 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1041 | CONFIG_CRYPTO_HASH=y | ||
1042 | CONFIG_CRYPTO_RNG=y | ||
1043 | CONFIG_CRYPTO_MANAGER=y | ||
1023 | # CONFIG_CRYPTO_GF128MUL is not set | 1044 | # CONFIG_CRYPTO_GF128MUL is not set |
1024 | # CONFIG_CRYPTO_NULL is not set | 1045 | # CONFIG_CRYPTO_NULL is not set |
1025 | # CONFIG_CRYPTO_CRYPTD is not set | 1046 | # CONFIG_CRYPTO_CRYPTD is not set |
@@ -1096,7 +1117,7 @@ CONFIG_CRYPTO=y | |||
1096 | # Random Number Generation | 1117 | # Random Number Generation |
1097 | # | 1118 | # |
1098 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | 1119 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
1099 | CONFIG_CRYPTO_HW=y | 1120 | # CONFIG_CRYPTO_HW is not set |
1100 | 1121 | ||
1101 | # | 1122 | # |
1102 | # Library routines | 1123 | # Library routines |
diff --git a/arch/sh/configs/ul2_defconfig b/arch/sh/configs/ul2_defconfig new file mode 100644 index 000000000000..9afff67d9ff2 --- /dev/null +++ b/arch/sh/configs/ul2_defconfig | |||
@@ -0,0 +1,1169 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.28-rc2 | ||
4 | # Tue Oct 28 17:35:17 2008 | ||
5 | # | ||
6 | CONFIG_SUPERH=y | ||
7 | CONFIG_SUPERH32=y | ||
8 | CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" | ||
9 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
10 | CONFIG_GENERIC_BUG=y | ||
11 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
12 | CONFIG_GENERIC_HWEIGHT=y | ||
13 | CONFIG_GENERIC_HARDIRQS=y | ||
14 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
15 | CONFIG_GENERIC_IRQ_PROBE=y | ||
16 | # CONFIG_GENERIC_GPIO is not set | ||
17 | CONFIG_GENERIC_TIME=y | ||
18 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
19 | CONFIG_SYS_SUPPORTS_NUMA=y | ||
20 | CONFIG_STACKTRACE_SUPPORT=y | ||
21 | CONFIG_LOCKDEP_SUPPORT=y | ||
22 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
23 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
24 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
25 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | ||
26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
27 | |||
28 | # | ||
29 | # General setup | ||
30 | # | ||
31 | CONFIG_EXPERIMENTAL=y | ||
32 | CONFIG_BROKEN_ON_SMP=y | ||
33 | CONFIG_LOCK_KERNEL=y | ||
34 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
35 | CONFIG_LOCALVERSION="" | ||
36 | CONFIG_LOCALVERSION_AUTO=y | ||
37 | CONFIG_SWAP=y | ||
38 | CONFIG_SYSVIPC=y | ||
39 | CONFIG_SYSVIPC_SYSCTL=y | ||
40 | # CONFIG_POSIX_MQUEUE is not set | ||
41 | CONFIG_BSD_PROCESS_ACCT=y | ||
42 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
43 | # CONFIG_TASKSTATS is not set | ||
44 | # CONFIG_AUDIT is not set | ||
45 | CONFIG_IKCONFIG=y | ||
46 | CONFIG_IKCONFIG_PROC=y | ||
47 | CONFIG_LOG_BUF_SHIFT=14 | ||
48 | # CONFIG_CGROUPS is not set | ||
49 | # CONFIG_GROUP_SCHED is not set | ||
50 | CONFIG_SYSFS_DEPRECATED=y | ||
51 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
52 | # CONFIG_RELAY is not set | ||
53 | # CONFIG_NAMESPACES is not set | ||
54 | CONFIG_BLK_DEV_INITRD=y | ||
55 | CONFIG_INITRAMFS_SOURCE="" | ||
56 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
57 | CONFIG_SYSCTL=y | ||
58 | CONFIG_EMBEDDED=y | ||
59 | CONFIG_UID16=y | ||
60 | CONFIG_SYSCTL_SYSCALL=y | ||
61 | CONFIG_KALLSYMS=y | ||
62 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
63 | CONFIG_HOTPLUG=y | ||
64 | CONFIG_PRINTK=y | ||
65 | CONFIG_BUG=y | ||
66 | CONFIG_ELF_CORE=y | ||
67 | CONFIG_COMPAT_BRK=y | ||
68 | CONFIG_BASE_FULL=y | ||
69 | CONFIG_FUTEX=y | ||
70 | CONFIG_ANON_INODES=y | ||
71 | CONFIG_EPOLL=y | ||
72 | CONFIG_SIGNALFD=y | ||
73 | CONFIG_TIMERFD=y | ||
74 | CONFIG_EVENTFD=y | ||
75 | CONFIG_SHMEM=y | ||
76 | CONFIG_AIO=y | ||
77 | CONFIG_VM_EVENT_COUNTERS=y | ||
78 | CONFIG_SLUB_DEBUG=y | ||
79 | # CONFIG_SLAB is not set | ||
80 | CONFIG_SLUB=y | ||
81 | # CONFIG_SLOB is not set | ||
82 | CONFIG_PROFILING=y | ||
83 | # CONFIG_MARKERS is not set | ||
84 | # CONFIG_OPROFILE is not set | ||
85 | CONFIG_HAVE_OPROFILE=y | ||
86 | # CONFIG_KPROBES is not set | ||
87 | CONFIG_HAVE_IOREMAP_PROT=y | ||
88 | CONFIG_HAVE_KPROBES=y | ||
89 | CONFIG_HAVE_KRETPROBES=y | ||
90 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
91 | CONFIG_HAVE_CLK=y | ||
92 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
93 | CONFIG_SLABINFO=y | ||
94 | CONFIG_RT_MUTEXES=y | ||
95 | # CONFIG_TINY_SHMEM is not set | ||
96 | CONFIG_BASE_SMALL=0 | ||
97 | CONFIG_MODULES=y | ||
98 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
99 | CONFIG_MODULE_UNLOAD=y | ||
100 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
101 | # CONFIG_MODVERSIONS is not set | ||
102 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
103 | CONFIG_KMOD=y | ||
104 | CONFIG_BLOCK=y | ||
105 | # CONFIG_LBD is not set | ||
106 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
107 | # CONFIG_LSF is not set | ||
108 | # CONFIG_BLK_DEV_BSG is not set | ||
109 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
110 | |||
111 | # | ||
112 | # IO Schedulers | ||
113 | # | ||
114 | CONFIG_IOSCHED_NOOP=y | ||
115 | # CONFIG_IOSCHED_AS is not set | ||
116 | # CONFIG_IOSCHED_DEADLINE is not set | ||
117 | # CONFIG_IOSCHED_CFQ is not set | ||
118 | # CONFIG_DEFAULT_AS is not set | ||
119 | # CONFIG_DEFAULT_DEADLINE is not set | ||
120 | # CONFIG_DEFAULT_CFQ is not set | ||
121 | CONFIG_DEFAULT_NOOP=y | ||
122 | CONFIG_DEFAULT_IOSCHED="noop" | ||
123 | CONFIG_CLASSIC_RCU=y | ||
124 | # CONFIG_FREEZER is not set | ||
125 | |||
126 | # | ||
127 | # System type | ||
128 | # | ||
129 | CONFIG_CPU_SH4=y | ||
130 | CONFIG_CPU_SH4A=y | ||
131 | CONFIG_CPU_SH4AL_DSP=y | ||
132 | CONFIG_CPU_SHX2=y | ||
133 | # CONFIG_CPU_SUBTYPE_SH7619 is not set | ||
134 | # CONFIG_CPU_SUBTYPE_SH7203 is not set | ||
135 | # CONFIG_CPU_SUBTYPE_SH7206 is not set | ||
136 | # CONFIG_CPU_SUBTYPE_SH7263 is not set | ||
137 | # CONFIG_CPU_SUBTYPE_MXG is not set | ||
138 | # CONFIG_CPU_SUBTYPE_SH7705 is not set | ||
139 | # CONFIG_CPU_SUBTYPE_SH7706 is not set | ||
140 | # CONFIG_CPU_SUBTYPE_SH7707 is not set | ||
141 | # CONFIG_CPU_SUBTYPE_SH7708 is not set | ||
142 | # CONFIG_CPU_SUBTYPE_SH7709 is not set | ||
143 | # CONFIG_CPU_SUBTYPE_SH7710 is not set | ||
144 | # CONFIG_CPU_SUBTYPE_SH7712 is not set | ||
145 | # CONFIG_CPU_SUBTYPE_SH7720 is not set | ||
146 | # CONFIG_CPU_SUBTYPE_SH7721 is not set | ||
147 | # CONFIG_CPU_SUBTYPE_SH7750 is not set | ||
148 | # CONFIG_CPU_SUBTYPE_SH7091 is not set | ||
149 | # CONFIG_CPU_SUBTYPE_SH7750R is not set | ||
150 | # CONFIG_CPU_SUBTYPE_SH7750S is not set | ||
151 | # CONFIG_CPU_SUBTYPE_SH7751 is not set | ||
152 | # CONFIG_CPU_SUBTYPE_SH7751R is not set | ||
153 | # CONFIG_CPU_SUBTYPE_SH7760 is not set | ||
154 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set | ||
155 | # CONFIG_CPU_SUBTYPE_SH7723 is not set | ||
156 | # CONFIG_CPU_SUBTYPE_SH7763 is not set | ||
157 | # CONFIG_CPU_SUBTYPE_SH7770 is not set | ||
158 | # CONFIG_CPU_SUBTYPE_SH7780 is not set | ||
159 | # CONFIG_CPU_SUBTYPE_SH7785 is not set | ||
160 | # CONFIG_CPU_SUBTYPE_SHX3 is not set | ||
161 | # CONFIG_CPU_SUBTYPE_SH7343 is not set | ||
162 | # CONFIG_CPU_SUBTYPE_SH7722 is not set | ||
163 | CONFIG_CPU_SUBTYPE_SH7366=y | ||
164 | # CONFIG_CPU_SUBTYPE_SH5_101 is not set | ||
165 | # CONFIG_CPU_SUBTYPE_SH5_103 is not set | ||
166 | |||
167 | # | ||
168 | # Memory management options | ||
169 | # | ||
170 | CONFIG_QUICKLIST=y | ||
171 | CONFIG_MMU=y | ||
172 | CONFIG_PAGE_OFFSET=0x80000000 | ||
173 | CONFIG_MEMORY_START=0x08000000 | ||
174 | CONFIG_MEMORY_SIZE=0x01f00000 | ||
175 | CONFIG_29BIT=y | ||
176 | # CONFIG_X2TLB is not set | ||
177 | CONFIG_VSYSCALL=y | ||
178 | CONFIG_NUMA=y | ||
179 | CONFIG_NODES_SHIFT=1 | ||
180 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | ||
181 | CONFIG_ARCH_SPARSEMEM_DEFAULT=y | ||
182 | CONFIG_MAX_ACTIVE_REGIONS=1 | ||
183 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
184 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y | ||
185 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
186 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
187 | CONFIG_PAGE_SIZE_4KB=y | ||
188 | # CONFIG_PAGE_SIZE_8KB is not set | ||
189 | # CONFIG_PAGE_SIZE_16KB is not set | ||
190 | # CONFIG_PAGE_SIZE_64KB is not set | ||
191 | CONFIG_ENTRY_OFFSET=0x00001000 | ||
192 | CONFIG_HUGETLB_PAGE_SIZE_64K=y | ||
193 | # CONFIG_HUGETLB_PAGE_SIZE_256K is not set | ||
194 | # CONFIG_HUGETLB_PAGE_SIZE_1MB is not set | ||
195 | # CONFIG_HUGETLB_PAGE_SIZE_4MB is not set | ||
196 | # CONFIG_HUGETLB_PAGE_SIZE_64MB is not set | ||
197 | # CONFIG_HUGETLB_PAGE_SIZE_512MB is not set | ||
198 | CONFIG_SELECT_MEMORY_MODEL=y | ||
199 | # CONFIG_FLATMEM_MANUAL is not set | ||
200 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
201 | CONFIG_SPARSEMEM_MANUAL=y | ||
202 | CONFIG_SPARSEMEM=y | ||
203 | CONFIG_NEED_MULTIPLE_NODES=y | ||
204 | CONFIG_HAVE_MEMORY_PRESENT=y | ||
205 | CONFIG_SPARSEMEM_STATIC=y | ||
206 | # CONFIG_MEMORY_HOTPLUG is not set | ||
207 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
208 | # CONFIG_MIGRATION is not set | ||
209 | # CONFIG_RESOURCES_64BIT is not set | ||
210 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
211 | CONFIG_ZONE_DMA_FLAG=0 | ||
212 | CONFIG_NR_QUICK=2 | ||
213 | CONFIG_UNEVICTABLE_LRU=y | ||
214 | |||
215 | # | ||
216 | # Cache configuration | ||
217 | # | ||
218 | # CONFIG_SH_DIRECT_MAPPED is not set | ||
219 | CONFIG_CACHE_WRITEBACK=y | ||
220 | # CONFIG_CACHE_WRITETHROUGH is not set | ||
221 | # CONFIG_CACHE_OFF is not set | ||
222 | |||
223 | # | ||
224 | # Processor features | ||
225 | # | ||
226 | CONFIG_CPU_LITTLE_ENDIAN=y | ||
227 | # CONFIG_CPU_BIG_ENDIAN is not set | ||
228 | # CONFIG_SH_FPU_EMU is not set | ||
229 | # CONFIG_SH_DSP is not set | ||
230 | # CONFIG_SH_STORE_QUEUES is not set | ||
231 | CONFIG_CPU_HAS_INTEVT=y | ||
232 | CONFIG_CPU_HAS_SR_RB=y | ||
233 | CONFIG_CPU_HAS_PTEA=y | ||
234 | CONFIG_CPU_HAS_DSP=y | ||
235 | |||
236 | # | ||
237 | # Board support | ||
238 | # | ||
239 | |||
240 | # | ||
241 | # Timer and clock configuration | ||
242 | # | ||
243 | CONFIG_SH_TMU=y | ||
244 | CONFIG_SH_TIMER_IRQ=16 | ||
245 | CONFIG_SH_PCLK_FREQ=33333333 | ||
246 | CONFIG_TICK_ONESHOT=y | ||
247 | # CONFIG_NO_HZ is not set | ||
248 | CONFIG_HIGH_RES_TIMERS=y | ||
249 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
250 | |||
251 | # | ||
252 | # CPU Frequency scaling | ||
253 | # | ||
254 | # CONFIG_CPU_FREQ is not set | ||
255 | |||
256 | # | ||
257 | # DMA support | ||
258 | # | ||
259 | # CONFIG_SH_DMA is not set | ||
260 | |||
261 | # | ||
262 | # Companion Chips | ||
263 | # | ||
264 | |||
265 | # | ||
266 | # Additional SuperH Device Drivers | ||
267 | # | ||
268 | # CONFIG_HEARTBEAT is not set | ||
269 | # CONFIG_PUSH_SWITCH is not set | ||
270 | |||
271 | # | ||
272 | # Kernel features | ||
273 | # | ||
274 | CONFIG_HZ_100=y | ||
275 | # CONFIG_HZ_250 is not set | ||
276 | # CONFIG_HZ_300 is not set | ||
277 | # CONFIG_HZ_1000 is not set | ||
278 | CONFIG_HZ=100 | ||
279 | CONFIG_SCHED_HRTICK=y | ||
280 | CONFIG_KEXEC=y | ||
281 | # CONFIG_CRASH_DUMP is not set | ||
282 | # CONFIG_SECCOMP is not set | ||
283 | # CONFIG_PREEMPT_NONE is not set | ||
284 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
285 | CONFIG_PREEMPT=y | ||
286 | # CONFIG_PREEMPT_RCU is not set | ||
287 | CONFIG_GUSA=y | ||
288 | |||
289 | # | ||
290 | # Boot options | ||
291 | # | ||
292 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 | ||
293 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | ||
294 | CONFIG_CMDLINE_BOOL=y | ||
295 | CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/nfs ip=dhcp" | ||
296 | |||
297 | # | ||
298 | # Bus options | ||
299 | # | ||
300 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
301 | # CONFIG_PCCARD is not set | ||
302 | |||
303 | # | ||
304 | # Executable file formats | ||
305 | # | ||
306 | CONFIG_BINFMT_ELF=y | ||
307 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
308 | # CONFIG_HAVE_AOUT is not set | ||
309 | # CONFIG_BINFMT_MISC is not set | ||
310 | CONFIG_NET=y | ||
311 | |||
312 | # | ||
313 | # Networking options | ||
314 | # | ||
315 | CONFIG_PACKET=y | ||
316 | CONFIG_PACKET_MMAP=y | ||
317 | CONFIG_UNIX=y | ||
318 | CONFIG_XFRM=y | ||
319 | # CONFIG_XFRM_USER is not set | ||
320 | # CONFIG_XFRM_SUB_POLICY is not set | ||
321 | # CONFIG_XFRM_MIGRATE is not set | ||
322 | # CONFIG_XFRM_STATISTICS is not set | ||
323 | # CONFIG_NET_KEY is not set | ||
324 | CONFIG_INET=y | ||
325 | # CONFIG_IP_MULTICAST is not set | ||
326 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
327 | CONFIG_IP_FIB_HASH=y | ||
328 | CONFIG_IP_PNP=y | ||
329 | CONFIG_IP_PNP_DHCP=y | ||
330 | # CONFIG_IP_PNP_BOOTP is not set | ||
331 | # CONFIG_IP_PNP_RARP is not set | ||
332 | # CONFIG_NET_IPIP is not set | ||
333 | # CONFIG_NET_IPGRE is not set | ||
334 | # CONFIG_ARPD is not set | ||
335 | # CONFIG_SYN_COOKIES is not set | ||
336 | # CONFIG_INET_AH is not set | ||
337 | # CONFIG_INET_ESP is not set | ||
338 | # CONFIG_INET_IPCOMP is not set | ||
339 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
340 | # CONFIG_INET_TUNNEL is not set | ||
341 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
342 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
343 | CONFIG_INET_XFRM_MODE_BEET=y | ||
344 | # CONFIG_INET_LRO is not set | ||
345 | CONFIG_INET_DIAG=y | ||
346 | CONFIG_INET_TCP_DIAG=y | ||
347 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
348 | CONFIG_TCP_CONG_CUBIC=y | ||
349 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
350 | # CONFIG_TCP_MD5SIG is not set | ||
351 | # CONFIG_IPV6 is not set | ||
352 | # CONFIG_NETWORK_SECMARK is not set | ||
353 | # CONFIG_NETFILTER is not set | ||
354 | # CONFIG_IP_DCCP is not set | ||
355 | # CONFIG_IP_SCTP is not set | ||
356 | # CONFIG_TIPC is not set | ||
357 | # CONFIG_ATM is not set | ||
358 | # CONFIG_BRIDGE is not set | ||
359 | # CONFIG_NET_DSA is not set | ||
360 | # CONFIG_VLAN_8021Q is not set | ||
361 | # CONFIG_DECNET is not set | ||
362 | # CONFIG_LLC2 is not set | ||
363 | # CONFIG_IPX is not set | ||
364 | # CONFIG_ATALK is not set | ||
365 | # CONFIG_X25 is not set | ||
366 | # CONFIG_LAPB is not set | ||
367 | # CONFIG_ECONET is not set | ||
368 | # CONFIG_WAN_ROUTER is not set | ||
369 | # CONFIG_NET_SCHED is not set | ||
370 | |||
371 | # | ||
372 | # Network testing | ||
373 | # | ||
374 | # CONFIG_NET_PKTGEN is not set | ||
375 | # CONFIG_HAMRADIO is not set | ||
376 | # CONFIG_CAN is not set | ||
377 | # CONFIG_IRDA is not set | ||
378 | # CONFIG_BT is not set | ||
379 | # CONFIG_AF_RXRPC is not set | ||
380 | # CONFIG_PHONET is not set | ||
381 | CONFIG_WIRELESS=y | ||
382 | CONFIG_CFG80211=y | ||
383 | CONFIG_NL80211=y | ||
384 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | ||
385 | CONFIG_WIRELESS_EXT=y | ||
386 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
387 | CONFIG_MAC80211=y | ||
388 | |||
389 | # | ||
390 | # Rate control algorithm selection | ||
391 | # | ||
392 | CONFIG_MAC80211_RC_PID=y | ||
393 | # CONFIG_MAC80211_RC_MINSTREL is not set | ||
394 | CONFIG_MAC80211_RC_DEFAULT_PID=y | ||
395 | # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set | ||
396 | CONFIG_MAC80211_RC_DEFAULT="pid" | ||
397 | # CONFIG_MAC80211_MESH is not set | ||
398 | # CONFIG_MAC80211_LEDS is not set | ||
399 | # CONFIG_MAC80211_DEBUG_MENU is not set | ||
400 | CONFIG_IEEE80211=m | ||
401 | CONFIG_IEEE80211_DEBUG=y | ||
402 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
403 | CONFIG_IEEE80211_CRYPT_CCMP=m | ||
404 | CONFIG_IEEE80211_CRYPT_TKIP=m | ||
405 | # CONFIG_RFKILL is not set | ||
406 | # CONFIG_NET_9P is not set | ||
407 | |||
408 | # | ||
409 | # Device Drivers | ||
410 | # | ||
411 | |||
412 | # | ||
413 | # Generic Driver Options | ||
414 | # | ||
415 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
416 | CONFIG_STANDALONE=y | ||
417 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
418 | CONFIG_FW_LOADER=y | ||
419 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
420 | CONFIG_EXTRA_FIRMWARE="" | ||
421 | # CONFIG_SYS_HYPERVISOR is not set | ||
422 | # CONFIG_CONNECTOR is not set | ||
423 | CONFIG_MTD=y | ||
424 | # CONFIG_MTD_DEBUG is not set | ||
425 | CONFIG_MTD_CONCAT=y | ||
426 | CONFIG_MTD_PARTITIONS=y | ||
427 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
428 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
429 | # CONFIG_MTD_AR7_PARTS is not set | ||
430 | |||
431 | # | ||
432 | # User Modules And Translation Layers | ||
433 | # | ||
434 | CONFIG_MTD_CHAR=y | ||
435 | CONFIG_MTD_BLKDEVS=y | ||
436 | CONFIG_MTD_BLOCK=y | ||
437 | # CONFIG_FTL is not set | ||
438 | # CONFIG_NFTL is not set | ||
439 | # CONFIG_INFTL is not set | ||
440 | # CONFIG_RFD_FTL is not set | ||
441 | # CONFIG_SSFDC is not set | ||
442 | # CONFIG_MTD_OOPS is not set | ||
443 | |||
444 | # | ||
445 | # RAM/ROM/Flash chip drivers | ||
446 | # | ||
447 | CONFIG_MTD_CFI=y | ||
448 | # CONFIG_MTD_JEDECPROBE is not set | ||
449 | CONFIG_MTD_GEN_PROBE=y | ||
450 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
451 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
452 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
453 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
454 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
455 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
456 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
457 | CONFIG_MTD_CFI_I1=y | ||
458 | CONFIG_MTD_CFI_I2=y | ||
459 | # CONFIG_MTD_CFI_I4 is not set | ||
460 | # CONFIG_MTD_CFI_I8 is not set | ||
461 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
462 | CONFIG_MTD_CFI_AMDSTD=y | ||
463 | # CONFIG_MTD_CFI_STAA is not set | ||
464 | CONFIG_MTD_CFI_UTIL=y | ||
465 | CONFIG_MTD_RAM=y | ||
466 | # CONFIG_MTD_ROM is not set | ||
467 | # CONFIG_MTD_ABSENT is not set | ||
468 | |||
469 | # | ||
470 | # Mapping drivers for chip access | ||
471 | # | ||
472 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
473 | # CONFIG_MTD_PHYSMAP is not set | ||
474 | # CONFIG_MTD_PLATRAM is not set | ||
475 | |||
476 | # | ||
477 | # Self-contained MTD device drivers | ||
478 | # | ||
479 | # CONFIG_MTD_SLRAM is not set | ||
480 | # CONFIG_MTD_PHRAM is not set | ||
481 | # CONFIG_MTD_MTDRAM is not set | ||
482 | # CONFIG_MTD_BLOCK2MTD is not set | ||
483 | |||
484 | # | ||
485 | # Disk-On-Chip Device Drivers | ||
486 | # | ||
487 | # CONFIG_MTD_DOC2000 is not set | ||
488 | # CONFIG_MTD_DOC2001 is not set | ||
489 | # CONFIG_MTD_DOC2001PLUS is not set | ||
490 | # CONFIG_MTD_NAND is not set | ||
491 | # CONFIG_MTD_ONENAND is not set | ||
492 | |||
493 | # | ||
494 | # UBI - Unsorted block images | ||
495 | # | ||
496 | # CONFIG_MTD_UBI is not set | ||
497 | # CONFIG_PARPORT is not set | ||
498 | CONFIG_BLK_DEV=y | ||
499 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
500 | # CONFIG_BLK_DEV_LOOP is not set | ||
501 | # CONFIG_BLK_DEV_NBD is not set | ||
502 | # CONFIG_BLK_DEV_UB is not set | ||
503 | CONFIG_BLK_DEV_RAM=y | ||
504 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
505 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
506 | # CONFIG_BLK_DEV_XIP is not set | ||
507 | # CONFIG_CDROM_PKTCDVD is not set | ||
508 | # CONFIG_ATA_OVER_ETH is not set | ||
509 | # CONFIG_BLK_DEV_HD is not set | ||
510 | CONFIG_MISC_DEVICES=y | ||
511 | # CONFIG_EEPROM_93CX6 is not set | ||
512 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
513 | CONFIG_HAVE_IDE=y | ||
514 | # CONFIG_IDE is not set | ||
515 | |||
516 | # | ||
517 | # SCSI device support | ||
518 | # | ||
519 | # CONFIG_RAID_ATTRS is not set | ||
520 | CONFIG_SCSI=y | ||
521 | CONFIG_SCSI_DMA=y | ||
522 | # CONFIG_SCSI_TGT is not set | ||
523 | # CONFIG_SCSI_NETLINK is not set | ||
524 | CONFIG_SCSI_PROC_FS=y | ||
525 | |||
526 | # | ||
527 | # SCSI support type (disk, tape, CD-ROM) | ||
528 | # | ||
529 | CONFIG_BLK_DEV_SD=y | ||
530 | # CONFIG_CHR_DEV_ST is not set | ||
531 | # CONFIG_CHR_DEV_OSST is not set | ||
532 | # CONFIG_BLK_DEV_SR is not set | ||
533 | # CONFIG_CHR_DEV_SG is not set | ||
534 | # CONFIG_CHR_DEV_SCH is not set | ||
535 | |||
536 | # | ||
537 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
538 | # | ||
539 | # CONFIG_SCSI_MULTI_LUN is not set | ||
540 | # CONFIG_SCSI_CONSTANTS is not set | ||
541 | # CONFIG_SCSI_LOGGING is not set | ||
542 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
543 | CONFIG_SCSI_WAIT_SCAN=m | ||
544 | |||
545 | # | ||
546 | # SCSI Transports | ||
547 | # | ||
548 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
549 | # CONFIG_SCSI_FC_ATTRS is not set | ||
550 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
551 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
552 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
553 | CONFIG_SCSI_LOWLEVEL=y | ||
554 | # CONFIG_ISCSI_TCP is not set | ||
555 | # CONFIG_SCSI_DEBUG is not set | ||
556 | # CONFIG_SCSI_DH is not set | ||
557 | CONFIG_ATA=y | ||
558 | # CONFIG_ATA_NONSTANDARD is not set | ||
559 | CONFIG_SATA_PMP=y | ||
560 | CONFIG_ATA_SFF=y | ||
561 | # CONFIG_SATA_MV is not set | ||
562 | CONFIG_PATA_PLATFORM=y | ||
563 | # CONFIG_MD is not set | ||
564 | CONFIG_NETDEVICES=y | ||
565 | # CONFIG_DUMMY is not set | ||
566 | # CONFIG_BONDING is not set | ||
567 | # CONFIG_MACVLAN is not set | ||
568 | # CONFIG_EQUALIZER is not set | ||
569 | # CONFIG_TUN is not set | ||
570 | # CONFIG_VETH is not set | ||
571 | # CONFIG_PHYLIB is not set | ||
572 | CONFIG_NET_ETHERNET=y | ||
573 | CONFIG_MII=y | ||
574 | # CONFIG_AX88796 is not set | ||
575 | # CONFIG_STNIC is not set | ||
576 | # CONFIG_SMC91X is not set | ||
577 | # CONFIG_SMC911X is not set | ||
578 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
579 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
580 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
581 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
582 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
583 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
584 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
585 | # CONFIG_B44 is not set | ||
586 | # CONFIG_NETDEV_1000 is not set | ||
587 | # CONFIG_NETDEV_10000 is not set | ||
588 | |||
589 | # | ||
590 | # Wireless LAN | ||
591 | # | ||
592 | # CONFIG_WLAN_PRE80211 is not set | ||
593 | CONFIG_WLAN_80211=y | ||
594 | CONFIG_LIBERTAS=m | ||
595 | # CONFIG_LIBERTAS_USB is not set | ||
596 | CONFIG_LIBERTAS_SDIO=m | ||
597 | CONFIG_LIBERTAS_DEBUG=y | ||
598 | # CONFIG_LIBERTAS_THINFIRM is not set | ||
599 | # CONFIG_USB_ZD1201 is not set | ||
600 | # CONFIG_USB_NET_RNDIS_WLAN is not set | ||
601 | # CONFIG_RTL8187 is not set | ||
602 | # CONFIG_MAC80211_HWSIM is not set | ||
603 | # CONFIG_P54_COMMON is not set | ||
604 | # CONFIG_IWLWIFI_LEDS is not set | ||
605 | # CONFIG_HOSTAP is not set | ||
606 | # CONFIG_B43 is not set | ||
607 | # CONFIG_B43LEGACY is not set | ||
608 | # CONFIG_ZD1211RW is not set | ||
609 | # CONFIG_RT2X00 is not set | ||
610 | |||
611 | # | ||
612 | # USB Network Adapters | ||
613 | # | ||
614 | # CONFIG_USB_CATC is not set | ||
615 | # CONFIG_USB_KAWETH is not set | ||
616 | # CONFIG_USB_PEGASUS is not set | ||
617 | # CONFIG_USB_RTL8150 is not set | ||
618 | CONFIG_USB_USBNET=y | ||
619 | CONFIG_USB_NET_AX8817X=y | ||
620 | CONFIG_USB_NET_CDCETHER=y | ||
621 | # CONFIG_USB_NET_DM9601 is not set | ||
622 | # CONFIG_USB_NET_SMSC95XX is not set | ||
623 | # CONFIG_USB_NET_GL620A is not set | ||
624 | # CONFIG_USB_NET_NET1080 is not set | ||
625 | # CONFIG_USB_NET_PLUSB is not set | ||
626 | # CONFIG_USB_NET_MCS7830 is not set | ||
627 | # CONFIG_USB_NET_RNDIS_HOST is not set | ||
628 | # CONFIG_USB_NET_CDC_SUBSET is not set | ||
629 | # CONFIG_USB_NET_ZAURUS is not set | ||
630 | # CONFIG_WAN is not set | ||
631 | # CONFIG_PPP is not set | ||
632 | # CONFIG_SLIP is not set | ||
633 | # CONFIG_NETCONSOLE is not set | ||
634 | # CONFIG_NETPOLL is not set | ||
635 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
636 | # CONFIG_ISDN is not set | ||
637 | # CONFIG_PHONE is not set | ||
638 | |||
639 | # | ||
640 | # Input device support | ||
641 | # | ||
642 | CONFIG_INPUT=y | ||
643 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
644 | # CONFIG_INPUT_POLLDEV is not set | ||
645 | |||
646 | # | ||
647 | # Userland interfaces | ||
648 | # | ||
649 | # CONFIG_INPUT_MOUSEDEV is not set | ||
650 | # CONFIG_INPUT_JOYDEV is not set | ||
651 | # CONFIG_INPUT_EVDEV is not set | ||
652 | # CONFIG_INPUT_EVBUG is not set | ||
653 | |||
654 | # | ||
655 | # Input Device Drivers | ||
656 | # | ||
657 | # CONFIG_INPUT_KEYBOARD is not set | ||
658 | # CONFIG_INPUT_MOUSE is not set | ||
659 | # CONFIG_INPUT_JOYSTICK is not set | ||
660 | # CONFIG_INPUT_TABLET is not set | ||
661 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
662 | # CONFIG_INPUT_MISC is not set | ||
663 | |||
664 | # | ||
665 | # Hardware I/O ports | ||
666 | # | ||
667 | # CONFIG_SERIO is not set | ||
668 | # CONFIG_GAMEPORT is not set | ||
669 | |||
670 | # | ||
671 | # Character devices | ||
672 | # | ||
673 | # CONFIG_VT is not set | ||
674 | CONFIG_DEVKMEM=y | ||
675 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
676 | |||
677 | # | ||
678 | # Serial drivers | ||
679 | # | ||
680 | # CONFIG_SERIAL_8250 is not set | ||
681 | |||
682 | # | ||
683 | # Non-8250 serial port support | ||
684 | # | ||
685 | CONFIG_SERIAL_SH_SCI=y | ||
686 | CONFIG_SERIAL_SH_SCI_NR_UARTS=1 | ||
687 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | ||
688 | CONFIG_SERIAL_CORE=y | ||
689 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
690 | # CONFIG_UNIX98_PTYS is not set | ||
691 | # CONFIG_LEGACY_PTYS is not set | ||
692 | # CONFIG_IPMI_HANDLER is not set | ||
693 | # CONFIG_HW_RANDOM is not set | ||
694 | # CONFIG_R3964 is not set | ||
695 | # CONFIG_RAW_DRIVER is not set | ||
696 | # CONFIG_TCG_TPM is not set | ||
697 | # CONFIG_I2C is not set | ||
698 | # CONFIG_SPI is not set | ||
699 | # CONFIG_W1 is not set | ||
700 | # CONFIG_POWER_SUPPLY is not set | ||
701 | CONFIG_HWMON=y | ||
702 | # CONFIG_HWMON_VID is not set | ||
703 | # CONFIG_SENSORS_F71805F is not set | ||
704 | # CONFIG_SENSORS_F71882FG is not set | ||
705 | # CONFIG_SENSORS_IT87 is not set | ||
706 | # CONFIG_SENSORS_PC87360 is not set | ||
707 | # CONFIG_SENSORS_PC87427 is not set | ||
708 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
709 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
710 | # CONFIG_SENSORS_VT1211 is not set | ||
711 | # CONFIG_SENSORS_W83627HF is not set | ||
712 | # CONFIG_SENSORS_W83627EHF is not set | ||
713 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
714 | # CONFIG_THERMAL is not set | ||
715 | # CONFIG_THERMAL_HWMON is not set | ||
716 | # CONFIG_WATCHDOG is not set | ||
717 | |||
718 | # | ||
719 | # Sonics Silicon Backplane | ||
720 | # | ||
721 | CONFIG_SSB_POSSIBLE=y | ||
722 | # CONFIG_SSB is not set | ||
723 | |||
724 | # | ||
725 | # Multifunction device drivers | ||
726 | # | ||
727 | # CONFIG_MFD_CORE is not set | ||
728 | # CONFIG_MFD_SM501 is not set | ||
729 | # CONFIG_HTC_PASIC3 is not set | ||
730 | # CONFIG_MFD_TMIO is not set | ||
731 | |||
732 | # | ||
733 | # Multimedia devices | ||
734 | # | ||
735 | |||
736 | # | ||
737 | # Multimedia core support | ||
738 | # | ||
739 | # CONFIG_VIDEO_DEV is not set | ||
740 | # CONFIG_DVB_CORE is not set | ||
741 | # CONFIG_VIDEO_MEDIA is not set | ||
742 | |||
743 | # | ||
744 | # Multimedia drivers | ||
745 | # | ||
746 | # CONFIG_DAB is not set | ||
747 | |||
748 | # | ||
749 | # Graphics support | ||
750 | # | ||
751 | # CONFIG_VGASTATE is not set | ||
752 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
753 | # CONFIG_FB is not set | ||
754 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
755 | |||
756 | # | ||
757 | # Display device support | ||
758 | # | ||
759 | # CONFIG_DISPLAY_SUPPORT is not set | ||
760 | # CONFIG_SOUND is not set | ||
761 | # CONFIG_HID_SUPPORT is not set | ||
762 | CONFIG_USB_SUPPORT=y | ||
763 | CONFIG_USB_ARCH_HAS_HCD=y | ||
764 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
765 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
766 | CONFIG_USB=y | ||
767 | # CONFIG_USB_DEBUG is not set | ||
768 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
769 | |||
770 | # | ||
771 | # Miscellaneous USB options | ||
772 | # | ||
773 | # CONFIG_USB_DEVICEFS is not set | ||
774 | CONFIG_USB_DEVICE_CLASS=y | ||
775 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
776 | # CONFIG_USB_OTG is not set | ||
777 | # CONFIG_USB_OTG_WHITELIST is not set | ||
778 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
779 | CONFIG_USB_MON=y | ||
780 | # CONFIG_USB_WUSB is not set | ||
781 | # CONFIG_USB_WUSB_CBAF is not set | ||
782 | |||
783 | # | ||
784 | # USB Host Controller Drivers | ||
785 | # | ||
786 | # CONFIG_USB_C67X00_HCD is not set | ||
787 | # CONFIG_USB_ISP116X_HCD is not set | ||
788 | # CONFIG_USB_ISP1760_HCD is not set | ||
789 | # CONFIG_USB_SL811_HCD is not set | ||
790 | CONFIG_USB_R8A66597_HCD=y | ||
791 | # CONFIG_SUPERH_ON_CHIP_R8A66597 is not set | ||
792 | # CONFIG_USB_HWA_HCD is not set | ||
793 | |||
794 | # | ||
795 | # USB Device Class drivers | ||
796 | # | ||
797 | # CONFIG_USB_ACM is not set | ||
798 | # CONFIG_USB_PRINTER is not set | ||
799 | # CONFIG_USB_WDM is not set | ||
800 | # CONFIG_USB_TMC is not set | ||
801 | |||
802 | # | ||
803 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
804 | # | ||
805 | |||
806 | # | ||
807 | # may also be needed; see USB_STORAGE Help for more information | ||
808 | # | ||
809 | CONFIG_USB_STORAGE=y | ||
810 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
811 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
812 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
813 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
814 | # CONFIG_USB_STORAGE_DPCM is not set | ||
815 | # CONFIG_USB_STORAGE_USBAT is not set | ||
816 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
817 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
818 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
819 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
820 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
821 | # CONFIG_USB_STORAGE_KARMA is not set | ||
822 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
823 | # CONFIG_USB_LIBUSUAL is not set | ||
824 | |||
825 | # | ||
826 | # USB Imaging devices | ||
827 | # | ||
828 | # CONFIG_USB_MDC800 is not set | ||
829 | # CONFIG_USB_MICROTEK is not set | ||
830 | |||
831 | # | ||
832 | # USB port drivers | ||
833 | # | ||
834 | # CONFIG_USB_SERIAL is not set | ||
835 | |||
836 | # | ||
837 | # USB Miscellaneous drivers | ||
838 | # | ||
839 | # CONFIG_USB_EMI62 is not set | ||
840 | # CONFIG_USB_EMI26 is not set | ||
841 | # CONFIG_USB_ADUTUX is not set | ||
842 | # CONFIG_USB_SEVSEG is not set | ||
843 | # CONFIG_USB_RIO500 is not set | ||
844 | # CONFIG_USB_LEGOTOWER is not set | ||
845 | # CONFIG_USB_LCD is not set | ||
846 | # CONFIG_USB_BERRY_CHARGE is not set | ||
847 | # CONFIG_USB_LED is not set | ||
848 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
849 | # CONFIG_USB_CYTHERM is not set | ||
850 | # CONFIG_USB_PHIDGET is not set | ||
851 | # CONFIG_USB_IDMOUSE is not set | ||
852 | # CONFIG_USB_FTDI_ELAN is not set | ||
853 | # CONFIG_USB_APPLEDISPLAY is not set | ||
854 | # CONFIG_USB_LD is not set | ||
855 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
856 | # CONFIG_USB_IOWARRIOR is not set | ||
857 | # CONFIG_USB_ISIGHTFW is not set | ||
858 | # CONFIG_USB_VST is not set | ||
859 | # CONFIG_USB_GADGET is not set | ||
860 | CONFIG_MMC=y | ||
861 | # CONFIG_MMC_DEBUG is not set | ||
862 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
863 | |||
864 | # | ||
865 | # MMC/SD/SDIO Card Drivers | ||
866 | # | ||
867 | CONFIG_MMC_BLOCK=y | ||
868 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
869 | # CONFIG_SDIO_UART is not set | ||
870 | # CONFIG_MMC_TEST is not set | ||
871 | |||
872 | # | ||
873 | # MMC/SD/SDIO Host Controller Drivers | ||
874 | # | ||
875 | # CONFIG_MMC_SDHCI is not set | ||
876 | # CONFIG_MEMSTICK is not set | ||
877 | # CONFIG_NEW_LEDS is not set | ||
878 | # CONFIG_ACCESSIBILITY is not set | ||
879 | # CONFIG_RTC_CLASS is not set | ||
880 | # CONFIG_DMADEVICES is not set | ||
881 | # CONFIG_UIO is not set | ||
882 | # CONFIG_STAGING is not set | ||
883 | |||
884 | # | ||
885 | # File systems | ||
886 | # | ||
887 | CONFIG_EXT2_FS=y | ||
888 | # CONFIG_EXT2_FS_XATTR is not set | ||
889 | # CONFIG_EXT2_FS_XIP is not set | ||
890 | CONFIG_EXT3_FS=y | ||
891 | CONFIG_EXT3_FS_XATTR=y | ||
892 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
893 | # CONFIG_EXT3_FS_SECURITY is not set | ||
894 | # CONFIG_EXT4_FS is not set | ||
895 | CONFIG_JBD=y | ||
896 | CONFIG_FS_MBCACHE=y | ||
897 | # CONFIG_REISERFS_FS is not set | ||
898 | # CONFIG_JFS_FS is not set | ||
899 | # CONFIG_FS_POSIX_ACL is not set | ||
900 | CONFIG_FILE_LOCKING=y | ||
901 | # CONFIG_XFS_FS is not set | ||
902 | # CONFIG_OCFS2_FS is not set | ||
903 | CONFIG_DNOTIFY=y | ||
904 | CONFIG_INOTIFY=y | ||
905 | CONFIG_INOTIFY_USER=y | ||
906 | # CONFIG_QUOTA is not set | ||
907 | # CONFIG_AUTOFS_FS is not set | ||
908 | # CONFIG_AUTOFS4_FS is not set | ||
909 | # CONFIG_FUSE_FS is not set | ||
910 | |||
911 | # | ||
912 | # CD-ROM/DVD Filesystems | ||
913 | # | ||
914 | # CONFIG_ISO9660_FS is not set | ||
915 | # CONFIG_UDF_FS is not set | ||
916 | |||
917 | # | ||
918 | # DOS/FAT/NT Filesystems | ||
919 | # | ||
920 | CONFIG_FAT_FS=y | ||
921 | # CONFIG_MSDOS_FS is not set | ||
922 | CONFIG_VFAT_FS=y | ||
923 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
924 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
925 | # CONFIG_NTFS_FS is not set | ||
926 | |||
927 | # | ||
928 | # Pseudo filesystems | ||
929 | # | ||
930 | CONFIG_PROC_FS=y | ||
931 | CONFIG_PROC_KCORE=y | ||
932 | CONFIG_PROC_SYSCTL=y | ||
933 | CONFIG_PROC_PAGE_MONITOR=y | ||
934 | CONFIG_SYSFS=y | ||
935 | CONFIG_TMPFS=y | ||
936 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
937 | CONFIG_HUGETLBFS=y | ||
938 | CONFIG_HUGETLB_PAGE=y | ||
939 | # CONFIG_CONFIGFS_FS is not set | ||
940 | |||
941 | # | ||
942 | # Miscellaneous filesystems | ||
943 | # | ||
944 | # CONFIG_ADFS_FS is not set | ||
945 | # CONFIG_AFFS_FS is not set | ||
946 | # CONFIG_HFS_FS is not set | ||
947 | # CONFIG_HFSPLUS_FS is not set | ||
948 | # CONFIG_BEFS_FS is not set | ||
949 | # CONFIG_BFS_FS is not set | ||
950 | # CONFIG_EFS_FS is not set | ||
951 | # CONFIG_JFFS2_FS is not set | ||
952 | CONFIG_CRAMFS=y | ||
953 | # CONFIG_VXFS_FS is not set | ||
954 | # CONFIG_MINIX_FS is not set | ||
955 | # CONFIG_OMFS_FS is not set | ||
956 | # CONFIG_HPFS_FS is not set | ||
957 | # CONFIG_QNX4FS_FS is not set | ||
958 | # CONFIG_ROMFS_FS is not set | ||
959 | # CONFIG_SYSV_FS is not set | ||
960 | # CONFIG_UFS_FS is not set | ||
961 | CONFIG_NETWORK_FILESYSTEMS=y | ||
962 | CONFIG_NFS_FS=y | ||
963 | # CONFIG_NFS_V3 is not set | ||
964 | # CONFIG_NFS_V4 is not set | ||
965 | CONFIG_ROOT_NFS=y | ||
966 | CONFIG_NFSD=y | ||
967 | # CONFIG_NFSD_V3 is not set | ||
968 | # CONFIG_NFSD_V4 is not set | ||
969 | CONFIG_LOCKD=y | ||
970 | CONFIG_EXPORTFS=y | ||
971 | CONFIG_NFS_COMMON=y | ||
972 | CONFIG_SUNRPC=y | ||
973 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
974 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
975 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
976 | # CONFIG_SMB_FS is not set | ||
977 | # CONFIG_CIFS is not set | ||
978 | # CONFIG_NCP_FS is not set | ||
979 | # CONFIG_CODA_FS is not set | ||
980 | # CONFIG_AFS_FS is not set | ||
981 | |||
982 | # | ||
983 | # Partition Types | ||
984 | # | ||
985 | # CONFIG_PARTITION_ADVANCED is not set | ||
986 | CONFIG_MSDOS_PARTITION=y | ||
987 | CONFIG_NLS=y | ||
988 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
989 | CONFIG_NLS_CODEPAGE_437=y | ||
990 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
991 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
992 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
993 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
994 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
995 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
996 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
997 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
998 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
999 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1000 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1001 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1002 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1003 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1004 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1005 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1006 | CONFIG_NLS_CODEPAGE_932=y | ||
1007 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1008 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1009 | # CONFIG_NLS_ISO8859_8 is not set | ||
1010 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1011 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1012 | # CONFIG_NLS_ASCII is not set | ||
1013 | CONFIG_NLS_ISO8859_1=y | ||
1014 | # CONFIG_NLS_ISO8859_2 is not set | ||
1015 | # CONFIG_NLS_ISO8859_3 is not set | ||
1016 | # CONFIG_NLS_ISO8859_4 is not set | ||
1017 | # CONFIG_NLS_ISO8859_5 is not set | ||
1018 | # CONFIG_NLS_ISO8859_6 is not set | ||
1019 | # CONFIG_NLS_ISO8859_7 is not set | ||
1020 | # CONFIG_NLS_ISO8859_9 is not set | ||
1021 | # CONFIG_NLS_ISO8859_13 is not set | ||
1022 | # CONFIG_NLS_ISO8859_14 is not set | ||
1023 | # CONFIG_NLS_ISO8859_15 is not set | ||
1024 | # CONFIG_NLS_KOI8_R is not set | ||
1025 | # CONFIG_NLS_KOI8_U is not set | ||
1026 | # CONFIG_NLS_UTF8 is not set | ||
1027 | # CONFIG_DLM is not set | ||
1028 | |||
1029 | # | ||
1030 | # Kernel hacking | ||
1031 | # | ||
1032 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
1033 | # CONFIG_PRINTK_TIME is not set | ||
1034 | # CONFIG_ENABLE_WARN_DEPRECATED is not set | ||
1035 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
1036 | CONFIG_FRAME_WARN=1024 | ||
1037 | # CONFIG_MAGIC_SYSRQ is not set | ||
1038 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1039 | # CONFIG_DEBUG_FS is not set | ||
1040 | # CONFIG_HEADERS_CHECK is not set | ||
1041 | # CONFIG_DEBUG_KERNEL is not set | ||
1042 | # CONFIG_SLUB_DEBUG_ON is not set | ||
1043 | # CONFIG_SLUB_STATS is not set | ||
1044 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1045 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
1046 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1047 | # CONFIG_LATENCYTOP is not set | ||
1048 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
1049 | CONFIG_NOP_TRACER=y | ||
1050 | CONFIG_HAVE_FTRACE=y | ||
1051 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
1052 | # CONFIG_SAMPLES is not set | ||
1053 | # CONFIG_SH_STANDARD_BIOS is not set | ||
1054 | # CONFIG_EARLY_SCIF_CONSOLE is not set | ||
1055 | # CONFIG_SH_KGDB is not set | ||
1056 | |||
1057 | # | ||
1058 | # Security options | ||
1059 | # | ||
1060 | # CONFIG_KEYS is not set | ||
1061 | # CONFIG_SECURITY is not set | ||
1062 | # CONFIG_SECURITYFS is not set | ||
1063 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1064 | CONFIG_CRYPTO=y | ||
1065 | |||
1066 | # | ||
1067 | # Crypto core or helper | ||
1068 | # | ||
1069 | # CONFIG_CRYPTO_FIPS is not set | ||
1070 | CONFIG_CRYPTO_ALGAPI=y | ||
1071 | CONFIG_CRYPTO_AEAD=y | ||
1072 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1073 | CONFIG_CRYPTO_HASH=y | ||
1074 | CONFIG_CRYPTO_RNG=y | ||
1075 | CONFIG_CRYPTO_MANAGER=y | ||
1076 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1077 | # CONFIG_CRYPTO_NULL is not set | ||
1078 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1079 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1080 | # CONFIG_CRYPTO_TEST is not set | ||
1081 | |||
1082 | # | ||
1083 | # Authenticated Encryption with Associated Data | ||
1084 | # | ||
1085 | # CONFIG_CRYPTO_CCM is not set | ||
1086 | # CONFIG_CRYPTO_GCM is not set | ||
1087 | # CONFIG_CRYPTO_SEQIV is not set | ||
1088 | |||
1089 | # | ||
1090 | # Block modes | ||
1091 | # | ||
1092 | # CONFIG_CRYPTO_CBC is not set | ||
1093 | # CONFIG_CRYPTO_CTR is not set | ||
1094 | # CONFIG_CRYPTO_CTS is not set | ||
1095 | CONFIG_CRYPTO_ECB=y | ||
1096 | # CONFIG_CRYPTO_LRW is not set | ||
1097 | # CONFIG_CRYPTO_PCBC is not set | ||
1098 | # CONFIG_CRYPTO_XTS is not set | ||
1099 | |||
1100 | # | ||
1101 | # Hash modes | ||
1102 | # | ||
1103 | # CONFIG_CRYPTO_HMAC is not set | ||
1104 | # CONFIG_CRYPTO_XCBC is not set | ||
1105 | |||
1106 | # | ||
1107 | # Digest | ||
1108 | # | ||
1109 | # CONFIG_CRYPTO_CRC32C is not set | ||
1110 | # CONFIG_CRYPTO_MD4 is not set | ||
1111 | # CONFIG_CRYPTO_MD5 is not set | ||
1112 | CONFIG_CRYPTO_MICHAEL_MIC=y | ||
1113 | # CONFIG_CRYPTO_RMD128 is not set | ||
1114 | # CONFIG_CRYPTO_RMD160 is not set | ||
1115 | # CONFIG_CRYPTO_RMD256 is not set | ||
1116 | # CONFIG_CRYPTO_RMD320 is not set | ||
1117 | # CONFIG_CRYPTO_SHA1 is not set | ||
1118 | # CONFIG_CRYPTO_SHA256 is not set | ||
1119 | # CONFIG_CRYPTO_SHA512 is not set | ||
1120 | # CONFIG_CRYPTO_TGR192 is not set | ||
1121 | # CONFIG_CRYPTO_WP512 is not set | ||
1122 | |||
1123 | # | ||
1124 | # Ciphers | ||
1125 | # | ||
1126 | CONFIG_CRYPTO_AES=y | ||
1127 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1128 | CONFIG_CRYPTO_ARC4=y | ||
1129 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1130 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1131 | # CONFIG_CRYPTO_CAST5 is not set | ||
1132 | # CONFIG_CRYPTO_CAST6 is not set | ||
1133 | # CONFIG_CRYPTO_DES is not set | ||
1134 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1135 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1136 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1137 | # CONFIG_CRYPTO_SEED is not set | ||
1138 | # CONFIG_CRYPTO_SERPENT is not set | ||
1139 | # CONFIG_CRYPTO_TEA is not set | ||
1140 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1141 | |||
1142 | # | ||
1143 | # Compression | ||
1144 | # | ||
1145 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1146 | # CONFIG_CRYPTO_LZO is not set | ||
1147 | |||
1148 | # | ||
1149 | # Random Number Generation | ||
1150 | # | ||
1151 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1152 | CONFIG_CRYPTO_HW=y | ||
1153 | |||
1154 | # | ||
1155 | # Library routines | ||
1156 | # | ||
1157 | CONFIG_BITREVERSE=y | ||
1158 | # CONFIG_CRC_CCITT is not set | ||
1159 | # CONFIG_CRC16 is not set | ||
1160 | # CONFIG_CRC_T10DIF is not set | ||
1161 | # CONFIG_CRC_ITU_T is not set | ||
1162 | CONFIG_CRC32=y | ||
1163 | # CONFIG_CRC7 is not set | ||
1164 | # CONFIG_LIBCRC32C is not set | ||
1165 | CONFIG_ZLIB_INFLATE=y | ||
1166 | CONFIG_PLIST=y | ||
1167 | CONFIG_HAS_IOMEM=y | ||
1168 | CONFIG_HAS_IOPORT=y | ||
1169 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/sh/include/asm/byteorder.h b/arch/sh/include/asm/byteorder.h index 4c13e6117563..f5fa0653ebc6 100644 --- a/arch/sh/include/asm/byteorder.h +++ b/arch/sh/include/asm/byteorder.h | |||
@@ -8,7 +8,15 @@ | |||
8 | #include <linux/compiler.h> | 8 | #include <linux/compiler.h> |
9 | #include <linux/types.h> | 9 | #include <linux/types.h> |
10 | 10 | ||
11 | static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) | 11 | #ifdef __LITTLE_ENDIAN__ |
12 | # define __LITTLE_ENDIAN | ||
13 | #else | ||
14 | # define __BIG_ENDIAN | ||
15 | #endif | ||
16 | |||
17 | #define __SWAB_64_THRU_32__ | ||
18 | |||
19 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) | ||
12 | { | 20 | { |
13 | __asm__( | 21 | __asm__( |
14 | #ifdef __SH5__ | 22 | #ifdef __SH5__ |
@@ -24,8 +32,9 @@ static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) | |||
24 | 32 | ||
25 | return x; | 33 | return x; |
26 | } | 34 | } |
35 | #define __arch_swab32 __arch_swab32 | ||
27 | 36 | ||
28 | static inline __attribute_const__ __u16 ___arch__swab16(__u16 x) | 37 | static inline __attribute_const__ __u16 __arch_swab16(__u16 x) |
29 | { | 38 | { |
30 | __asm__( | 39 | __asm__( |
31 | #ifdef __SH5__ | 40 | #ifdef __SH5__ |
@@ -39,32 +48,21 @@ static inline __attribute_const__ __u16 ___arch__swab16(__u16 x) | |||
39 | 48 | ||
40 | return x; | 49 | return x; |
41 | } | 50 | } |
51 | #define __arch_swab16 __arch_swab16 | ||
42 | 52 | ||
43 | static inline __u64 ___arch__swab64(__u64 val) | 53 | static inline __u64 __arch_swab64(__u64 val) |
44 | { | 54 | { |
45 | union { | 55 | union { |
46 | struct { __u32 a,b; } s; | 56 | struct { __u32 a,b; } s; |
47 | __u64 u; | 57 | __u64 u; |
48 | } v, w; | 58 | } v, w; |
49 | v.u = val; | 59 | v.u = val; |
50 | w.s.b = ___arch__swab32(v.s.a); | 60 | w.s.b = __arch_swab32(v.s.a); |
51 | w.s.a = ___arch__swab32(v.s.b); | 61 | w.s.a = __arch_swab32(v.s.b); |
52 | return w.u; | 62 | return w.u; |
53 | } | 63 | } |
64 | #define __arch_swab64 __arch_swab64 | ||
54 | 65 | ||
55 | #define __arch__swab64(x) ___arch__swab64(x) | 66 | #include <linux/byteorder.h> |
56 | #define __arch__swab32(x) ___arch__swab32(x) | ||
57 | #define __arch__swab16(x) ___arch__swab16(x) | ||
58 | |||
59 | #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) | ||
60 | # define __BYTEORDER_HAS_U64__ | ||
61 | # define __SWAB_64_THRU_32__ | ||
62 | #endif | ||
63 | |||
64 | #ifdef __LITTLE_ENDIAN__ | ||
65 | #include <linux/byteorder/little_endian.h> | ||
66 | #else | ||
67 | #include <linux/byteorder/big_endian.h> | ||
68 | #endif | ||
69 | 67 | ||
70 | #endif /* __ASM_SH_BYTEORDER_H */ | 68 | #endif /* __ASM_SH_BYTEORDER_H */ |
diff --git a/arch/sh/include/asm/hd64465/gpio.h b/arch/sh/include/asm/hd64465/gpio.h deleted file mode 100644 index a3cdca2713dd..000000000000 --- a/arch/sh/include/asm/hd64465/gpio.h +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | #ifndef _ASM_SH_HD64465_GPIO_ | ||
2 | #define _ASM_SH_HD64465_GPIO_ 1 | ||
3 | /* | ||
4 | * $Id: gpio.h,v 1.3 2003/05/04 19:30:14 lethal Exp $ | ||
5 | * | ||
6 | * Hitachi HD64465 companion chip: General Purpose IO pins support. | ||
7 | * This layer enables other device drivers to configure GPIO | ||
8 | * pins, get and set their values, and register an interrupt | ||
9 | * routine for when input pins change in hardware. | ||
10 | * | ||
11 | * by Greg Banks <gbanks@pocketpenguins.com> | ||
12 | * (c) 2000 PocketPenguins Inc. | ||
13 | */ | ||
14 | #include <asm/hd64465.h> | ||
15 | |||
16 | /* Macro to construct a portpin number (used in all | ||
17 | * subsequent functions) from a port letter and a pin | ||
18 | * number, e.g. HD64465_GPIO_PORTPIN('A', 5). | ||
19 | */ | ||
20 | #define HD64465_GPIO_PORTPIN(port,pin) (((port)-'A')<<3|(pin)) | ||
21 | |||
22 | /* Pin configuration constants for _configure() */ | ||
23 | #define HD64465_GPIO_FUNCTION2 0 /* use the pin's *other* function */ | ||
24 | #define HD64465_GPIO_OUT 1 /* output */ | ||
25 | #define HD64465_GPIO_IN_PULLUP 2 /* input, pull-up MOS on */ | ||
26 | #define HD64465_GPIO_IN 3 /* input */ | ||
27 | |||
28 | /* Configure a pin's direction */ | ||
29 | extern void hd64465_gpio_configure(int portpin, int direction); | ||
30 | |||
31 | /* Get, set value */ | ||
32 | extern void hd64465_gpio_set_pin(int portpin, unsigned int value); | ||
33 | extern unsigned int hd64465_gpio_get_pin(int portpin); | ||
34 | extern void hd64465_gpio_set_port(int port, unsigned int value); | ||
35 | extern unsigned int hd64465_gpio_get_port(int port); | ||
36 | |||
37 | /* mode constants for _register_irq() */ | ||
38 | #define HD64465_GPIO_FALLING 0 | ||
39 | #define HD64465_GPIO_RISING 1 | ||
40 | |||
41 | /* Interrupt on external value change */ | ||
42 | extern void hd64465_gpio_register_irq(int portpin, int mode, | ||
43 | void (*handler)(int portpin, void *dev), void *dev); | ||
44 | extern void hd64465_gpio_unregister_irq(int portpin); | ||
45 | |||
46 | #endif /* _ASM_SH_HD64465_GPIO_ */ | ||
diff --git a/arch/sh/include/asm/hd64465/hd64465.h b/arch/sh/include/asm/hd64465/hd64465.h deleted file mode 100644 index cfd0e803d2a2..000000000000 --- a/arch/sh/include/asm/hd64465/hd64465.h +++ /dev/null | |||
@@ -1,256 +0,0 @@ | |||
1 | #ifndef _ASM_SH_HD64465_ | ||
2 | #define _ASM_SH_HD64465_ 1 | ||
3 | /* | ||
4 | * $Id: hd64465.h,v 1.3 2003/05/04 19:30:15 lethal Exp $ | ||
5 | * | ||
6 | * Hitachi HD64465 companion chip support | ||
7 | * | ||
8 | * by Greg Banks <gbanks@pocketpenguins.com> | ||
9 | * (c) 2000 PocketPenguins Inc. | ||
10 | * | ||
11 | * Derived from <asm/hd64461.h> which bore the message: | ||
12 | * Copyright (C) 2000 YAEGASHI Takeshi | ||
13 | */ | ||
14 | #include <asm/io.h> | ||
15 | #include <asm/irq.h> | ||
16 | |||
17 | /* | ||
18 | * Note that registers are defined here as virtual port numbers, | ||
19 | * which have no meaning except to get translated by hd64465_isa_port2addr() | ||
20 | * to an address in the range 0xb0000000-0xb3ffffff. Note that | ||
21 | * this translation happens to consist of adding the lower 16 bits | ||
22 | * of the virtual port number to 0xb0000000. Note also that the manual | ||
23 | * shows addresses as absolute physical addresses starting at 0x10000000, | ||
24 | * so e.g. the NIRR register is listed as 0x15000 here, 0x10005000 in the | ||
25 | * manual, and accessed using address 0xb0005000 - Greg. | ||
26 | */ | ||
27 | |||
28 | /* System registers */ | ||
29 | #define HD64465_REG_SRR 0x1000c /* System Revision Register */ | ||
30 | #define HD64465_REG_SDID 0x10010 /* System Device ID Reg */ | ||
31 | #define HD64465_SDID 0x8122 /* 64465 device ID */ | ||
32 | |||
33 | /* Power Management registers */ | ||
34 | #define HD64465_REG_SMSCR 0x10000 /* System Module Standby Control Reg */ | ||
35 | #define HD64465_SMSCR_PS2ST 0x4000 /* PS/2 Standby */ | ||
36 | #define HD64465_SMSCR_ADCST 0x1000 /* ADC Standby */ | ||
37 | #define HD64465_SMSCR_UARTST 0x0800 /* UART Standby */ | ||
38 | #define HD64465_SMSCR_SCDIST 0x0200 /* Serial Codec Standby */ | ||
39 | #define HD64465_SMSCR_PPST 0x0100 /* Parallel Port Standby */ | ||
40 | #define HD64465_SMSCR_PC0ST 0x0040 /* PCMCIA0 Standby */ | ||
41 | #define HD64465_SMSCR_PC1ST 0x0020 /* PCMCIA1 Standby */ | ||
42 | #define HD64465_SMSCR_AFEST 0x0010 /* AFE Standby */ | ||
43 | #define HD64465_SMSCR_TM0ST 0x0008 /* Timer0 Standby */ | ||
44 | #define HD64465_SMSCR_TM1ST 0x0004 /* Timer1 Standby */ | ||
45 | #define HD64465_SMSCR_IRDAST 0x0002 /* IRDA Standby */ | ||
46 | #define HD64465_SMSCR_KBCST 0x0001 /* Keyboard Controller Standby */ | ||
47 | |||
48 | /* Interrupt Controller registers */ | ||
49 | #define HD64465_REG_NIRR 0x15000 /* Interrupt Request Register */ | ||
50 | #define HD64465_REG_NIMR 0x15002 /* Interrupt Mask Register */ | ||
51 | #define HD64465_REG_NITR 0x15004 /* Interrupt Trigger Mode Register */ | ||
52 | |||
53 | /* Timer registers */ | ||
54 | #define HD64465_REG_TCVR1 0x16000 /* Timer 1 constant value register */ | ||
55 | #define HD64465_REG_TCVR0 0x16002 /* Timer 0 constant value register */ | ||
56 | #define HD64465_REG_TRVR1 0x16004 /* Timer 1 read value register */ | ||
57 | #define HD64465_REG_TRVR0 0x16006 /* Timer 0 read value register */ | ||
58 | #define HD64465_REG_TCR1 0x16008 /* Timer 1 control register */ | ||
59 | #define HD64465_REG_TCR0 0x1600A /* Timer 0 control register */ | ||
60 | #define HD64465_TCR_EADT 0x10 /* Enable ADTRIG# signal */ | ||
61 | #define HD64465_TCR_ETMO 0x08 /* Enable TMO signal */ | ||
62 | #define HD64465_TCR_PST_MASK 0x06 /* Clock Prescale */ | ||
63 | #define HD64465_TCR_PST_1 0x06 /* 1:1 */ | ||
64 | #define HD64465_TCR_PST_4 0x04 /* 1:4 */ | ||
65 | #define HD64465_TCR_PST_8 0x02 /* 1:8 */ | ||
66 | #define HD64465_TCR_PST_16 0x00 /* 1:16 */ | ||
67 | #define HD64465_TCR_TSTP 0x01 /* Start/Stop timer */ | ||
68 | #define HD64465_REG_TIRR 0x1600C /* Timer interrupt request register */ | ||
69 | #define HD64465_REG_TIDR 0x1600E /* Timer interrupt disable register */ | ||
70 | #define HD64465_REG_PWM1CS 0x16010 /* PWM 1 clock scale register */ | ||
71 | #define HD64465_REG_PWM1LPC 0x16012 /* PWM 1 low pulse width counter register */ | ||
72 | #define HD64465_REG_PWM1HPC 0x16014 /* PWM 1 high pulse width counter register */ | ||
73 | #define HD64465_REG_PWM0CS 0x16018 /* PWM 0 clock scale register */ | ||
74 | #define HD64465_REG_PWM0LPC 0x1601A /* PWM 0 low pulse width counter register */ | ||
75 | #define HD64465_REG_PWM0HPC 0x1601C /* PWM 0 high pulse width counter register */ | ||
76 | |||
77 | /* Analog/Digital Converter registers */ | ||
78 | #define HD64465_REG_ADDRA 0x1E000 /* A/D data register A */ | ||
79 | #define HD64465_REG_ADDRB 0x1E002 /* A/D data register B */ | ||
80 | #define HD64465_REG_ADDRC 0x1E004 /* A/D data register C */ | ||
81 | #define HD64465_REG_ADDRD 0x1E006 /* A/D data register D */ | ||
82 | #define HD64465_REG_ADCSR 0x1E008 /* A/D control/status register */ | ||
83 | #define HD64465_ADCSR_ADF 0x80 /* A/D End Flag */ | ||
84 | #define HD64465_ADCSR_ADST 0x40 /* A/D Start Flag */ | ||
85 | #define HD64465_ADCSR_ADIS 0x20 /* A/D Interrupt Status */ | ||
86 | #define HD64465_ADCSR_TRGE 0x10 /* A/D Trigger Enable */ | ||
87 | #define HD64465_ADCSR_ADIE 0x08 /* A/D Interrupt Enable */ | ||
88 | #define HD64465_ADCSR_SCAN 0x04 /* A/D Scan Mode */ | ||
89 | #define HD64465_ADCSR_CH_MASK 0x03 /* A/D Channel */ | ||
90 | #define HD64465_REG_ADCALCR 0x1E00A /* A/D calibration sample control */ | ||
91 | #define HD64465_REG_ADCAL 0x1E00C /* A/D calibration data register */ | ||
92 | |||
93 | |||
94 | /* General Purpose I/O ports registers */ | ||
95 | #define HD64465_REG_GPACR 0x14000 /* Port A Control Register */ | ||
96 | #define HD64465_REG_GPBCR 0x14002 /* Port B Control Register */ | ||
97 | #define HD64465_REG_GPCCR 0x14004 /* Port C Control Register */ | ||
98 | #define HD64465_REG_GPDCR 0x14006 /* Port D Control Register */ | ||
99 | #define HD64465_REG_GPECR 0x14008 /* Port E Control Register */ | ||
100 | #define HD64465_REG_GPADR 0x14010 /* Port A Data Register */ | ||
101 | #define HD64465_REG_GPBDR 0x14012 /* Port B Data Register */ | ||
102 | #define HD64465_REG_GPCDR 0x14014 /* Port C Data Register */ | ||
103 | #define HD64465_REG_GPDDR 0x14016 /* Port D Data Register */ | ||
104 | #define HD64465_REG_GPEDR 0x14018 /* Port E Data Register */ | ||
105 | #define HD64465_REG_GPAICR 0x14020 /* Port A Interrupt Control Register */ | ||
106 | #define HD64465_REG_GPBICR 0x14022 /* Port B Interrupt Control Register */ | ||
107 | #define HD64465_REG_GPCICR 0x14024 /* Port C Interrupt Control Register */ | ||
108 | #define HD64465_REG_GPDICR 0x14026 /* Port D Interrupt Control Register */ | ||
109 | #define HD64465_REG_GPEICR 0x14028 /* Port E Interrupt Control Register */ | ||
110 | #define HD64465_REG_GPAISR 0x14040 /* Port A Interrupt Status Register */ | ||
111 | #define HD64465_REG_GPBISR 0x14042 /* Port B Interrupt Status Register */ | ||
112 | #define HD64465_REG_GPCISR 0x14044 /* Port C Interrupt Status Register */ | ||
113 | #define HD64465_REG_GPDISR 0x14046 /* Port D Interrupt Status Register */ | ||
114 | #define HD64465_REG_GPEISR 0x14048 /* Port E Interrupt Status Register */ | ||
115 | |||
116 | /* PCMCIA bridge interface */ | ||
117 | #define HD64465_REG_PCC0ISR 0x12000 /* socket 0 interface status */ | ||
118 | #define HD64465_PCCISR_PREADY 0x80 /* mem card ready / io card IREQ */ | ||
119 | #define HD64465_PCCISR_PIREQ 0x80 | ||
120 | #define HD64465_PCCISR_PMWP 0x40 /* mem card write-protected */ | ||
121 | #define HD64465_PCCISR_PVS2 0x20 /* voltage select pin 2 */ | ||
122 | #define HD64465_PCCISR_PVS1 0x10 /* voltage select pin 1 */ | ||
123 | #define HD64465_PCCISR_PCD_MASK 0x0c /* card detect */ | ||
124 | #define HD64465_PCCISR_PBVD_MASK 0x03 /* battery voltage */ | ||
125 | #define HD64465_PCCISR_PBVD_BATGOOD 0x03 /* battery good */ | ||
126 | #define HD64465_PCCISR_PBVD_BATWARN 0x01 /* battery low warning */ | ||
127 | #define HD64465_PCCISR_PBVD_BATDEAD1 0x02 /* battery dead */ | ||
128 | #define HD64465_PCCISR_PBVD_BATDEAD2 0x00 /* battery dead */ | ||
129 | #define HD64465_REG_PCC0GCR 0x12002 /* socket 0 general control */ | ||
130 | #define HD64465_PCCGCR_PDRV 0x80 /* output drive */ | ||
131 | #define HD64465_PCCGCR_PCCR 0x40 /* PC card reset */ | ||
132 | #define HD64465_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */ | ||
133 | #define HD64465_PCCGCR_PVCC0 0x10 /* voltage control pin VCC0SEL0 */ | ||
134 | #define HD64465_PCCGCR_PMMOD 0x08 /* memory mode */ | ||
135 | #define HD64465_PCCGCR_PPA25 0x04 /* pin A25 */ | ||
136 | #define HD64465_PCCGCR_PPA24 0x02 /* pin A24 */ | ||
137 | #define HD64465_PCCGCR_PREG 0x01 /* ping PCC0REG# */ | ||
138 | #define HD64465_REG_PCC0CSCR 0x12004 /* socket 0 card status change */ | ||
139 | #define HD64465_PCCCSCR_PSCDI 0x80 /* sw card detect intr */ | ||
140 | #define HD64465_PCCCSCR_PSWSEL 0x40 /* power select */ | ||
141 | #define HD64465_PCCCSCR_PIREQ 0x20 /* IREQ intr req */ | ||
142 | #define HD64465_PCCCSCR_PSC 0x10 /* STSCHG (status change) pin */ | ||
143 | #define HD64465_PCCCSCR_PCDC 0x08 /* CD (card detect) change */ | ||
144 | #define HD64465_PCCCSCR_PRC 0x04 /* ready change */ | ||
145 | #define HD64465_PCCCSCR_PBW 0x02 /* battery warning change */ | ||
146 | #define HD64465_PCCCSCR_PBD 0x01 /* battery dead change */ | ||
147 | #define HD64465_REG_PCC0CSCIER 0x12006 /* socket 0 card status change interrupt enable */ | ||
148 | #define HD64465_PCCCSCIER_PCRE 0x80 /* change reset enable */ | ||
149 | #define HD64465_PCCCSCIER_PIREQE_MASK 0x60 /* IREQ enable */ | ||
150 | #define HD64465_PCCCSCIER_PIREQE_DISABLED 0x00 /* IREQ disabled */ | ||
151 | #define HD64465_PCCCSCIER_PIREQE_LEVEL 0x20 /* IREQ level-triggered */ | ||
152 | #define HD64465_PCCCSCIER_PIREQE_FALLING 0x40 /* IREQ falling-edge-trig */ | ||
153 | #define HD64465_PCCCSCIER_PIREQE_RISING 0x60 /* IREQ rising-edge-trig */ | ||
154 | #define HD64465_PCCCSCIER_PSCE 0x10 /* status change enable */ | ||
155 | #define HD64465_PCCCSCIER_PCDE 0x08 /* card detect change enable */ | ||
156 | #define HD64465_PCCCSCIER_PRE 0x04 /* ready change enable */ | ||
157 | #define HD64465_PCCCSCIER_PBWE 0x02 /* battery warn change enable */ | ||
158 | #define HD64465_PCCCSCIER_PBDE 0x01 /* battery dead change enable*/ | ||
159 | #define HD64465_REG_PCC0SCR 0x12008 /* socket 0 software control */ | ||
160 | #define HD64465_PCCSCR_SHDN 0x10 /* TPS2206 SHutDowN pin */ | ||
161 | #define HD64465_PCCSCR_SWP 0x01 /* write protect */ | ||
162 | #define HD64465_REG_PCCPSR 0x1200A /* serial power switch control */ | ||
163 | #define HD64465_REG_PCC1ISR 0x12010 /* socket 1 interface status */ | ||
164 | #define HD64465_REG_PCC1GCR 0x12012 /* socket 1 general control */ | ||
165 | #define HD64465_REG_PCC1CSCR 0x12014 /* socket 1 card status change */ | ||
166 | #define HD64465_REG_PCC1CSCIER 0x12016 /* socket 1 card status change interrupt enable */ | ||
167 | #define HD64465_REG_PCC1SCR 0x12018 /* socket 1 software control */ | ||
168 | |||
169 | |||
170 | /* PS/2 Keyboard and mouse controller -- *not* register compatible */ | ||
171 | #define HD64465_REG_KBCSR 0x1dc00 /* Keyboard Control/Status reg */ | ||
172 | #define HD64465_KBCSR_KBCIE 0x8000 /* KBCK Input Enable */ | ||
173 | #define HD64465_KBCSR_KBCOE 0x4000 /* KBCK Output Enable */ | ||
174 | #define HD64465_KBCSR_KBDOE 0x2000 /* KB DATA Output Enable */ | ||
175 | #define HD64465_KBCSR_KBCD 0x1000 /* KBCK Driven */ | ||
176 | #define HD64465_KBCSR_KBDD 0x0800 /* KB DATA Driven */ | ||
177 | #define HD64465_KBCSR_KBCS 0x0400 /* KBCK pin Status */ | ||
178 | #define HD64465_KBCSR_KBDS 0x0200 /* KB DATA pin Status */ | ||
179 | #define HD64465_KBCSR_KBDP 0x0100 /* KB DATA Parity bit */ | ||
180 | #define HD64465_KBCSR_KBD_MASK 0x00ff /* KD DATA shift reg */ | ||
181 | #define HD64465_REG_KBISR 0x1dc04 /* Keyboard Interrupt Status reg */ | ||
182 | #define HD64465_KBISR_KBRDF 0x0001 /* KB Received Data Full */ | ||
183 | #define HD64465_REG_MSCSR 0x1dc10 /* Mouse Control/Status reg */ | ||
184 | #define HD64465_REG_MSISR 0x1dc14 /* Mouse Interrupt Status reg */ | ||
185 | |||
186 | |||
187 | /* | ||
188 | * Logical address at which the HD64465 is mapped. Note that this | ||
189 | * should always be in the P2 segment (uncached and untranslated). | ||
190 | */ | ||
191 | #ifndef CONFIG_HD64465_IOBASE | ||
192 | #define CONFIG_HD64465_IOBASE 0xb0000000 | ||
193 | #endif | ||
194 | /* | ||
195 | * The HD64465 multiplexes all its modules' interrupts onto | ||
196 | * this single interrupt. | ||
197 | */ | ||
198 | #ifndef CONFIG_HD64465_IRQ | ||
199 | #define CONFIG_HD64465_IRQ 5 | ||
200 | #endif | ||
201 | |||
202 | |||
203 | #define _HD64465_IO_MASK 0xf8000000 | ||
204 | #define is_hd64465_addr(addr) \ | ||
205 | ((addr & _HD64465_IO_MASK) == (CONFIG_HD64465_IOBASE & _HD64465_IO_MASK)) | ||
206 | |||
207 | /* | ||
208 | * A range of 16 virtual interrupts generated by | ||
209 | * demuxing the HD64465 muxed interrupt. | ||
210 | */ | ||
211 | #define HD64465_IRQ_BASE OFFCHIP_IRQ_BASE | ||
212 | #define HD64465_IRQ_NUM 16 | ||
213 | #define HD64465_IRQ_ADC (HD64465_IRQ_BASE+0) | ||
214 | #define HD64465_IRQ_USB (HD64465_IRQ_BASE+1) | ||
215 | #define HD64465_IRQ_SCDI (HD64465_IRQ_BASE+2) | ||
216 | #define HD64465_IRQ_PARALLEL (HD64465_IRQ_BASE+3) | ||
217 | /* bit 4 is reserved */ | ||
218 | #define HD64465_IRQ_UART (HD64465_IRQ_BASE+5) | ||
219 | #define HD64465_IRQ_IRDA (HD64465_IRQ_BASE+6) | ||
220 | #define HD64465_IRQ_PS2MOUSE (HD64465_IRQ_BASE+7) | ||
221 | #define HD64465_IRQ_KBC (HD64465_IRQ_BASE+8) | ||
222 | #define HD64465_IRQ_TIMER1 (HD64465_IRQ_BASE+9) | ||
223 | #define HD64465_IRQ_TIMER0 (HD64465_IRQ_BASE+10) | ||
224 | #define HD64465_IRQ_GPIO (HD64465_IRQ_BASE+11) | ||
225 | #define HD64465_IRQ_AFE (HD64465_IRQ_BASE+12) | ||
226 | #define HD64465_IRQ_PCMCIA1 (HD64465_IRQ_BASE+13) | ||
227 | #define HD64465_IRQ_PCMCIA0 (HD64465_IRQ_BASE+14) | ||
228 | #define HD64465_IRQ_PS2KBD (HD64465_IRQ_BASE+15) | ||
229 | |||
230 | /* Constants for PCMCIA mappings */ | ||
231 | #define HD64465_PCC_WINDOW 0x01000000 | ||
232 | |||
233 | #define HD64465_PCC0_BASE 0xb8000000 /* area 6 */ | ||
234 | #define HD64465_PCC0_ATTR (HD64465_PCC0_BASE) | ||
235 | #define HD64465_PCC0_COMM (HD64465_PCC0_BASE+HD64465_PCC_WINDOW) | ||
236 | #define HD64465_PCC0_IO (HD64465_PCC0_BASE+2*HD64465_PCC_WINDOW) | ||
237 | |||
238 | #define HD64465_PCC1_BASE 0xb4000000 /* area 5 */ | ||
239 | #define HD64465_PCC1_ATTR (HD64465_PCC1_BASE) | ||
240 | #define HD64465_PCC1_COMM (HD64465_PCC1_BASE+HD64465_PCC_WINDOW) | ||
241 | #define HD64465_PCC1_IO (HD64465_PCC1_BASE+2*HD64465_PCC_WINDOW) | ||
242 | |||
243 | /* | ||
244 | * Base of USB controller interface (as memory) | ||
245 | */ | ||
246 | #define HD64465_USB_BASE (CONFIG_HD64465_IOBASE+0xb000) | ||
247 | #define HD64465_USB_LEN 0x1000 | ||
248 | /* | ||
249 | * Base of embedded SRAM, used for USB controller. | ||
250 | */ | ||
251 | #define HD64465_SRAM_BASE (CONFIG_HD64465_IOBASE+0x9000) | ||
252 | #define HD64465_SRAM_LEN 0x1000 | ||
253 | |||
254 | |||
255 | |||
256 | #endif /* _ASM_SH_HD64465_ */ | ||
diff --git a/arch/sh/include/asm/hd64465/io.h b/arch/sh/include/asm/hd64465/io.h deleted file mode 100644 index 139f1472e5bb..000000000000 --- a/arch/sh/include/asm/hd64465/io.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/hd64465/io.h | ||
3 | * | ||
4 | * By Greg Banks <gbanks@pocketpenguins.com> | ||
5 | * (c) 2000 PocketPenguins Inc. | ||
6 | * | ||
7 | * Derived from io_hd64461.h, which bore the message: | ||
8 | * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) | ||
9 | * | ||
10 | * May be copied or modified under the terms of the GNU General Public | ||
11 | * License. See linux/COPYING for more information. | ||
12 | * | ||
13 | * IO functions for an HD64465 "Windows CE Intelligent Peripheral Controller". | ||
14 | */ | ||
15 | |||
16 | #ifndef _ASM_SH_IO_HD64465_H | ||
17 | #define _ASM_SH_IO_HD64465_H | ||
18 | |||
19 | extern unsigned char hd64465_inb(unsigned long port); | ||
20 | extern unsigned short hd64465_inw(unsigned long port); | ||
21 | extern unsigned int hd64465_inl(unsigned long port); | ||
22 | |||
23 | extern void hd64465_outb(unsigned char value, unsigned long port); | ||
24 | extern void hd64465_outw(unsigned short value, unsigned long port); | ||
25 | extern void hd64465_outl(unsigned int value, unsigned long port); | ||
26 | |||
27 | extern unsigned char hd64465_inb_p(unsigned long port); | ||
28 | extern void hd64465_outb_p(unsigned char value, unsigned long port); | ||
29 | |||
30 | extern unsigned long hd64465_isa_port2addr(unsigned long offset); | ||
31 | extern int hd64465_irq_demux(int irq); | ||
32 | /* Provision for generic secondary demux step -- used by PCMCIA code */ | ||
33 | extern void hd64465_register_irq_demux(int irq, | ||
34 | int (*demux)(int irq, void *dev), void *dev); | ||
35 | extern void hd64465_unregister_irq_demux(int irq); | ||
36 | /* Set this variable to 1 to see port traffic */ | ||
37 | extern int hd64465_io_debug; | ||
38 | /* Map a range of ports to a range of kernel virtual memory. | ||
39 | */ | ||
40 | extern void hd64465_port_map(unsigned short baseport, unsigned int nports, | ||
41 | unsigned long addr, unsigned char shift); | ||
42 | extern void hd64465_port_unmap(unsigned short baseport, unsigned int nports); | ||
43 | |||
44 | #endif /* _ASM_SH_IO_HD64465_H */ | ||
diff --git a/arch/sh/include/asm/serial.h b/arch/sh/include/asm/serial.h index e13cc948ee60..11f854dd1363 100644 --- a/arch/sh/include/asm/serial.h +++ b/arch/sh/include/asm/serial.h | |||
@@ -7,8 +7,6 @@ | |||
7 | #ifndef _ASM_SERIAL_H | 7 | #ifndef _ASM_SERIAL_H |
8 | #define _ASM_SERIAL_H | 8 | #define _ASM_SERIAL_H |
9 | 9 | ||
10 | #include <linux/kernel.h> | ||
11 | |||
12 | /* | 10 | /* |
13 | * This assumes you have a 1.8432 MHz clock for your UART. | 11 | * This assumes you have a 1.8432 MHz clock for your UART. |
14 | * | 12 | * |
@@ -18,19 +16,4 @@ | |||
18 | */ | 16 | */ |
19 | #define BASE_BAUD ( 1843200 / 16 ) | 17 | #define BASE_BAUD ( 1843200 / 16 ) |
20 | 18 | ||
21 | #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) | ||
22 | |||
23 | #ifdef CONFIG_HD64465 | ||
24 | #include <asm/hd64465/hd64465.h> | ||
25 | |||
26 | #define SERIAL_PORT_DFNS \ | ||
27 | /* UART CLK PORT IRQ FLAGS */ \ | ||
28 | { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */ | ||
29 | |||
30 | #else | ||
31 | |||
32 | #define SERIAL_PORT_DFNS | ||
33 | |||
34 | #endif | ||
35 | |||
36 | #endif /* _ASM_SERIAL_H */ | 19 | #endif /* _ASM_SERIAL_H */ |
diff --git a/arch/sh/include/cpu-sh4/cpu/rtc.h b/arch/sh/include/cpu-sh4/cpu/rtc.h index 25b1e6adfe8c..95e6fb76c24d 100644 --- a/arch/sh/include/cpu-sh4/cpu/rtc.h +++ b/arch/sh/include/cpu-sh4/cpu/rtc.h | |||
@@ -1,7 +1,7 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH4_RTC_H | 1 | #ifndef __ASM_SH_CPU_SH4_RTC_H |
2 | #define __ASM_SH_CPU_SH4_RTC_H | 2 | #define __ASM_SH_CPU_SH4_RTC_H |
3 | 3 | ||
4 | #ifdef CONFIG_CPU_SUBTYPE_SH7723 | 4 | #if defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7723) |
5 | #define rtc_reg_size sizeof(u16) | 5 | #define rtc_reg_size sizeof(u16) |
6 | #else | 6 | #else |
7 | #define rtc_reg_size sizeof(u32) | 7 | #define rtc_reg_size sizeof(u32) |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c index 6851dba02f31..e17db39b97aa 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c | |||
@@ -36,6 +36,32 @@ static struct platform_device iic_device = { | |||
36 | .resource = iic_resources, | 36 | .resource = iic_resources, |
37 | }; | 37 | }; |
38 | 38 | ||
39 | static struct resource usb_host_resources[] = { | ||
40 | [0] = { | ||
41 | .name = "r8a66597_hcd", | ||
42 | .start = 0xa4d80000, | ||
43 | .end = 0xa4d800ff, | ||
44 | .flags = IORESOURCE_MEM, | ||
45 | }, | ||
46 | [1] = { | ||
47 | .name = "r8a66597_hcd", | ||
48 | .start = 65, | ||
49 | .end = 65, | ||
50 | .flags = IORESOURCE_IRQ, | ||
51 | }, | ||
52 | }; | ||
53 | |||
54 | static struct platform_device usb_host_device = { | ||
55 | .name = "r8a66597_hcd", | ||
56 | .id = -1, | ||
57 | .dev = { | ||
58 | .dma_mask = NULL, | ||
59 | .coherent_dma_mask = 0xffffffff, | ||
60 | }, | ||
61 | .num_resources = ARRAY_SIZE(usb_host_resources), | ||
62 | .resource = usb_host_resources, | ||
63 | }; | ||
64 | |||
39 | static struct uio_info vpu_platform_data = { | 65 | static struct uio_info vpu_platform_data = { |
40 | .name = "VPU5", | 66 | .name = "VPU5", |
41 | .version = "0", | 67 | .version = "0", |
@@ -142,6 +168,7 @@ static struct platform_device sci_device = { | |||
142 | static struct platform_device *sh7366_devices[] __initdata = { | 168 | static struct platform_device *sh7366_devices[] __initdata = { |
143 | &iic_device, | 169 | &iic_device, |
144 | &sci_device, | 170 | &sci_device, |
171 | &usb_host_device, | ||
145 | &vpu_device, | 172 | &vpu_device, |
146 | &veu0_device, | 173 | &veu0_device, |
147 | &veu1_device, | 174 | &veu1_device, |
@@ -158,6 +185,7 @@ static int __init sh7366_devices_setup(void) | |||
158 | clk_always_enable("mstp022"); /* INTC */ | 185 | clk_always_enable("mstp022"); /* INTC */ |
159 | clk_always_enable("mstp020"); /* SuperHyway */ | 186 | clk_always_enable("mstp020"); /* SuperHyway */ |
160 | clk_always_enable("mstp109"); /* I2C */ | 187 | clk_always_enable("mstp109"); /* I2C */ |
188 | clk_always_enable("mstp211"); /* USB */ | ||
161 | clk_always_enable("mstp207"); /* VEU-2 */ | 189 | clk_always_enable("mstp207"); /* VEU-2 */ |
162 | clk_always_enable("mstp202"); /* VEU-1 */ | 190 | clk_always_enable("mstp202"); /* VEU-1 */ |
163 | clk_always_enable("mstp201"); /* VPU */ | 191 | clk_always_enable("mstp201"); /* VPU */ |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index de1ede92176e..ef77ee1d9f53 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * SH7722 Setup | 2 | * SH7722 Setup |
3 | * | 3 | * |
4 | * Copyright (C) 2006 - 2007 Paul Mundt | 4 | * Copyright (C) 2006 - 2008 Paul Mundt |
5 | * | 5 | * |
6 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
7 | * License. See the file "COPYING" in the main directory of this archive | 7 | * License. See the file "COPYING" in the main directory of this archive |
@@ -16,6 +16,36 @@ | |||
16 | #include <asm/clock.h> | 16 | #include <asm/clock.h> |
17 | #include <asm/mmzone.h> | 17 | #include <asm/mmzone.h> |
18 | 18 | ||
19 | static struct resource rtc_resources[] = { | ||
20 | [0] = { | ||
21 | .start = 0xa465fec0, | ||
22 | .end = 0xa465fec0 + 0x58 - 1, | ||
23 | .flags = IORESOURCE_IO, | ||
24 | }, | ||
25 | [1] = { | ||
26 | /* Period IRQ */ | ||
27 | .start = 45, | ||
28 | .flags = IORESOURCE_IRQ, | ||
29 | }, | ||
30 | [2] = { | ||
31 | /* Carry IRQ */ | ||
32 | .start = 46, | ||
33 | .flags = IORESOURCE_IRQ, | ||
34 | }, | ||
35 | [3] = { | ||
36 | /* Alarm IRQ */ | ||
37 | .start = 44, | ||
38 | .flags = IORESOURCE_IRQ, | ||
39 | }, | ||
40 | }; | ||
41 | |||
42 | static struct platform_device rtc_device = { | ||
43 | .name = "sh-rtc", | ||
44 | .id = -1, | ||
45 | .num_resources = ARRAY_SIZE(rtc_resources), | ||
46 | .resource = rtc_resources, | ||
47 | }; | ||
48 | |||
19 | static struct resource usbf_resources[] = { | 49 | static struct resource usbf_resources[] = { |
20 | [0] = { | 50 | [0] = { |
21 | .name = "m66592_udc", | 51 | .name = "m66592_udc", |
@@ -150,6 +180,7 @@ static struct platform_device sci_device = { | |||
150 | }; | 180 | }; |
151 | 181 | ||
152 | static struct platform_device *sh7722_devices[] __initdata = { | 182 | static struct platform_device *sh7722_devices[] __initdata = { |
183 | &rtc_device, | ||
153 | &usbf_device, | 184 | &usbf_device, |
154 | &iic_device, | 185 | &iic_device, |
155 | &sci_device, | 186 | &sci_device, |
@@ -202,7 +233,6 @@ enum { | |||
202 | IRDA, JPU, LCDC, | 233 | IRDA, JPU, LCDC, |
203 | 234 | ||
204 | /* interrupt groups */ | 235 | /* interrupt groups */ |
205 | |||
206 | SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI, | 236 | SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI, |
207 | }; | 237 | }; |
208 | 238 | ||
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S index 1a5cf9dd82de..5b7efc4016fa 100644 --- a/arch/sh/kernel/entry-common.S +++ b/arch/sh/kernel/entry-common.S | |||
@@ -372,7 +372,7 @@ syscall_exit: | |||
372 | 7: .long do_syscall_trace_enter | 372 | 7: .long do_syscall_trace_enter |
373 | 8: .long do_syscall_trace_leave | 373 | 8: .long do_syscall_trace_leave |
374 | 374 | ||
375 | #ifdef CONFIG_FTRACE | 375 | #ifdef CONFIG_FUNCTION_TRACER |
376 | .align 2 | 376 | .align 2 |
377 | .globl _mcount | 377 | .globl _mcount |
378 | .type _mcount,@function | 378 | .type _mcount,@function |
@@ -414,4 +414,4 @@ skip_trace: | |||
414 | ftrace_stub: | 414 | ftrace_stub: |
415 | rts | 415 | rts |
416 | nop | 416 | nop |
417 | #endif /* CONFIG_FTRACE */ | 417 | #endif /* CONFIG_FUNCTION_TRACER */ |
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c index d366a7443720..92ae5e6c099e 100644 --- a/arch/sh/kernel/sh_ksyms_32.c +++ b/arch/sh/kernel/sh_ksyms_32.c | |||
@@ -50,7 +50,10 @@ EXPORT_SYMBOL(__udelay); | |||
50 | EXPORT_SYMBOL(__ndelay); | 50 | EXPORT_SYMBOL(__ndelay); |
51 | EXPORT_SYMBOL(__const_udelay); | 51 | EXPORT_SYMBOL(__const_udelay); |
52 | 52 | ||
53 | #define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name) | 53 | #define DECLARE_EXPORT(name) \ |
54 | extern void name(void);EXPORT_SYMBOL(name) | ||
55 | #define MAYBE_DECLARE_EXPORT(name) \ | ||
56 | extern void name(void) __weak;EXPORT_SYMBOL(name) | ||
54 | 57 | ||
55 | /* These symbols are generated by the compiler itself */ | 58 | /* These symbols are generated by the compiler itself */ |
56 | DECLARE_EXPORT(__udivsi3); | 59 | DECLARE_EXPORT(__udivsi3); |
@@ -109,10 +112,8 @@ DECLARE_EXPORT(__movmemSI12_i4); | |||
109 | * compiler which include backported patches. | 112 | * compiler which include backported patches. |
110 | */ | 113 | */ |
111 | DECLARE_EXPORT(__udiv_qrnnd_16); | 114 | DECLARE_EXPORT(__udiv_qrnnd_16); |
112 | #if !defined(CONFIG_CPU_SH2) | 115 | MAYBE_DECLARE_EXPORT(__sdivsi3_i4i); |
113 | DECLARE_EXPORT(__sdivsi3_i4i); | 116 | MAYBE_DECLARE_EXPORT(__udivsi3_i4i); |
114 | DECLARE_EXPORT(__udivsi3_i4i); | ||
115 | #endif | ||
116 | #endif | 117 | #endif |
117 | #else /* GCC 3.x */ | 118 | #else /* GCC 3.x */ |
118 | DECLARE_EXPORT(__movstr_i4_even); | 119 | DECLARE_EXPORT(__movstr_i4_even); |
@@ -133,7 +134,7 @@ EXPORT_SYMBOL(flush_dcache_page); | |||
133 | EXPORT_SYMBOL(clear_user_page); | 134 | EXPORT_SYMBOL(clear_user_page); |
134 | #endif | 135 | #endif |
135 | 136 | ||
136 | #ifdef CONFIG_FTRACE | 137 | #ifdef CONFIG_FUNCTION_TRACER |
137 | EXPORT_SYMBOL(mcount); | 138 | EXPORT_SYMBOL(mcount); |
138 | #endif | 139 | #endif |
139 | EXPORT_SYMBOL(csum_partial); | 140 | EXPORT_SYMBOL(csum_partial); |
diff --git a/arch/sh/mm/cache-sh2a.c b/arch/sh/mm/cache-sh2a.c index 62c0c5f35120..24d86a794065 100644 --- a/arch/sh/mm/cache-sh2a.c +++ b/arch/sh/mm/cache-sh2a.c | |||
@@ -59,7 +59,7 @@ void __flush_purge_region(void *start, int size) | |||
59 | 59 | ||
60 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | 60 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { |
61 | ctrl_outl((v & CACHE_PHYSADDR_MASK), | 61 | ctrl_outl((v & CACHE_PHYSADDR_MASK), |
62 | CACHE_OC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008); | 62 | CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); |
63 | } | 63 | } |
64 | back_to_cached(); | 64 | back_to_cached(); |
65 | local_irq_restore(flags); | 65 | local_irq_restore(flags); |
@@ -82,14 +82,14 @@ void __flush_invalidate_region(void *start, int size) | |||
82 | /* I-cache invalidate */ | 82 | /* I-cache invalidate */ |
83 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | 83 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { |
84 | ctrl_outl((v & CACHE_PHYSADDR_MASK), | 84 | ctrl_outl((v & CACHE_PHYSADDR_MASK), |
85 | CACHE_IC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008); | 85 | CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); |
86 | } | 86 | } |
87 | #else | 87 | #else |
88 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | 88 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { |
89 | ctrl_outl((v & CACHE_PHYSADDR_MASK), | 89 | ctrl_outl((v & CACHE_PHYSADDR_MASK), |
90 | CACHE_IC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008); | 90 | CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); |
91 | ctrl_outl((v & CACHE_PHYSADDR_MASK), | 91 | ctrl_outl((v & CACHE_PHYSADDR_MASK), |
92 | CACHE_OC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008); | 92 | CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); |
93 | } | 93 | } |
94 | #endif | 94 | #endif |
95 | back_to_cached(); | 95 | back_to_cached(); |
diff --git a/arch/sh/oprofile/op_model_sh7750.c b/arch/sh/oprofile/op_model_sh7750.c index 6b9a98e07004..008b3b03750a 100644 --- a/arch/sh/oprofile/op_model_sh7750.c +++ b/arch/sh/oprofile/op_model_sh7750.c | |||
@@ -255,10 +255,9 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) | |||
255 | return -ENODEV; | 255 | return -ENODEV; |
256 | 256 | ||
257 | ops = &sh7750_perf_counter_ops; | 257 | ops = &sh7750_perf_counter_ops; |
258 | ops->cpu_type = (char *)get_cpu_subtype(¤t_cpu_data); | 258 | ops->cpu_type = "sh/sh7750"; |
259 | 259 | ||
260 | printk(KERN_INFO "oprofile: using SH-4 (%s) performance monitoring.\n", | 260 | printk(KERN_INFO "oprofile: using SH-4 performance monitoring.\n"); |
261 | sh7750_perf_counter_ops.cpu_type); | ||
262 | 261 | ||
263 | /* Clear the counters */ | 262 | /* Clear the counters */ |
264 | ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1); | 263 | ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1); |
@@ -270,4 +269,3 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) | |||
270 | void oprofile_arch_exit(void) | 269 | void oprofile_arch_exit(void) |
271 | { | 270 | { |
272 | } | 271 | } |
273 | |||
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types index d4fb11f7e2ee..d0c2928d1066 100644 --- a/arch/sh/tools/mach-types +++ b/arch/sh/tools/mach-types | |||
@@ -13,7 +13,6 @@ RTS7751R2D SH_RTS7751R2D | |||
13 | # List of companion chips / MFDs. | 13 | # List of companion chips / MFDs. |
14 | # | 14 | # |
15 | HD64461 HD64461 | 15 | HD64461 HD64461 |
16 | HD64465 HD64465 | ||
17 | 16 | ||
18 | # | 17 | # |
19 | # List of boards. | 18 | # List of boards. |