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-rw-r--r--arch/sh/drivers/pci/pci-sh7780.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index ae13ff925c61..323b92d565fe 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -15,8 +15,6 @@
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include "pci-sh4.h" 16#include "pci-sh4.h"
17 17
18extern u8 pci_cache_line_size;
19
20static struct resource sh7785_io_resource = { 18static struct resource sh7785_io_resource = {
21 .name = "SH7785_IO", 19 .name = "SH7785_IO",
22 .start = SH7780_PCI_IO_BASE, 20 .start = SH7780_PCI_IO_BASE,
@@ -37,6 +35,7 @@ static struct pci_channel sh7780_pci_controller = {
37 .mem_offset = 0x00000000, 35 .mem_offset = 0x00000000,
38 .io_resource = &sh7785_io_resource, 36 .io_resource = &sh7785_io_resource,
39 .io_offset = 0x00000000, 37 .io_offset = 0x00000000,
38 .io_map_base = SH7780_PCI_IO_BASE,
40}; 39};
41 40
42static struct sh4_pci_address_map sh7780_pci_map = { 41static struct sh4_pci_address_map sh7780_pci_map = {
@@ -99,8 +98,6 @@ static int __init sh7780_pci_init(void)
99 __raw_writeb(PCI_CLASS_BRIDGE_HOST & 0xff, 98 __raw_writeb(PCI_CLASS_BRIDGE_HOST & 0xff,
100 chan->reg_base + SH7780_PCISUB); 99 chan->reg_base + SH7780_PCISUB);
101 100
102 pci_cache_line_size = pci_read_reg(chan, SH7780_PCICLS) / 4;
103
104 /* 101 /*
105 * Set IO and Mem windows to local address 102 * Set IO and Mem windows to local address
106 * Make PCI and local address the same for easy 1 to 1 mapping 103 * Make PCI and local address the same for easy 1 to 1 mapping
@@ -142,8 +139,6 @@ static int __init sh7780_pci_init(void)
142 word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO; 139 word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO;
143 pci_write_reg(chan, word, SH4_PCICR); 140 pci_write_reg(chan, word, SH4_PCICR);
144 141
145 __set_io_port_base(SH7780_PCI_IO_BASE);
146
147 register_pci_controller(chan); 142 register_pci_controller(chan);
148 143
149 return 0; 144 return 0;