115 files changed, 698 insertions, 698 deletions

diff --git a/arch/sh/boards/board-magicpanelr2.c b/arch/sh/boards/board-magicpanelr2.c
index 99ffc5f1c0dd..efba450a0518 100644
--- a/arch/sh/boards/board-magicpanelr2.c
+++ b/arch/sh/boards/board-magicpanelr2.c
@@ -23,7 +23,7 @@
 #include <asm/heartbeat.h>
 #include <cpu/sh7720.h>
 
-#define LAN9115_READY   (ctrl_inl(0xA8000084UL) & 0x00000001UL)
+#define LAN9115_READY   (__raw_readl(0xA8000084UL) & 0x00000001UL)
 
 /* Prefer cmdline over RedBoot */
 static const char *probes[] = { "cmdlinepart", "RedBoot", NULL };
@@ -60,33 +60,33 @@ static void __init setup_chip_select(void)
 {
         /* CS2: LAN (0x08000000 - 0x0bffffff) */
         /* no idle cycles, normal space, 8 bit data bus */
-        ctrl_outl(0x36db0400, CS2BCR);
+        __raw_writel(0x36db0400, CS2BCR);
         /* (SW:1.5 WR:3 HW:1.5), ext. wait */
-        ctrl_outl(0x000003c0, CS2WCR);
+        __raw_writel(0x000003c0, CS2WCR);
 
         /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */
         /* no idle cycles, normal space, 8 bit data bus */
-        ctrl_outl(0x00000200, CS4BCR);
+        __raw_writel(0x00000200, CS4BCR);
         /* (SW:1.5 WR:3 HW:1.5), ext. wait */
-        ctrl_outl(0x00100981, CS4WCR);
+        __raw_writel(0x00100981, CS4WCR);
 
         /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */
         /* no idle cycles, normal space, 8 bit data bus */
-        ctrl_outl(0x00000200, CS5ABCR);
+        __raw_writel(0x00000200, CS5ABCR);
         /* (SW:1.5 WR:3 HW:1.5), ext. wait */
-        ctrl_outl(0x00100981, CS5AWCR);
+        __raw_writel(0x00100981, CS5AWCR);
 
         /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */
         /* no idle cycles, normal space, 8 bit data bus */
-        ctrl_outl(0x00000200, CS5BBCR);
+        __raw_writel(0x00000200, CS5BBCR);
         /* (SW:1.5 WR:3 HW:1.5), ext. wait */
-        ctrl_outl(0x00100981, CS5BWCR);
+        __raw_writel(0x00100981, CS5BWCR);
 
         /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */
         /* no idle cycles, normal space, 8 bit data bus */
-        ctrl_outl(0x00000200, CS6ABCR);
+        __raw_writel(0x00000200, CS6ABCR);
         /* (SW:1.5 WR:3 HW:1.5), no ext. wait */
-        ctrl_outl(0x001009C1, CS6AWCR);
+        __raw_writel(0x001009C1, CS6AWCR);
 }
 
 static void __init setup_port_multiplexing(void)
@@ -94,71 +94,71 @@ static void __init setup_port_multiplexing(void)
         /* A7 GPO(LED8);     A6 GPO(LED7);     A5 GPO(LED6);      A4 GPO(LED5);
          * A3 GPO(LED4);     A2 GPO(LED3);     A1 GPO(LED2);      A0 GPO(LED1);
          */
-        ctrl_outw(0x5555, PORT_PACR);   /* 01 01 01 01 01 01 01 01 */
+        __raw_writew(0x5555, PORT_PACR);        /* 01 01 01 01 01 01 01 01 */
 
         /* B7 GPO(RST4);   B6 GPO(RST3);  B5 GPO(RST2);    B4 GPO(RST1);
          * B3 GPO(PB3);    B2 GPO(PB2);   B1 GPO(PB1);     B0 GPO(PB0);
          */
-        ctrl_outw(0x5555, PORT_PBCR);   /* 01 01 01 01 01 01 01 01 */
+        __raw_writew(0x5555, PORT_PBCR);        /* 01 01 01 01 01 01 01 01 */
 
         /* C7 GPO(PC7);   C6 GPO(PC6);    C5 GPO(PC5);     C4 GPO(PC4);
          * C3 LCD_DATA3;  C2 LCD_DATA2;   C1 LCD_DATA1;    C0 LCD_DATA0;
          */
-        ctrl_outw(0x5500, PORT_PCCR);   /* 01 01 01 01 00 00 00 00 */
+        __raw_writew(0x5500, PORT_PCCR);        /* 01 01 01 01 00 00 00 00 */
 
         /* D7 GPO(PD7); D6 GPO(PD6);    D5 GPO(PD5);       D4 GPO(PD4);
          * D3 GPO(PD3); D2 GPO(PD2);    D1 GPO(PD1);       D0 GPO(PD0);
          */
-        ctrl_outw(0x5555, PORT_PDCR);   /* 01 01 01 01 01 01 01 01 */
+        __raw_writew(0x5555, PORT_PDCR);        /* 01 01 01 01 01 01 01 01 */
 
         /* E7 (x);        E6 GPI(nu);    E5 GPI(nu);      E4 LCD_M_DISP;
          * E3 LCD_CL1;    E2 LCD_CL2;    E1 LCD_DON;      E0 LCD_FLM;
          */
-        ctrl_outw(0x3C00, PORT_PECR);   /* 00 11 11 00 00 00 00 00 */
+        __raw_writew(0x3C00, PORT_PECR);        /* 00 11 11 00 00 00 00 00 */
 
         /* F7 (x);           F6 DA1(VLCD);     F5 DA0(nc);        F4 AN3;
          * F3 AN2(MID_AD);   F2 AN1(EARTH_AD); F1 AN0(TEMP);      F0 GPI+(nc);
          */
-        ctrl_outw(0x0002, PORT_PFCR);   /* 00 00 00 00 00 00 00 10 */
+        __raw_writew(0x0002, PORT_PFCR);        /* 00 00 00 00 00 00 00 10 */
 
         /* G7 (x);        G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2);
          * G3 GPI(KEY1);  G2 GPO(LED11);        G1 GPO(LED10);     G0 GPO(LED9);
          */
-        ctrl_outw(0x03D5, PORT_PGCR);   /* 00 00 00 11 11 01 01 01 */
+        __raw_writew(0x03D5, PORT_PGCR);        /* 00 00 00 11 11 01 01 01 */
 
         /* H7 (x);            H6 /RAS(BRAS);      H5 /CAS(BCAS); H4 CKE(BCKE);
          * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR;   H0 USB1_PWR;
          */
-        ctrl_outw(0x0050, PORT_PHCR);   /* 00 00 00 00 01 01 00 00 */
+        __raw_writew(0x0050, PORT_PHCR);        /* 00 00 00 00 01 01 00 00 */
 
         /* J7 (x);        J6 AUDCK;        J5 ASEBRKAK;     J4 AUDATA3;
          * J3 AUDATA2;    J2 AUDATA1;      J1 AUDATA0;      J0 AUDSYNC;
          */
-        ctrl_outw(0x0000, PORT_PJCR);   /* 00 00 00 00 00 00 00 00 */
+        __raw_writew(0x0000, PORT_PJCR);        /* 00 00 00 00 00 00 00 00 */
 
         /* K7 (x);          K6 (x);          K5 (x);       K4 (x);
          * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY)
          */
-        ctrl_outw(0x00FF, PORT_PKCR);   /* 00 00 00 00 11 11 11 11 */
+        __raw_writew(0x00FF, PORT_PKCR);        /* 00 00 00 00 11 11 11 11 */
 
         /* L7 TRST;        L6 TMS;           L5 TDO;              L4 TDI;
          * L3 TCK;         L2 (x);           L1 (x);              L0 (x);
          */
-        ctrl_outw(0x0000, PORT_PLCR);   /* 00 00 00 00 00 00 00 00 */
+        __raw_writew(0x0000, PORT_PLCR);        /* 00 00 00 00 00 00 00 00 */
 
         /* M7 GPO(CURRENT_SINK);    M6 GPO(PWR_SWITCH);     M5 GPO(LAN_SPEED);
          * M4 GPO(LAN_RESET);       M3 GPO(BUZZER);         M2 GPO(LCD_BL);
          * M1 CS5B(CAN3_CS);        M0 GPI+(nc);
          */
-        ctrl_outw(0x5552, PORT_PMCR);      /* 01 01 01 01 01 01 00 10 */
+        __raw_writew(0x5552, PORT_PMCR);           /* 01 01 01 01 01 01 00 10 */
 
         /* CURRENT_SINK=off,    PWR_SWITCH=off, LAN_SPEED=100MBit,
          * LAN_RESET=off,       BUZZER=off,     LCD_BL=off
          */
 #if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2
-        ctrl_outb(0x30, PORT_PMDR);
+        __raw_writeb(0x30, PORT_PMDR);
 #elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3
-        ctrl_outb(0xF0, PORT_PMDR);
+        __raw_writeb(0xF0, PORT_PMDR);
 #else
 #error Unknown revision of PLATFORM_MP_R2
 #endif
@@ -167,8 +167,8 @@ static void __init setup_port_multiplexing(void)
          * P4 GPO(nu);         P3 IRQ3(LAN_IRQ);  P2 IRQ2(CAN3_IRQ);
          * P1 IRQ1(CAN2_IRQ);  P0 IRQ0(CAN1_IRQ)
          */
-        ctrl_outw(0x0100, PORT_PPCR);   /* 00 00 00 01 00 00 00 00 */
-        ctrl_outb(0x10, PORT_PPDR);
+        __raw_writew(0x0100, PORT_PPCR);        /* 00 00 00 01 00 00 00 00 */
+        __raw_writeb(0x10, PORT_PPDR);
 
         /* R7 A25;           R6 A24;         R5 A23;              R4 A22;
          * R3 A21;           R2 A20;         R1 A19;              R0 A0;
@@ -185,22 +185,22 @@ static void __init setup_port_multiplexing(void)
         /* S7 (x);              S6 (x);        S5 (x);       S4 GPO(EEPROM_CS2);
          * S3 GPO(EEPROM_CS1);  S2 SIOF0_TXD;  S1 SIOF0_RXD; S0 SIOF0_SCK;
          */
-        ctrl_outw(0x0140, PORT_PSCR);   /* 00 00 00 01 01 00 00 00 */
+        __raw_writew(0x0140, PORT_PSCR);        /* 00 00 00 01 01 00 00 00 */
 
         /* T7 (x);         T6 (x);        T5 (x);         T4 COM1_CTS;
          * T3 COM1_RTS;    T2 COM1_TXD;   T1 COM1_RXD;    T0 GPO(WDOG)
          */
-        ctrl_outw(0x0001, PORT_PTCR);   /* 00 00 00 00 00 00 00 01 */
+        __raw_writew(0x0001, PORT_PTCR);        /* 00 00 00 00 00 00 00 01 */
 
         /* U7 (x);           U6 (x);       U5 (x);        U4 GPI+(/AC_FAULT);
          * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD;  U0 TOUCH_SCK;
          */
-        ctrl_outw(0x0240, PORT_PUCR);   /* 00 00 00 10 01 00 00 00 */
+        __raw_writew(0x0240, PORT_PUCR);        /* 00 00 00 10 01 00 00 00 */
 
         /* V7 (x);        V6 (x);       V5 (x);           V4 GPO(MID2);
          * V3 GPO(MID1);  V2 CARD_TxD;  V1 CARD_RxD;      V0 GPI+(/BAT_FAULT);
          */
-        ctrl_outw(0x0142, PORT_PVCR);   /* 00 00 00 01 01 00 00 10 */
+        __raw_writew(0x0142, PORT_PVCR);        /* 00 00 00 01 01 00 00 10 */
 }
 
 static void __init mpr2_setup(char **cmdline_p)
@@ -209,24 +209,24 @@ static void __init mpr2_setup(char **cmdline_p)
          * /PCC_CD1, /PCC_CD2,  PCC_BVD1, PCC_BVD2,
          * /IOIS16,  IRQ4,      IRQ5,     USB1d_SUSPEND
          */
-        ctrl_outw(0xAABC, PORT_PSELA);
+        __raw_writew(0xAABC, PORT_PSELA);
         /* set Pin Select Register B:
          * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC,
          * LCD_VEPWC,  IIC_SDA,    IIC_SCL, Reserved
          */
-        ctrl_outw(0x3C00, PORT_PSELB);
+        __raw_writew(0x3C00, PORT_PSELB);
         /* set Pin Select Register C:
          * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved
          */
-        ctrl_outw(0x0000, PORT_PSELC);
+        __raw_writew(0x0000, PORT_PSELC);
         /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK,
          * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved
          */
-        ctrl_outw(0x0000, PORT_PSELD);
+        __raw_writew(0x0000, PORT_PSELD);
         /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */
-        ctrl_outw(0x0101, PORT_UTRCTL);
+        __raw_writew(0x0101, PORT_UTRCTL);
         /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */
-        ctrl_outw(0xA5C0, PORT_UCLKCR_W);
+        __raw_writew(0xA5C0, PORT_UCLKCR_W);
 
         setup_chip_select();
 
diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c
index 5bc126900ce3..594866356c24 100644
--- a/arch/sh/boards/board-polaris.c
+++ b/arch/sh/boards/board-polaris.c
@@ -89,15 +89,15 @@ static int __init polaris_initialise(void)
         printk(KERN_INFO "Configuring Polaris external bus\n");
 
         /* Configure area 5 with 2 wait states */
-        wcr = ctrl_inw(WCR2);
+        wcr = __raw_readw(WCR2);
         wcr &= (~AREA5_WAIT_CTRL);
         wcr |= (WAIT_STATES_10 << 10);
-        ctrl_outw(wcr, WCR2);
+        __raw_writew(wcr, WCR2);
 
         /* Configure area 5 for 32-bit access */
-        bcr_mask = ctrl_inw(BCR2);
+        bcr_mask = __raw_readw(BCR2);
         bcr_mask |= 1 << 10;
-        ctrl_outw(bcr_mask, BCR2);
+        __raw_writew(bcr_mask, BCR2);
 
         return platform_add_devices(polaris_devices,
                                     ARRAY_SIZE(polaris_devices));
@@ -128,13 +128,13 @@ static struct ipr_desc ipr_irq_desc = {
 static void __init init_polaris_irq(void)
 {
         /* Disable all interrupts */
-        ctrl_outw(0, BCR_ILCRA);
-        ctrl_outw(0, BCR_ILCRB);
-        ctrl_outw(0, BCR_ILCRC);
-        ctrl_outw(0, BCR_ILCRD);
-        ctrl_outw(0, BCR_ILCRE);
-        ctrl_outw(0, BCR_ILCRF);
-        ctrl_outw(0, BCR_ILCRG);
+        __raw_writew(0, BCR_ILCRA);
+        __raw_writew(0, BCR_ILCRB);
+        __raw_writew(0, BCR_ILCRC);
+        __raw_writew(0, BCR_ILCRD);
+        __raw_writew(0, BCR_ILCRE);
+        __raw_writew(0, BCR_ILCRF);
+        __raw_writew(0, BCR_ILCRG);
 
         register_ipr_controller(&ipr_irq_desc);
 }
diff --git a/arch/sh/boards/board-shmin.c b/arch/sh/boards/board-shmin.c
index b1dcbbc89188..325bed53b87e 100644
--- a/arch/sh/boards/board-shmin.c
+++ b/arch/sh/boards/board-shmin.c
@@ -17,8 +17,8 @@
 
 static void __init init_shmin_irq(void)
 {
-        ctrl_outw(0x2a00, PFC_PHCR);    // IRQ0-3=IRQ
-        ctrl_outw(0x0aaa, INTC_ICR1);   // IRQ0-3=IRQ-mode,Low-active.
+        __raw_writew(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
+        __raw_writew(0x0aaa, INTC_ICR1);        // IRQ0-3=IRQ-mode,Low-active.
         plat_irq_setup_pins(IRQ_MODE_IRQ);
 }
 
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
index 1f5fa5c44f6d..27277cbdb636 100644
--- a/arch/sh/boards/mach-ap325rxa/setup.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -159,21 +159,21 @@ static void ap320_wvga_power_on(void *board_data)
         msleep(100);
 
         /* ASD AP-320/325 LCD ON */
-        ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
+        __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
 
         /* backlight */
         gpio_set_value(GPIO_PTS3, 0);
-        ctrl_outw(0x100, FPGA_BKLREG);
+        __raw_writew(0x100, FPGA_BKLREG);
 }
 
 static void ap320_wvga_power_off(void *board_data)
 {
         /* backlight */
-        ctrl_outw(0, FPGA_BKLREG);
+        __raw_writew(0, FPGA_BKLREG);
         gpio_set_value(GPIO_PTS3, 1);
 
         /* ASD AP-320/325 LCD OFF */
-        ctrl_outw(0, FPGA_LCDREG);
+        __raw_writew(0, FPGA_LCDREG);
 }
 
 static struct sh_mobile_lcdc_info lcdc_info = {
@@ -595,7 +595,7 @@ static int __init ap325rxa_devices_setup(void)
         gpio_request(GPIO_PTZ4, NULL);
         gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
 
-        ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
+        __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
 
         /* FLCTL */
         gpio_request(GPIO_FN_FCE, NULL);
@@ -613,9 +613,9 @@ static int __init ap325rxa_devices_setup(void)
         gpio_request(GPIO_FN_FWE, NULL);
         gpio_request(GPIO_FN_FRB, NULL);
 
-        ctrl_outw(0, PORT_HIZCRC);
-        ctrl_outw(0xFFFF, PORT_DRVCRA);
-        ctrl_outw(0xFFFF, PORT_DRVCRB);
+        __raw_writew(0, PORT_HIZCRC);
+        __raw_writew(0xFFFF, PORT_DRVCRA);
+        __raw_writew(0xFFFF, PORT_DRVCRB);
 
         platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
 
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
index 33f770856319..1394b078db36 100644
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -66,9 +66,9 @@ static void enable_cayman_irq(unsigned int irq)
         reg = EPLD_MASK_BASE + ((irq / 8) << 2);
         bit = 1<<(irq % 8);
         local_irq_save(flags);
-        mask = ctrl_inl(reg);
+        mask = __raw_readl(reg);
         mask |= bit;
-        ctrl_outl(mask, reg);
+        __raw_writel(mask, reg);
         local_irq_restore(flags);
 }
 
@@ -83,9 +83,9 @@ void disable_cayman_irq(unsigned int irq)
         reg = EPLD_MASK_BASE + ((irq / 8) << 2);
         bit = 1<<(irq % 8);
         local_irq_save(flags);
-        mask = ctrl_inl(reg);
+        mask = __raw_readl(reg);
         mask &= ~bit;
-        ctrl_outl(mask, reg);
+        __raw_writel(mask, reg);
         local_irq_restore(flags);
 }
 
@@ -109,8 +109,8 @@ int cayman_irq_demux(int evt)
                 unsigned long status;
                 int i;
 
-                status = ctrl_inl(EPLD_STATUS_BASE) &
-                         ctrl_inl(EPLD_MASK_BASE) & 0xff;
+                status = __raw_readl(EPLD_STATUS_BASE) &
+                         __raw_readl(EPLD_MASK_BASE) & 0xff;
                 if (status == 0) {
                         irq = -1;
                 } else {
@@ -126,8 +126,8 @@ int cayman_irq_demux(int evt)
                 unsigned long status;
                 int i;
 
-                status = ctrl_inl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
-                         ctrl_inl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
+                status = __raw_readl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
+                         __raw_readl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
                 if (status == 0) {
                         irq = -1;
                 } else {
diff --git a/arch/sh/boards/mach-dreamcast/rtc.c b/arch/sh/boards/mach-dreamcast/rtc.c
index a7433685798d..061d65714fcc 100644
--- a/arch/sh/boards/mach-dreamcast/rtc.c
+++ b/arch/sh/boards/mach-dreamcast/rtc.c
@@ -35,11 +35,11 @@ static void aica_rtc_gettimeofday(struct timespec *ts)
         unsigned long val1, val2;
 
         do {
-                val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) |
-                        (ctrl_inl(AICA_RTC_SECS_L) & 0xffff);
+                val1 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
+                        (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
 
-                val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) |
-                        (ctrl_inl(AICA_RTC_SECS_L) & 0xffff);
+                val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
+                        (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
         } while (val1 != val2);
 
         ts->tv_sec = val1 - TWENTY_YEARS;
@@ -60,14 +60,14 @@ static int aica_rtc_settimeofday(const time_t secs)
         unsigned long adj = secs + TWENTY_YEARS;
 
         do {
-                ctrl_outl((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H);
-                ctrl_outl((adj & 0xffff), AICA_RTC_SECS_L);
+                __raw_writel((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H);
+                __raw_writel((adj & 0xffff), AICA_RTC_SECS_L);
 
-                val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) |
-                        (ctrl_inl(AICA_RTC_SECS_L) & 0xffff);
+                val1 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
+                        (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
 
-                val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) |
-                        (ctrl_inl(AICA_RTC_SECS_L) & 0xffff);
+                val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
+                        (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
         } while (val1 != val2);
 
         return 0;
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index a49cce16e783..1135c3b848f2 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -696,13 +696,13 @@ static struct platform_device camera_devices[] = {
 #define FCLKBCR         0xa415000c
 static void fsimck_init(struct clk *clk)
 {
-        u32 status = ctrl_inl(clk->enable_reg);
+        u32 status = __raw_readl(clk->enable_reg);
 
         /* use external clock */
         status &= ~0x000000ff;
         status |= 0x00000080;
 
-        ctrl_outl(status, clk->enable_reg);
+        __raw_writel(status, clk->enable_reg);
 }
 
 static struct clk_ops fsimck_clk_ops = {
@@ -853,7 +853,7 @@ static int __init arch_setup(void)
         gpio_direction_output(GPIO_PTG1, 0);
         gpio_direction_output(GPIO_PTG2, 0);
         gpio_direction_output(GPIO_PTG3, 0);
-        ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
+        __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
 
         /* enable SH-Eth */
         gpio_request(GPIO_PTA1, NULL);
@@ -873,16 +873,16 @@ static int __init arch_setup(void)
         gpio_request(GPIO_FN_LNKSTA,       NULL);
 
         /* enable USB */
-        ctrl_outw(0x0000, 0xA4D80000);
-        ctrl_outw(0x0000, 0xA4D90000);
+        __raw_writew(0x0000, 0xA4D80000);
+        __raw_writew(0x0000, 0xA4D90000);
         gpio_request(GPIO_PTB3,  NULL);
         gpio_request(GPIO_PTB4,  NULL);
         gpio_request(GPIO_PTB5,  NULL);
         gpio_direction_input(GPIO_PTB3);
         gpio_direction_output(GPIO_PTB4, 0);
         gpio_direction_output(GPIO_PTB5, 0);
-        ctrl_outw(0x0600, 0xa40501d4);
-        ctrl_outw(0x0600, 0xa4050192);
+        __raw_writew(0x0600, 0xa40501d4);
+        __raw_writew(0x0600, 0xa4050192);
 
         if (gpio_get_value(GPIO_PTB3)) {
                 printk(KERN_INFO "USB1 function is selected\n");
@@ -923,7 +923,7 @@ static int __init arch_setup(void)
         gpio_request(GPIO_FN_LCDVSYN,  NULL);
         gpio_request(GPIO_FN_LCDDON,   NULL);
         gpio_request(GPIO_FN_LCDLCLK,  NULL);
-        ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
+        __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
 
         gpio_request(GPIO_PTE6, NULL);
         gpio_request(GPIO_PTU1, NULL);
@@ -935,7 +935,7 @@ static int __init arch_setup(void)
         gpio_direction_output(GPIO_PTA2, 0);
 
         /* I/O buffer drive ability is high */
-        ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
+        __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
 
         if (gpio_get_value(GPIO_PTE6)) {
                 /* DVI */
@@ -1067,7 +1067,7 @@ static int __init arch_setup(void)
         gpio_direction_output(GPIO_PTB7, 0);
 
         /* I/O buffer drive ability is high for SDHI1 */
-        ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
+        __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
 #else
         /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
         gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
diff --git a/arch/sh/boards/mach-highlander/irq-r7780mp.c b/arch/sh/boards/mach-highlander/irq-r7780mp.c
index 83c28bcd4d2a..9893fd3a1358 100644
--- a/arch/sh/boards/mach-highlander/irq-r7780mp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7780mp.c
@@ -64,7 +64,7 @@ static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
 
 unsigned char * __init highlander_plat_irq_setup(void)
 {
-        if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) {
+        if ((__raw_readw(0xa4000700) & 0xf000) == 0x2000) {
                 printk(KERN_INFO "Using r7780mp interrupt controller.\n");
                 register_intc_controller(&intc_desc);
                 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/irq-r7780rp.c b/arch/sh/boards/mach-highlander/irq-r7780rp.c
index b721e86b5af4..0805b2151452 100644
--- a/arch/sh/boards/mach-highlander/irq-r7780rp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7780rp.c
@@ -57,7 +57,7 @@ static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
 
 unsigned char * __init highlander_plat_irq_setup(void)
 {
-        if (ctrl_inw(0xa5000600)) {
+        if (__raw_readw(0xa5000600)) {
                 printk(KERN_INFO "Using r7780rp interrupt controller.\n");
                 register_intc_controller(&intc_desc);
                 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/irq-r7785rp.c b/arch/sh/boards/mach-highlander/irq-r7785rp.c
index 3811b060a39b..558b24862776 100644
--- a/arch/sh/boards/mach-highlander/irq-r7785rp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7785rp.c
@@ -66,20 +66,20 @@ static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
 
 unsigned char * __init highlander_plat_irq_setup(void)
 {
-        if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
+        if ((__raw_readw(0xa4000158) & 0xf000) != 0x1000)
                 return NULL;
 
         printk(KERN_INFO "Using r7785rp interrupt controller.\n");
 
-        ctrl_outw(0x0000, PA_IRLSSR1);  /* FPGA IRLSSR1(CF_CD clear) */
+        __raw_writew(0x0000, PA_IRLSSR1);       /* FPGA IRLSSR1(CF_CD clear) */
 
         /* Setup the FPGA IRL */
-        ctrl_outw(0x0000, PA_IRLPRA);   /* FPGA IRLA */
-        ctrl_outw(0xe598, PA_IRLPRB);   /* FPGA IRLB */
-        ctrl_outw(0x7060, PA_IRLPRC);   /* FPGA IRLC */
-        ctrl_outw(0x0000, PA_IRLPRD);   /* FPGA IRLD */
-        ctrl_outw(0x4321, PA_IRLPRE);   /* FPGA IRLE */
-        ctrl_outw(0xdcba, PA_IRLPRF);   /* FPGA IRLF */
+        __raw_writew(0x0000, PA_IRLPRA);        /* FPGA IRLA */
+        __raw_writew(0xe598, PA_IRLPRB);        /* FPGA IRLB */
+        __raw_writew(0x7060, PA_IRLPRC);        /* FPGA IRLC */
+        __raw_writew(0x0000, PA_IRLPRD);        /* FPGA IRLD */
+        __raw_writew(0x4321, PA_IRLPRE);        /* FPGA IRLE */
+        __raw_writew(0xdcba, PA_IRLPRF);        /* FPGA IRLF */
 
         register_intc_controller(&intc_desc);
         return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/psw.c b/arch/sh/boards/mach-highlander/psw.c
index 37b1a2ee71a5..522786318d36 100644
--- a/arch/sh/boards/mach-highlander/psw.c
+++ b/arch/sh/boards/mach-highlander/psw.c
@@ -24,7 +24,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
         unsigned int l, mask;
         int ret = 0;
 
-        l = ctrl_inw(PA_DBSW);
+        l = __raw_readw(PA_DBSW);
 
         /* Nothing to do if there's no state change */
         if (psw->state) {
@@ -45,7 +45,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
 out:
         /* Clear the switch IRQs */
         l |= (0x7 << 12);
-        ctrl_outw(l, PA_DBSW);
+        __raw_writew(l, PA_DBSW);
 
         return IRQ_RETVAL(ret);
 }
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index f663c14d8885..affd66747ba3 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -311,13 +311,13 @@ device_initcall(r7780rp_devices_setup);
  */
 static int ivdr_clk_enable(struct clk *clk)
 {
-        ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
+        __raw_writew(__raw_readw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
         return 0;
 }
 
 static void ivdr_clk_disable(struct clk *clk)
 {
-        ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
+        __raw_writew(__raw_readw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
 }
 
 static struct clk_ops ivdr_clk_ops = {
@@ -337,7 +337,7 @@ static struct clk *r7780rp_clocks[] = {
 static void r7780rp_power_off(void)
 {
         if (mach_is_r7780mp() || mach_is_r7785rp())
-                ctrl_outw(0x0001, PA_POFF);
+                __raw_writew(0x0001, PA_POFF);
 }
 
 /*
@@ -345,7 +345,7 @@ static void r7780rp_power_off(void)
  */
 static void __init highlander_setup(char **cmdline_p)
 {
-        u16 ver = ctrl_inw(PA_VERREG);
+        u16 ver = __raw_readw(PA_VERREG);
         int i;
 
         printk(KERN_INFO "Renesas Solutions Highlander %s support.\n",
@@ -370,12 +370,12 @@ static void __init highlander_setup(char **cmdline_p)
                 clk_enable(clk);
         }
 
-        ctrl_outw(0x0000, PA_OBLED);    /* Clear LED. */
+        __raw_writew(0x0000, PA_OBLED); /* Clear LED. */
 
         if (mach_is_r7780rp())
-                ctrl_outw(0x0001, PA_SDPOW);    /* SD Power ON */
+                __raw_writew(0x0001, PA_SDPOW); /* SD Power ON */
 
-        ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x01, PA_IVDRCTL);     /* Si13112 */
+        __raw_writew(__raw_readw(PA_IVDRCTL) | 0x01, PA_IVDRCTL);       /* Si13112 */
 
         pm_power_off = r7780rp_power_off;
 }
diff --git a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
index e85212faf40a..b49535c0ddd9 100644
--- a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
+++ b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
@@ -53,7 +53,7 @@ static void hp6x0_apm_get_power_status(struct apm_power_info *info)
         info->ac_line_status = (battery > HP680_BATTERY_AC_ON) ?
                          APM_AC_ONLINE : APM_AC_OFFLINE;
 
-        pgdr = ctrl_inb(PGDR);
+        pgdr = __raw_readb(PGDR);
         if (pgdr & PGDR_MAIN_BATTERY_OUT) {
                 info->battery_status    = APM_BATTERY_STATUS_NOT_PRESENT;
                 info->battery_flag      = 0x80;
diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c
index d936c1af7620..4499a3749d40 100644
--- a/arch/sh/boards/mach-hp6xx/pm.c
+++ b/arch/sh/boards/mach-hp6xx/pm.c
@@ -53,17 +53,17 @@ static void pm_enter(void)
         sh_wdt_write_cnt(0);
 
         /* disable PLL1 */
-        frqcr = ctrl_inw(FRQCR);
+        frqcr = __raw_readw(FRQCR);
         frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
-        ctrl_outw(frqcr, FRQCR);
+        __raw_writew(frqcr, FRQCR);
 
         /* enable standby */
-        stbcr = ctrl_inb(STBCR);
-        ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
+        stbcr = __raw_readb(STBCR);
+        __raw_writeb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
 
         /* set self-refresh */
-        mcr = ctrl_inw(MCR);
-        ctrl_outw(mcr & ~MCR_RFSH, MCR);
+        mcr = __raw_readw(MCR);
+        __raw_writew(mcr & ~MCR_RFSH, MCR);
 
         /* set interrupt handler */
         asm volatile("stc vbr, %0" : "=r" (vbr_old));
@@ -73,8 +73,8 @@ static void pm_enter(void)
                &wakeup_start, &wakeup_end - &wakeup_start);
         asm volatile("ldc %0, vbr" : : "r" (vbr_new));
 
-        ctrl_outw(0, RTCNT);
-        ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR);
+        __raw_writew(0, RTCNT);
+        __raw_writew(mcr | MCR_RFSH | MCR_RMODE, MCR);
 
         cpu_sleep();
 
@@ -83,14 +83,14 @@ static void pm_enter(void)
         free_page(vbr_new);
 
         /* enable PLL1 */
-        frqcr = ctrl_inw(FRQCR);
+        frqcr = __raw_readw(FRQCR);
         frqcr |= FRQCR_PSTBY;
-        ctrl_outw(frqcr, FRQCR);
+        __raw_writew(frqcr, FRQCR);
         udelay(50);
         frqcr |= FRQCR_PLLEN;
-        ctrl_outw(frqcr, FRQCR);
+        __raw_writew(frqcr, FRQCR);
 
-        ctrl_outb(stbcr, STBCR);
+        __raw_writeb(stbcr, STBCR);
 
         clear_bl_bit();
 }
@@ -115,21 +115,21 @@ static int hp6x0_pm_enter(suspend_state_t state)
         outw(hd64461_stbcr, HD64461_STBCR);
 #endif
 
-        ctrl_outb(0x1f, DACR);
+        __raw_writeb(0x1f, DACR);
 
-        stbcr = ctrl_inb(STBCR);
-        ctrl_outb(0x01, STBCR);
+        stbcr = __raw_readb(STBCR);
+        __raw_writeb(0x01, STBCR);
 
-        stbcr2 = ctrl_inb(STBCR2);
-        ctrl_outb(0x7f , STBCR2);
+        stbcr2 = __raw_readb(STBCR2);
+        __raw_writeb(0x7f , STBCR2);
 
         outw(0xf07f, HD64461_SCPUCR);
 
         pm_enter();
 
         outw(0, HD64461_SCPUCR);
-        ctrl_outb(stbcr, STBCR);
-        ctrl_outb(stbcr2, STBCR2);
+        __raw_writeb(stbcr, STBCR);
+        __raw_writeb(stbcr2, STBCR2);
 
 #ifdef CONFIG_HD64461_ENABLER
         hd64461_stbcr = inw(HD64461_STBCR);
diff --git a/arch/sh/boards/mach-hp6xx/setup.c b/arch/sh/boards/mach-hp6xx/setup.c
index e6dd5e96321e..8c9add5f4cfa 100644
--- a/arch/sh/boards/mach-hp6xx/setup.c
+++ b/arch/sh/boards/mach-hp6xx/setup.c
@@ -149,19 +149,19 @@ static void __init hp6xx_setup(char **cmdline_p)
 
         sh_dac_output(0, DAC_SPEAKER_VOLUME);
         sh_dac_disable(DAC_SPEAKER_VOLUME);
-        v8 = ctrl_inb(DACR);
+        v8 = __raw_readb(DACR);
         v8 &= ~DACR_DAE;
-        ctrl_outb(v8,DACR);
+        __raw_writeb(v8,DACR);
 
-        v8 = ctrl_inb(SCPDR);
+        v8 = __raw_readb(SCPDR);
         v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y;
         v8 &= ~SCPDR_TS_SCAN_ENABLE;
-        ctrl_outb(v8, SCPDR);
+        __raw_writeb(v8, SCPDR);
 
-        v = ctrl_inw(SCPCR);
+        v = __raw_readw(SCPCR);
         v &= ~SCPCR_TS_MASK;
         v |= SCPCR_TS_ENABLE;
-        ctrl_outw(v, SCPCR);
+        __raw_writew(v, SCPCR);
 }
 device_initcall(hp6xx_devices_setup);
 
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index 5d7b5d92475e..ca9e82d77d0a 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -282,7 +282,7 @@ static int camera_power(struct device *dev, int mode)
                  * use 1.8 V for VccQ_VIO
                  * use 2.85V for VccQ_SR
                  */
-                ctrl_outw((ctrl_inw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB);
+                __raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB);
 
                 /* reset clear */
                 ret = gpio_request(GPIO_PTB4, NULL);
@@ -492,13 +492,13 @@ static int kfr2r09_usb0_gadget_setup(void)
         if (kfr2r09_usb0_gadget_i2c_setup() != 0)
                 return -ENODEV; /* unable to configure using i2c */
 
-        ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
+        __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
         gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */
         gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */
         gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */
         msleep(20); /* wait 20ms to let the clock settle */
         clk_enable(clk_get(NULL, "usb0"));
-        ctrl_outw(0x0600, 0xa40501d4);
+        __raw_writew(0x0600, 0xa40501d4);
 
         return 0;
 }
@@ -526,12 +526,12 @@ static int __init kfr2r09_devices_setup(void)
         gpio_direction_output(GPIO_PTG3, 1); /* HPON_ON = H */
 
         /* setup NOR flash at CS0 */
-        ctrl_outl(0x36db0400, BSC_CS0BCR);
-        ctrl_outl(0x00000500, BSC_CS0WCR);
+        __raw_writel(0x36db0400, BSC_CS0BCR);
+        __raw_writel(0x00000500, BSC_CS0WCR);
 
         /* setup NAND flash at CS4 */
-        ctrl_outl(0x36db0400, BSC_CS4BCR);
-        ctrl_outl(0x00000500, BSC_CS4WCR);
+        __raw_writel(0x36db0400, BSC_CS4BCR);
+        __raw_writel(0x00000500, BSC_CS4WCR);
 
         /* setup KEYSC pins */
         gpio_request(GPIO_FN_KEYOUT0, NULL);
diff --git a/arch/sh/boards/mach-landisk/gio.c b/arch/sh/boards/mach-landisk/gio.c
index 528013188196..01e6abb769b9 100644
--- a/arch/sh/boards/mach-landisk/gio.c
+++ b/arch/sh/boards/mach-landisk/gio.c
@@ -76,39 +76,39 @@ static long gio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
                 break;
 
         case GIODRV_IOCSGIODATA1:       /* write byte */
-                ctrl_outb((unsigned char)(0x0ff & data), addr);
+                __raw_writeb((unsigned char)(0x0ff & data), addr);
                 break;
 
         case GIODRV_IOCSGIODATA2:       /* write word */
                 if (addr & 0x01) {
                         return -EFAULT;
                 }
-                ctrl_outw((unsigned short int)(0x0ffff & data), addr);
+                __raw_writew((unsigned short int)(0x0ffff & data), addr);
                 break;
 
         case GIODRV_IOCSGIODATA4:       /* write long */
                 if (addr & 0x03) {
                         return -EFAULT;
                 }
-                ctrl_outl(data, addr);
+                __raw_writel(data, addr);
                 break;
 
         case GIODRV_IOCGGIODATA1:       /* read byte */
-                data = ctrl_inb(addr);
+                data = __raw_readb(addr);
                 break;
 
         case GIODRV_IOCGGIODATA2:       /* read word */
                 if (addr & 0x01) {
                         return -EFAULT;
                 }
-                data = ctrl_inw(addr);
+                data = __raw_readw(addr);
                 break;
 
         case GIODRV_IOCGGIODATA4:       /* read long */
                 if (addr & 0x03) {
                         return -EFAULT;
                 }
-                data = ctrl_inl(addr);
+                data = __raw_readl(addr);
                 break;
         default:
                 return -EFAULT;
diff --git a/arch/sh/boards/mach-landisk/irq.c b/arch/sh/boards/mach-landisk/irq.c
index 7b284cde1f58..96f38a4187d0 100644
--- a/arch/sh/boards/mach-landisk/irq.c
+++ b/arch/sh/boards/mach-landisk/irq.c
@@ -22,14 +22,14 @@ static void disable_landisk_irq(unsigned int irq)
 {
         unsigned char mask = 0xff ^ (0x01 << (irq - 5));
 
-        ctrl_outb(ctrl_inb(PA_IMASK) & mask, PA_IMASK);
+        __raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK);
 }
 
 static void enable_landisk_irq(unsigned int irq)
 {
         unsigned char value = (0x01 << (irq - 5));
 
-        ctrl_outb(ctrl_inb(PA_IMASK) | value, PA_IMASK);
+        __raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK);
 }
 
 static struct irq_chip landisk_irq_chip __read_mostly = {
@@ -52,5 +52,5 @@ void __init init_landisk_IRQ(void)
                                               handle_level_irq, "level");
                 enable_landisk_irq(i);
         }
-        ctrl_outb(0x00, PA_PWRINT_CLR);
+        __raw_writeb(0x00, PA_PWRINT_CLR);
 }
diff --git a/arch/sh/boards/mach-landisk/psw.c b/arch/sh/boards/mach-landisk/psw.c
index e6b0efa098d1..bef83522f958 100644
--- a/arch/sh/boards/mach-landisk/psw.c
+++ b/arch/sh/boards/mach-landisk/psw.c
@@ -25,7 +25,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
         unsigned int sw_value;
         int ret = 0;
 
-        sw_value = (0x0ff & (~ctrl_inb(PA_STATUS)));
+        sw_value = (0x0ff & (~__raw_readb(PA_STATUS)));
 
         /* Nothing to do if there's no state change */
         if (psw->state) {
@@ -42,7 +42,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
 
 out:
         /* Clear the switch IRQs */
-        ctrl_outb(0x00, PA_PWRINT_CLR);
+        __raw_writeb(0x00, PA_PWRINT_CLR);
 
         return IRQ_RETVAL(ret);
 }
diff --git a/arch/sh/boards/mach-landisk/setup.c b/arch/sh/boards/mach-landisk/setup.c
index 2d09d4d34f87..50337acc18c5 100644
--- a/arch/sh/boards/mach-landisk/setup.c
+++ b/arch/sh/boards/mach-landisk/setup.c
@@ -25,7 +25,7 @@ void init_landisk_IRQ(void);
 
 static void landisk_power_off(void)
 {
-        ctrl_outb(0x01, PA_SHUTDOWN);
+        __raw_writeb(0x01, PA_SHUTDOWN);
 }
 
 static struct resource cf_ide_resources[3];
@@ -88,7 +88,7 @@ __initcall(landisk_devices_setup);
 static void __init landisk_setup(char **cmdline_p)
 {
         /* LED ON */
-        ctrl_outb(ctrl_inb(PA_LED) | 0x03, PA_LED);
+        __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
 
         printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n");
         pm_power_off = landisk_power_off;
diff --git a/arch/sh/boards/mach-microdev/io.c b/arch/sh/boards/mach-microdev/io.c
index 52dd748211c7..2960c659020e 100644
--- a/arch/sh/boards/mach-microdev/io.c
+++ b/arch/sh/boards/mach-microdev/io.c
@@ -141,10 +141,10 @@ static inline void delay(void)
 #if defined(CONFIG_PCI)
         /* System board present, just make a dummy SRAM access.  (CS0 will be
            mapped to PCI memory, probably good to avoid it.) */
-        ctrl_inw(0xa6800000);
+        __raw_readw(0xa6800000);
 #else
         /* CS0 will be mapped to flash, ROM etc so safe to access it. */
-        ctrl_inw(0xa0000000);
+        __raw_readw(0xa0000000);
 #endif
 }
 
diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c
index b551963579c1..a26d16669aa2 100644
--- a/arch/sh/boards/mach-microdev/irq.c
+++ b/arch/sh/boards/mach-microdev/irq.c
@@ -88,7 +88,7 @@ static void disable_microdev_irq(unsigned int irq)
         fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
 
         /* disable interrupts on the FPGA INTC register */
-        ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
+        __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
 }
 
 static void enable_microdev_irq(unsigned int irq)
@@ -107,13 +107,13 @@ static void enable_microdev_irq(unsigned int irq)
         priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
 
         /* set priority for the interrupt */
-        priorities = ctrl_inl(priorityReg);
+        priorities = __raw_readl(priorityReg);
         priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
         priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
-        ctrl_outl(priorities, priorityReg);
+        __raw_writel(priorities, priorityReg);
 
         /* enable interrupts on the FPGA INTC register */
-        ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
+        __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
 }
 
 /* This function sets the desired irq handler to be a MicroDev type */
@@ -134,7 +134,7 @@ extern void __init init_microdev_irq(void)
         int i;
 
         /* disable interrupts on the FPGA INTC register */
-        ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG);
+        __raw_writel(~0ul, MICRODEV_FPGA_INTDSB_REG);
 
         for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
                 make_microdev_irq(i);
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 507c77be476d..ed2eeeb390a5 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -516,8 +516,8 @@ static int __init migor_devices_setup(void)
 
         /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
         gpio_request(GPIO_FN_IRQ0, NULL);
-        ctrl_outl(0x00003400, BSC_CS4BCR);
-        ctrl_outl(0x00110080, BSC_CS4WCR);
+        __raw_writel(0x00003400, BSC_CS4BCR);
+        __raw_writel(0x00110080, BSC_CS4WCR);
 
         /* KEYSC */
         gpio_request(GPIO_FN_KEYOUT0, NULL);
@@ -533,7 +533,7 @@ static int __init migor_devices_setup(void)
 
         /* NAND Flash */
         gpio_request(GPIO_FN_CS6A_CE2B, NULL);
-        ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
+        __raw_writel((__raw_readl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
         gpio_request(GPIO_PTA1, NULL);
         gpio_direction_input(GPIO_PTA1);
 
@@ -627,7 +627,7 @@ static int __init migor_devices_setup(void)
 #else
         gpio_direction_output(GPIO_PTT0, 1);
 #endif
-        ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
+        __raw_writew(__raw_readw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
 
         platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
 
diff --git a/arch/sh/boards/mach-r2d/irq.c b/arch/sh/boards/mach-r2d/irq.c
index 78d7b27c80da..574f009c3c31 100644
--- a/arch/sh/boards/mach-r2d/irq.c
+++ b/arch/sh/boards/mach-r2d/irq.c
@@ -129,7 +129,7 @@ void __init init_rts7751r2d_IRQ(void)
 {
         struct intc_desc *d;
 
-        switch (ctrl_inw(PA_VERREG) & 0xf0) {
+        switch (__raw_readw(PA_VERREG) & 0xf0) {
 #ifdef CONFIG_RTS7751R2D_PLUS
         case 0x10:
                 printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n");
@@ -147,7 +147,7 @@ void __init init_rts7751r2d_IRQ(void)
 #endif
         default:
                 printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n",
-                       ctrl_inw(PA_VERREG));
+                       __raw_readw(PA_VERREG));
                 return;
         }
 
diff --git a/arch/sh/boards/mach-r2d/setup.c b/arch/sh/boards/mach-r2d/setup.c
index a625ecb93e47..b84df6a3a93c 100644
--- a/arch/sh/boards/mach-r2d/setup.c
+++ b/arch/sh/boards/mach-r2d/setup.c
@@ -70,7 +70,7 @@ static struct spi_board_info spi_bus[] = {
 static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state)
 {
         BUG_ON(cs != 0);  /* Single Epson RTC-9701JE attached on CS0 */
-        ctrl_outw(state == BITBANG_CS_ACTIVE, PA_RTCCE);
+        __raw_writew(state == BITBANG_CS_ACTIVE, PA_RTCCE);
 }
 
 static struct sh_spi_info spi_info = {
@@ -262,7 +262,7 @@ __initcall(rts7751r2d_devices_setup);
 
 static void rts7751r2d_power_off(void)
 {
-        ctrl_outw(0x0001, PA_POWOFF);
+        __raw_writew(0x0001, PA_POWOFF);
 }
 
 /*
@@ -271,14 +271,14 @@ static void rts7751r2d_power_off(void)
 static void __init rts7751r2d_setup(char **cmdline_p)
 {
         void __iomem *sm501_reg;
-        u16 ver = ctrl_inw(PA_VERREG);
+        u16 ver = __raw_readw(PA_VERREG);
 
         printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
 
         printk(KERN_INFO "FPGA version:%d (revision:%d)\n",
                                         (ver >> 4) & 0xf, ver & 0xf);
 
-        ctrl_outw(0x0000, PA_OUTPORT);
+        __raw_writew(0x0000, PA_OUTPORT);
         pm_power_off = rts7751r2d_power_off;
 
         /* sm501 dram configuration:
diff --git a/arch/sh/boards/mach-rsk/devices-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c
index c37617e63220..4fa08ba10253 100644
--- a/arch/sh/boards/mach-rsk/devices-rsk7203.c
+++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c
@@ -96,7 +96,7 @@ static int __init rsk7203_devices_setup(void)
         gpio_request(GPIO_FN_RXD0, NULL);
 
         /* Setup LAN9118: CS1 in 16-bit Big Endian Mode, IRQ0 at Port B */
-        ctrl_outl(0x36db0400, 0xfffc0008); /* CS1BCR */
+        __raw_writel(0x36db0400, 0xfffc0008); /* CS1BCR */
         gpio_request(GPIO_FN_IRQ0_PB, NULL);
 
         return platform_add_devices(rsk7203_devices,
diff --git a/arch/sh/boards/mach-sdk7780/irq.c b/arch/sh/boards/mach-sdk7780/irq.c
index 855558163c58..e5f7564f2511 100644
--- a/arch/sh/boards/mach-sdk7780/irq.c
+++ b/arch/sh/boards/mach-sdk7780/irq.c
@@ -37,9 +37,9 @@ void __init init_sdk7780_IRQ(void)
 {
         printk(KERN_INFO "Using SDK7780 interrupt controller.\n");
 
-        ctrl_outw(0xFFFF, FPGA_IRQ0MR);
+        __raw_writew(0xFFFF, FPGA_IRQ0MR);
         /* Setup IRL 0-3 */
-        ctrl_outw(0x0003, FPGA_IMSR);
+        __raw_writew(0x0003, FPGA_IMSR);
         plat_irq_setup_pins(IRQ_MODE_IRL3210);
 
         register_intc_controller(&fpga_intc_desc);
diff --git a/arch/sh/boards/mach-sdk7780/setup.c b/arch/sh/boards/mach-sdk7780/setup.c
index b887373a2599..4da38db4b5fe 100644
--- a/arch/sh/boards/mach-sdk7780/setup.c
+++ b/arch/sh/boards/mach-sdk7780/setup.c
@@ -74,8 +74,8 @@ device_initcall(sdk7780_devices_setup);
 
 static void __init sdk7780_setup(char **cmdline_p)
 {
-        u16 ver = ctrl_inw(FPGA_FPVERR);
-        u16 dateStamp = ctrl_inw(FPGA_FPDATER);
+        u16 ver = __raw_readw(FPGA_FPVERR);
+        u16 dateStamp = __raw_readw(FPGA_FPDATER);
 
         printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n");
         printk(KERN_INFO "Board version: %d (revision %d), "
@@ -85,7 +85,7 @@ static void __init sdk7780_setup(char **cmdline_p)
                          dateStamp);
 
         /* Setup pin mux'ing for PCIC */
-        ctrl_outw(0x0000, GPIO_PECR);
+        __raw_writew(0x0000, GPIO_PECR);
 }
 
 /*
diff --git a/arch/sh/boards/mach-se/7206/io.c b/arch/sh/boards/mach-se/7206/io.c
index 180455642a43..adadc77532ee 100644
--- a/arch/sh/boards/mach-se/7206/io.c
+++ b/arch/sh/boards/mach-se/7206/io.c
@@ -16,7 +16,7 @@
 
 static inline void delay(void)
 {
-        ctrl_inw(0x20000000);  /* P2 ROM Area */
+        __raw_readw(0x20000000);  /* P2 ROM Area */
 }
 
 /* MS7750 requires special versions of in*, out* routines, since
diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c
index aef7f052851a..79be4bc59933 100644
--- a/arch/sh/boards/mach-se/7206/irq.c
+++ b/arch/sh/boards/mach-se/7206/irq.c
@@ -32,12 +32,12 @@ static void disable_se7206_irq(unsigned int irq)
         unsigned short msk0,msk1;
 
         /* Set the priority in IPR to 0 */
-        val = ctrl_inw(INTC_IPR01);
+        val = __raw_readw(INTC_IPR01);
         val &= mask;
-        ctrl_outw(val, INTC_IPR01);
+        __raw_writew(val, INTC_IPR01);
         /* FPGA mask set */
-        msk0 = ctrl_inw(INTMSK0);
-        msk1 = ctrl_inw(INTMSK1);
+        msk0 = __raw_readw(INTMSK0);
+        msk1 = __raw_readw(INTMSK1);
 
         switch (irq) {
         case IRQ0_IRQ:
@@ -51,8 +51,8 @@ static void disable_se7206_irq(unsigned int irq)
                 msk1 |= 0x00ff;
                 break;
         }
-        ctrl_outw(msk0, INTMSK0);
-        ctrl_outw(msk1, INTMSK1);
+        __raw_writew(msk0, INTMSK0);
+        __raw_writew(msk1, INTMSK1);
 }
 
 static void enable_se7206_irq(unsigned int irq)
@@ -62,13 +62,13 @@ static void enable_se7206_irq(unsigned int irq)
         unsigned short msk0,msk1;
 
         /* Set priority in IPR back to original value */
-        val = ctrl_inw(INTC_IPR01);
+        val = __raw_readw(INTC_IPR01);
         val |= value;
-        ctrl_outw(val, INTC_IPR01);
+        __raw_writew(val, INTC_IPR01);
 
         /* FPGA mask reset */
-        msk0 = ctrl_inw(INTMSK0);
-        msk1 = ctrl_inw(INTMSK1);
+        msk0 = __raw_readw(INTMSK0);
+        msk1 = __raw_readw(INTMSK1);
 
         switch (irq) {
         case IRQ0_IRQ:
@@ -82,8 +82,8 @@ static void enable_se7206_irq(unsigned int irq)
                 msk1 &= ~0x00ff;
                 break;
         }
-        ctrl_outw(msk0, INTMSK0);
-        ctrl_outw(msk1, INTMSK1);
+        __raw_writew(msk0, INTMSK0);
+        __raw_writew(msk1, INTMSK1);
 }
 
 static void eoi_se7206_irq(unsigned int irq)
@@ -93,8 +93,8 @@ static void eoi_se7206_irq(unsigned int irq)
         if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
                 enable_se7206_irq(irq);
         /* FPGA isr clear */
-        sts0 = ctrl_inw(INTSTS0);
-        sts1 = ctrl_inw(INTSTS1);
+        sts0 = __raw_readw(INTSTS0);
+        sts1 = __raw_readw(INTSTS1);
 
         switch (irq) {
         case IRQ0_IRQ:
@@ -108,8 +108,8 @@ static void eoi_se7206_irq(unsigned int irq)
                 sts1 &= ~0x00ff;
                 break;
         }
-        ctrl_outw(sts0, INTSTS0);
-        ctrl_outw(sts1, INTSTS1);
+        __raw_writew(sts0, INTSTS0);
+        __raw_writew(sts1, INTSTS1);
 }
 
 static struct irq_chip se7206_irq_chip __read_mostly = {
@@ -136,11 +136,11 @@ void __init init_se7206_IRQ(void)
         make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
         make_se7206_irq(IRQ1_IRQ); /* ATA */
         make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
-        ctrl_outw(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */
+        __raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */
 
         /* FPGA System register setup*/
-        ctrl_outw(0x0000,INTSTS0); /* Clear INTSTS0 */
-        ctrl_outw(0x0000,INTSTS1); /* Clear INTSTS1 */
+        __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
+        __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */
         /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
-        ctrl_outw(0x0001,INTSEL);
+        __raw_writew(0x0001,INTSEL);
 }
diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c
index c60fd13608d0..d4305c26e9f7 100644
--- a/arch/sh/boards/mach-se/7343/irq.c
+++ b/arch/sh/boards/mach-se/7343/irq.c
@@ -21,13 +21,13 @@ unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, };
 static void disable_se7343_irq(unsigned int irq)
 {
         unsigned int bit = (unsigned int)get_irq_chip_data(irq);
-        ctrl_outw(ctrl_inw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
+        __raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
 }
 
 static void enable_se7343_irq(unsigned int irq)
 {
         unsigned int bit = (unsigned int)get_irq_chip_data(irq);
-        ctrl_outw(ctrl_inw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
+        __raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
 }
 
 static struct irq_chip se7343_irq_chip __read_mostly = {
@@ -39,7 +39,7 @@ static struct irq_chip se7343_irq_chip __read_mostly = {
 
 static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
-        unsigned short intv = ctrl_inw(PA_CPLD_ST);
+        unsigned short intv = __raw_readw(PA_CPLD_ST);
         unsigned int ext_irq = 0;
 
         intv &= (1 << SE7343_FPGA_IRQ_NR) - 1;
@@ -59,8 +59,8 @@ void __init init_7343se_IRQ(void)
 {
         int i, irq;
 
-        ctrl_outw(0, PA_CPLD_IMSK);     /* disable all irqs */
-        ctrl_outw(0x2000, 0xb03fffec);  /* mrshpc irq enable */
+        __raw_writew(0, PA_CPLD_IMSK);  /* disable all irqs */
+        __raw_writew(0x2000, 0xb03fffec);       /* mrshpc irq enable */
 
         for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
                 irq = create_irq();
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c
index 3412bb2973ae..d2370af56d77 100644
--- a/arch/sh/boards/mach-se/7343/setup.c
+++ b/arch/sh/boards/mach-se/7343/setup.c
@@ -161,10 +161,10 @@ device_initcall(sh7343se_devices_setup);
  */
 static void __init sh7343se_setup(char **cmdline_p)
 {
-        ctrl_outw(0xf900, FPGA_OUT);    /* FPGA */
+        __raw_writew(0xf900, FPGA_OUT); /* FPGA */
 
-        ctrl_outw(0x0002, PORT_PECR);   /* PORT E 1 = IRQ5 */
-        ctrl_outw(0x0020, PORT_PSELD);
+        __raw_writew(0x0002, PORT_PECR);        /* PORT E 1 = IRQ5 */
+        __raw_writew(0x0020, PORT_PSELD);
 
         printk(KERN_INFO "MS7343CP01 Setup...done\n");
 }
diff --git a/arch/sh/boards/mach-se/770x/irq.c b/arch/sh/boards/mach-se/770x/irq.c
index ec1fea571b52..1028c17b81bc 100644
--- a/arch/sh/boards/mach-se/770x/irq.c
+++ b/arch/sh/boards/mach-se/770x/irq.c
@@ -96,13 +96,13 @@ static struct ipr_desc ipr_irq_desc = {
 void __init init_se_IRQ(void)
 {
         /* Disable all interrupts */
-        ctrl_outw(0, BCR_ILCRA);
-        ctrl_outw(0, BCR_ILCRB);
-        ctrl_outw(0, BCR_ILCRC);
-        ctrl_outw(0, BCR_ILCRD);
-        ctrl_outw(0, BCR_ILCRE);
-        ctrl_outw(0, BCR_ILCRF);
-        ctrl_outw(0, BCR_ILCRG);
+        __raw_writew(0, BCR_ILCRA);
+        __raw_writew(0, BCR_ILCRB);
+        __raw_writew(0, BCR_ILCRC);
+        __raw_writew(0, BCR_ILCRD);
+        __raw_writew(0, BCR_ILCRE);
+        __raw_writew(0, BCR_ILCRF);
+        __raw_writew(0, BCR_ILCRG);
 
         register_ipr_controller(&ipr_irq_desc);
 }
diff --git a/arch/sh/boards/mach-se/7721/irq.c b/arch/sh/boards/mach-se/7721/irq.c
index b417acc4dad0..d85022ea3f12 100644
--- a/arch/sh/boards/mach-se/7721/irq.c
+++ b/arch/sh/boards/mach-se/7721/irq.c
@@ -38,7 +38,7 @@ static DECLARE_INTC_DESC(intc_desc, "SE7721", vectors,
 void __init init_se7721_IRQ(void)
 {
         /* PPCR */
-        ctrl_outw(ctrl_inw(0xa4050118) & ~0x00ff, 0xa4050118);
+        __raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118);
 
         register_intc_controller(&intc_desc);
         intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0);
diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c
index 460da53b4961..7416ad7ee53a 100644
--- a/arch/sh/boards/mach-se/7721/setup.c
+++ b/arch/sh/boards/mach-se/7721/setup.c
@@ -80,10 +80,10 @@ device_initcall(se7721_devices_setup);
 static void __init se7721_setup(char **cmdline_p)
 {
         /* for USB */
-        ctrl_outw(0x0000, 0xA405010C);  /* PGCR */
-        ctrl_outw(0x0000, 0xA405010E);  /* PHCR */
-        ctrl_outw(0x00AA, 0xA4050118);  /* PPCR */
-        ctrl_outw(0x0000, 0xA4050124);  /* PSELA */
+        __raw_writew(0x0000, 0xA405010C);       /* PGCR */
+        __raw_writew(0x0000, 0xA405010E);       /* PHCR */
+        __raw_writew(0x00AA, 0xA4050118);       /* PPCR */
+        __raw_writew(0x0000, 0xA4050124);       /* PSELA */
 }
 
 /*
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index b221b6842b0d..61605db04ee6 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -21,13 +21,13 @@ unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
 static void disable_se7722_irq(unsigned int irq)
 {
         unsigned int bit = (unsigned int)get_irq_chip_data(irq);
-        ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
+        __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
 }
 
 static void enable_se7722_irq(unsigned int irq)
 {
         unsigned int bit = (unsigned int)get_irq_chip_data(irq);
-        ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
+        __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
 }
 
 static struct irq_chip se7722_irq_chip __read_mostly = {
@@ -39,7 +39,7 @@ static struct irq_chip se7722_irq_chip __read_mostly = {
 
 static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
-        unsigned short intv = ctrl_inw(IRQ01_STS);
+        unsigned short intv = __raw_readw(IRQ01_STS);
         unsigned int ext_irq = 0;
 
         intv &= (1 << SE7722_FPGA_IRQ_NR) - 1;
@@ -59,8 +59,8 @@ void __init init_se7722_IRQ(void)
 {
         int i, irq;
 
-        ctrl_outw(0, IRQ01_MASK);       /* disable all irqs */
-        ctrl_outw(0x2000, 0xb03fffec);  /* mrshpc irq enable */
+        __raw_writew(0, IRQ01_MASK);       /* disable all irqs */
+        __raw_writew(0x2000, 0xb03fffec);  /* mrshpc irq enable */
 
         for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
                 irq = create_irq();
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index 93675418171d..80a4e571b310 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -156,32 +156,32 @@ device_initcall(se7722_devices_setup);
 
 static void __init se7722_setup(char **cmdline_p)
 {
-        ctrl_outw(0x010D, FPGA_OUT);    /* FPGA */
+        __raw_writew(0x010D, FPGA_OUT);    /* FPGA */
 
-        ctrl_outw(0x0000, PORT_PECR);   /* PORT E 1 = IRQ5 ,E 0 = BS */
-        ctrl_outw(0x1000, PORT_PJCR);   /* PORT J 1 = IRQ1,J 0 =IRQ0 */
+        __raw_writew(0x0000, PORT_PECR);   /* PORT E 1 = IRQ5 ,E 0 = BS */
+        __raw_writew(0x1000, PORT_PJCR);   /* PORT J 1 = IRQ1,J 0 =IRQ0 */
 
         /* LCDC I/O */
-        ctrl_outw(0x0020, PORT_PSELD);
+        __raw_writew(0x0020, PORT_PSELD);
 
         /* SIOF1*/
-        ctrl_outw(0x0003, PORT_PSELB);
-        ctrl_outw(0xe000, PORT_PSELC);
-        ctrl_outw(0x0000, PORT_PKCR);
+        __raw_writew(0x0003, PORT_PSELB);
+        __raw_writew(0xe000, PORT_PSELC);
+        __raw_writew(0x0000, PORT_PKCR);
 
         /* LCDC */
-        ctrl_outw(0x4020, PORT_PHCR);
-        ctrl_outw(0x0000, PORT_PLCR);
-        ctrl_outw(0x0000, PORT_PMCR);
-        ctrl_outw(0x0002, PORT_PRCR);
-        ctrl_outw(0x0000, PORT_PXCR);   /* LCDC,CS6A */
+        __raw_writew(0x4020, PORT_PHCR);
+        __raw_writew(0x0000, PORT_PLCR);
+        __raw_writew(0x0000, PORT_PMCR);
+        __raw_writew(0x0002, PORT_PRCR);
+        __raw_writew(0x0000, PORT_PXCR);   /* LCDC,CS6A */
 
         /* KEYSC */
-        ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */
-        ctrl_outw(0x0000, PORT_PYCR);
-        ctrl_outw(0x0000, PORT_PZCR);
-        ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
-        ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
+        __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
+        __raw_writew(0x0000, PORT_PYCR);
+        __raw_writew(0x0000, PORT_PZCR);
+        __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
+        __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
 }
 
 /*
diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c
index f76cf3b49f23..e5e021a7d1e6 100644
--- a/arch/sh/boards/mach-se/7724/irq.c
+++ b/arch/sh/boards/mach-se/7724/irq.c
@@ -72,14 +72,14 @@ static void disable_se7724_irq(unsigned int irq)
 {
         struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
         unsigned int bit = irq - set.base;
-        ctrl_outw(ctrl_inw(set.mraddr) | 0x0001 << bit, set.mraddr);
+        __raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr);
 }
 
 static void enable_se7724_irq(unsigned int irq)
 {
         struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
         unsigned int bit = irq - set.base;
-        ctrl_outw(ctrl_inw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
+        __raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
 }
 
 static struct irq_chip se7724_irq_chip __read_mostly = {
@@ -92,7 +92,7 @@ static struct irq_chip se7724_irq_chip __read_mostly = {
 static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
         struct fpga_irq set = get_fpga_irq(irq);
-        unsigned short intv = ctrl_inw(set.sraddr);
+        unsigned short intv = __raw_readw(set.sraddr);
         struct irq_desc *ext_desc;
         unsigned int ext_irq = set.base;
 
@@ -115,13 +115,13 @@ void __init init_se7724_IRQ(void)
 {
         int i;
 
-        ctrl_outw(0xffff, IRQ0_MR);  /* mask all */
-        ctrl_outw(0xffff, IRQ1_MR);  /* mask all */
-        ctrl_outw(0xffff, IRQ2_MR);  /* mask all */
-        ctrl_outw(0x0000, IRQ0_SR);  /* clear irq */
-        ctrl_outw(0x0000, IRQ1_SR);  /* clear irq */
-        ctrl_outw(0x0000, IRQ2_SR);  /* clear irq */
-        ctrl_outw(0x002a, IRQ_MODE); /* set irq type */
+        __raw_writew(0xffff, IRQ0_MR);  /* mask all */
+        __raw_writew(0xffff, IRQ1_MR);  /* mask all */
+        __raw_writew(0xffff, IRQ2_MR);  /* mask all */
+        __raw_writew(0x0000, IRQ0_SR);  /* clear irq */
+        __raw_writew(0x0000, IRQ1_SR);  /* clear irq */
+        __raw_writew(0x0000, IRQ2_SR);  /* clear irq */
+        __raw_writew(0x002a, IRQ_MODE); /* set irq type */
 
         for (i = 0; i < SE7724_FPGA_IRQ_NR; i++)
                 set_irq_chip_and_handler_name(SE7724_FPGA_IRQ_BASE + i,
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index cbfba783ee49..242dc843f574 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -256,12 +256,12 @@ static struct platform_device ceu1_device = {
 #define FCLKACR         0xa4150008
 static void fsimck_init(struct clk *clk)
 {
-        u32 status = ctrl_inl(clk->enable_reg);
+        u32 status = __raw_readl(clk->enable_reg);
 
         /* use external clock */
         status &= ~0x000000ff;
         status |= 0x00000080;
-        ctrl_outl(status, clk->enable_reg);
+        __raw_writel(status, clk->enable_reg);
 }
 
 static struct clk_ops fsimck_clk_ops = {
@@ -522,7 +522,7 @@ static int __init sh_eth_is_eeprom_ready(void)
         int t = 10000;
 
         while (t--) {
-                if (!ctrl_inw(EEPROM_STAT))
+                if (!__raw_readw(EEPROM_STAT))
                         return 1;
                 cpu_relax();
         }
@@ -542,13 +542,13 @@ static void __init sh_eth_init(void)
 
         /* read MAC addr from EEPROM */
         for (i = 0 ; i < 3 ; i++) {
-                ctrl_outw(0x0, EEPROM_OP); /* read */
-                ctrl_outw(i*2, EEPROM_ADR);
-                ctrl_outw(0x1, EEPROM_STRT);
+                __raw_writew(0x0, EEPROM_OP); /* read */
+                __raw_writew(i*2, EEPROM_ADR);
+                __raw_writew(0x1, EEPROM_STRT);
                 if (!sh_eth_is_eeprom_ready())
                         return;
 
-                mac = ctrl_inw(EEPROM_DATA);
+                mac = __raw_readw(EEPROM_DATA);
                 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
                 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
         }
@@ -585,7 +585,7 @@ arch_initcall(arch_setup);
 
 static int __init devices_setup(void)
 {
-        u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
+        u16 sw = __raw_readw(SW4140); /* select camera, monitor */
         struct clk *fsia_clk;
 
         /* register board specific self-refresh code */
@@ -595,7 +595,7 @@ static int __init devices_setup(void)
                                         &ms7724se_sdram_leave_start,
                                         &ms7724se_sdram_leave_end);
         /* Reset Release */
-        ctrl_outw(ctrl_inw(FPGA_OUT) &
+        __raw_writew(__raw_readw(FPGA_OUT) &
                   ~((1 << 1)  | /* LAN */
                     (1 << 6)  | /* VIDEO DAC */
                     (1 << 7)  | /* AK4643 */
@@ -604,7 +604,7 @@ static int __init devices_setup(void)
                   FPGA_OUT);
 
         /* turn on USB clocks, use external clock */
-        ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
+        __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
 
 #ifdef CONFIG_PM
         /* Let LED9 show STATUS2 */
@@ -633,10 +633,10 @@ static int __init devices_setup(void)
 #endif
 
         /* enable USB0 port */
-        ctrl_outw(0x0600, 0xa40501d4);
+        __raw_writew(0x0600, 0xa40501d4);
 
         /* enable USB1 port */
-        ctrl_outw(0x0600, 0xa4050192);
+        __raw_writew(0x0600, 0xa4050192);
 
         /* enable IRQ 0,1,2 */
         gpio_request(GPIO_FN_INTC_IRQ0, NULL);
@@ -684,7 +684,7 @@ static int __init devices_setup(void)
         gpio_request(GPIO_FN_LCDVCPWC, NULL);
         gpio_request(GPIO_FN_LCDRD,    NULL);
         gpio_request(GPIO_FN_LCDLCLK,  NULL);
-        ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
+        __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
 
         /* enable CEU0 */
         gpio_request(GPIO_FN_VIO0_D15, NULL);
diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c
index 121744c08714..d5c9edc172a3 100644
--- a/arch/sh/boards/mach-se/7780/irq.c
+++ b/arch/sh/boards/mach-se/7780/irq.c
@@ -24,30 +24,30 @@
 void __init init_se7780_IRQ(void)
 {
         /* enable all interrupt at FPGA */
-        ctrl_outw(0, FPGA_INTMSK1);
+        __raw_writew(0, FPGA_INTMSK1);
         /* mask SM501 interrupt */
-        ctrl_outw((ctrl_inw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
+        __raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
         /* enable all interrupt at FPGA */
-        ctrl_outw(0, FPGA_INTMSK2);
+        __raw_writew(0, FPGA_INTMSK2);
 
         /* set FPGA INTSEL register */
         /* FPGA + 0x06 */
-        ctrl_outw( ((IRQPIN_SM501 << IRQPOS_SM501) |
+        __raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) |
                 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);
 
         /* FPGA + 0x08 */
-        ctrl_outw(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
+        __raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
                 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |
                 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |
                 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);
 
         /* FPGA + 0x0A */
-        ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
+        __raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
 
         plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
 
         /* ICR1: detect low level(for 2ndcut) */
-        ctrl_outl(0xAAAA0000, INTC_ICR1);
+        __raw_writel(0xAAAA0000, INTC_ICR1);
 
         /*
          * FPGA PCISEL register initialize
@@ -63,6 +63,6 @@ void __init init_se7780_IRQ(void)
          *  INTD || INTD  | INTC  |  --   | INTA
          *  -------------------------------------
          */
-        ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
-        ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
+        __raw_writew(0x0013, FPGA_PCI_INTSEL1);
+        __raw_writew(0xE402, FPGA_PCI_INTSEL2);
 }
diff --git a/arch/sh/boards/mach-se/7780/setup.c b/arch/sh/boards/mach-se/7780/setup.c
index f7bfb3f83692..6f7c207138e1 100644
--- a/arch/sh/boards/mach-se/7780/setup.c
+++ b/arch/sh/boards/mach-se/7780/setup.c
@@ -75,14 +75,14 @@ device_initcall(se7780_devices_setup);
 static void __init se7780_setup(char **cmdline_p)
 {
         /* "SH-Linux" on LED Display */
-        ctrl_outw( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) );
-        ctrl_outw( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) );
-        ctrl_outw( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) );
-        ctrl_outw( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) );
-        ctrl_outw( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) );
-        ctrl_outw( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) );
-        ctrl_outw( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) );
-        ctrl_outw( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) );
+        __raw_writew( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) );
+        __raw_writew( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) );
+        __raw_writew( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) );
+        __raw_writew( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) );
+        __raw_writew( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) );
+        __raw_writew( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) );
+        __raw_writew( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) );
+        __raw_writew( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) );
 
         printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n");
 
@@ -93,15 +93,15 @@ static void __init se7780_setup(char **cmdline_p)
          *   REQ2/GNT2 -> Serial ATA
          *   REQ3/GNT3 -> PCI slot
          */
-        ctrl_outw(0x0213, FPGA_REQSEL);
+        __raw_writew(0x0213, FPGA_REQSEL);
 
         /* GPIO setting */
-        ctrl_outw(0x0000, GPIO_PECR);
-        ctrl_outw(ctrl_inw(GPIO_PHCR)&0xfff3, GPIO_PHCR);
-        ctrl_outw(0x0c00, GPIO_PMSELR);
+        __raw_writew(0x0000, GPIO_PECR);
+        __raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR);
+        __raw_writew(0x0c00, GPIO_PMSELR);
 
         /* iVDR Power ON */
-        ctrl_outw(0x0001, FPGA_IVDRPW);
+        __raw_writew(0x0001, FPGA_IVDRPW);
 }
 
 /*
diff --git a/arch/sh/boards/mach-sh03/rtc.c b/arch/sh/boards/mach-sh03/rtc.c
index a8b9f844ab5b..1b200990500c 100644
--- a/arch/sh/boards/mach-sh03/rtc.c
+++ b/arch/sh/boards/mach-sh03/rtc.c
@@ -44,15 +44,15 @@ unsigned long get_cmos_time(void)
         spin_lock(&sh03_rtc_lock);
  again:
         do {
-                sec  = (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10;
-                min  = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10;
-                hour = (ctrl_inb(RTC_HOU1) & 0xf) + (ctrl_inb(RTC_HOU10) & 0xf) * 10;
-                day  = (ctrl_inb(RTC_DAY1) & 0xf) + (ctrl_inb(RTC_DAY10) & 0xf) * 10;
-                mon  = (ctrl_inb(RTC_MON1) & 0xf) + (ctrl_inb(RTC_MON10) & 0xf) * 10;
-                year = (ctrl_inb(RTC_YEA1) & 0xf) + (ctrl_inb(RTC_YEA10) & 0xf) * 10
-                     + (ctrl_inb(RTC_YEA100 ) & 0xf) * 100
-                     + (ctrl_inb(RTC_YEA1000) & 0xf) * 1000;
-        } while (sec != (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10);
+                sec  = (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10;
+                min  = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10;
+                hour = (__raw_readb(RTC_HOU1) & 0xf) + (__raw_readb(RTC_HOU10) & 0xf) * 10;
+                day  = (__raw_readb(RTC_DAY1) & 0xf) + (__raw_readb(RTC_DAY10) & 0xf) * 10;
+                mon  = (__raw_readb(RTC_MON1) & 0xf) + (__raw_readb(RTC_MON10) & 0xf) * 10;
+                year = (__raw_readb(RTC_YEA1) & 0xf) + (__raw_readb(RTC_YEA10) & 0xf) * 10
+                     + (__raw_readb(RTC_YEA100 ) & 0xf) * 100
+                     + (__raw_readb(RTC_YEA1000) & 0xf) * 1000;
+        } while (sec != (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10);
         if (year == 0 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
             hour > 23 || min > 59 || sec > 59) {
                 printk(KERN_ERR
@@ -60,16 +60,16 @@ unsigned long get_cmos_time(void)
                 printk("year=%d, mon=%d, day=%d, hour=%d, min=%d, sec=%d\n",
                        year, mon, day, hour, min, sec);
 
-                ctrl_outb(0, RTC_SEC1); ctrl_outb(0, RTC_SEC10);
-                ctrl_outb(0, RTC_MIN1); ctrl_outb(0, RTC_MIN10);
-                ctrl_outb(0, RTC_HOU1); ctrl_outb(0, RTC_HOU10);
-                ctrl_outb(6, RTC_WEE1);
-                ctrl_outb(1, RTC_DAY1); ctrl_outb(0, RTC_DAY10);
-                ctrl_outb(1, RTC_MON1); ctrl_outb(0, RTC_MON10);
-                ctrl_outb(0, RTC_YEA1); ctrl_outb(0, RTC_YEA10);
-                ctrl_outb(0, RTC_YEA100);
-                ctrl_outb(2, RTC_YEA1000);
-                ctrl_outb(0, RTC_CTL);
+                __raw_writeb(0, RTC_SEC1); __raw_writeb(0, RTC_SEC10);
+                __raw_writeb(0, RTC_MIN1); __raw_writeb(0, RTC_MIN10);
+                __raw_writeb(0, RTC_HOU1); __raw_writeb(0, RTC_HOU10);
+                __raw_writeb(6, RTC_WEE1);
+                __raw_writeb(1, RTC_DAY1); __raw_writeb(0, RTC_DAY10);
+                __raw_writeb(1, RTC_MON1); __raw_writeb(0, RTC_MON10);
+                __raw_writeb(0, RTC_YEA1); __raw_writeb(0, RTC_YEA10);
+                __raw_writeb(0, RTC_YEA100);
+                __raw_writeb(2, RTC_YEA1000);
+                __raw_writeb(0, RTC_CTL);
                 goto again;
         }
 
@@ -93,9 +93,9 @@ static int set_rtc_mmss(unsigned long nowtime)
         /* gets recalled with irq locally disabled */
         spin_lock(&sh03_rtc_lock);
         for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
-                if (!(ctrl_inb(RTC_CTL) & RTC_BUSY))
+                if (!(__raw_readb(RTC_CTL) & RTC_BUSY))
                         break;
-        cmos_minutes = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10;
+        cmos_minutes = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10;
         real_seconds = nowtime % 60;
         real_minutes = nowtime / 60;
         if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
@@ -103,10 +103,10 @@ static int set_rtc_mmss(unsigned long nowtime)
         real_minutes %= 60;
 
         if (abs(real_minutes - cmos_minutes) < 30) {
-                ctrl_outb(real_seconds % 10, RTC_SEC1);
-                ctrl_outb(real_seconds / 10, RTC_SEC10);
-                ctrl_outb(real_minutes % 10, RTC_MIN1);
-                ctrl_outb(real_minutes / 10, RTC_MIN10);
+                __raw_writeb(real_seconds % 10, RTC_SEC1);
+                __raw_writeb(real_seconds / 10, RTC_SEC10);
+                __raw_writeb(real_minutes % 10, RTC_MIN1);
+                __raw_writeb(real_minutes / 10, RTC_MIN10);
         } else {
                 printk(KERN_WARNING
                        "set_rtc_mmss: can't update from %d to %d\n",
diff --git a/arch/sh/boards/mach-sh7763rdp/irq.c b/arch/sh/boards/mach-sh7763rdp/irq.c
index d8ebfa7d8c76..add698c8f2b4 100644
--- a/arch/sh/boards/mach-sh7763rdp/irq.c
+++ b/arch/sh/boards/mach-sh7763rdp/irq.c
@@ -28,18 +28,18 @@
 void __init init_sh7763rdp_IRQ(void)
 {
         /* GPIO enabled */
-        ctrl_outl(1 << 25, INTC_INT2MSKCR);
+        __raw_writel(1 << 25, INTC_INT2MSKCR);
 
         /* enable GPIO interrupts */
-        ctrl_outl((ctrl_inl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000,
+        __raw_writel((__raw_readl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000,
                   INTC_INT2PRI7);
 
         /* USBH enabled */
-        ctrl_outl(1 << 17, INTC_INT2MSKCR1);
+        __raw_writel(1 << 17, INTC_INT2MSKCR1);
 
         /* GETHER enabled */
-        ctrl_outl(1 << 16, INTC_INT2MSKCR1);
+        __raw_writel(1 << 16, INTC_INT2MSKCR1);
 
         /* DMAC enabled */
-        ctrl_outl(1 << 8, INTC_INT2MSKCR);
+        __raw_writel(1 << 8, INTC_INT2MSKCR);
 }
diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
index 390534a0b35c..f64a6918224c 100644
--- a/arch/sh/boards/mach-sh7763rdp/setup.c
+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
@@ -158,50 +158,50 @@ device_initcall(sh7763rdp_devices_setup);
 static void __init sh7763rdp_setup(char **cmdline_p)
 {
         /* Board version check */
-        if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
+        if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
                 printk(KERN_INFO "RTE Standard Configuration\n");
         else
                 printk(KERN_INFO "RTA Standard Configuration\n");
 
         /* USB pin select bits (clear bit 5-2 to 0) */
-        ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
+        __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
         /* USBH setup port I controls to other (clear bits 4-9 to 0) */
-        ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR);
+        __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR);
 
         /* Select USB Host controller */
-        ctrl_outw(0x00, USB_USBHSC);
+        __raw_writew(0x00, USB_USBHSC);
 
         /* For LCD */
         /* set PTJ7-1, bits 15-2 of PJCR to 0 */
-        ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR);
+        __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR);
         /* set PTI5, bits 11-10 of PICR to 0 */
-        ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR);
-        ctrl_outw(0, PORT_PKCR);
-        ctrl_outw(0, PORT_PLCR);
+        __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR);
+        __raw_writew(0, PORT_PKCR);
+        __raw_writew(0, PORT_PLCR);
         /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
-        ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
+        __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
         /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
-        ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
+        __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
 
         /* For HAC */
         /* bit3-0  0100:HAC & SSI1 enable */
-        ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
+        __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
         /* bit14      1:SSI_HAC_CLK enable */
-        ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
+        __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
 
         /* SH-Ether */
-        ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
-        ctrl_outw(0x0, PORT_PFCR);
-        ctrl_outw(0x0, PORT_PFCR);
-        ctrl_outw(0x0, PORT_PFCR);
+        __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
+        __raw_writew(0x0, PORT_PFCR);
+        __raw_writew(0x0, PORT_PFCR);
+        __raw_writew(0x0, PORT_PFCR);
 
         /* MMC */
         /*selects SCIF and MMC other functions */
-        ctrl_outw(0x0001, PORT_PSEL0);
+        __raw_writew(0x0001, PORT_PSEL0);
         /* MMC clock operates */
-        ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1);
-        ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR);
-        ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
+        __raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1);
+        __raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR);
+        __raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
 }
 
 static struct sh_machine_vector mv_sh7763rdp __initmv = {
diff --git a/arch/sh/boards/mach-snapgear/setup.c b/arch/sh/boards/mach-snapgear/setup.c
index a3277a23cf14..331745dee379 100644
--- a/arch/sh/boards/mach-snapgear/setup.c
+++ b/arch/sh/boards/mach-snapgear/setup.c
@@ -30,7 +30,7 @@
 
 static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
 {
-        (void)ctrl_inb(0xb8000000);     /* dummy read */
+        (void)__raw_readb(0xb8000000);  /* dummy read */
 
         printk("SnapGear: erase switch interrupt!\n");
 
diff --git a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c
index 986a0e71d220..523aea5dc94e 100644
--- a/arch/sh/boards/mach-systemh/irq.c
+++ b/arch/sh/boards/mach-systemh/irq.c
@@ -41,13 +41,13 @@ static void disable_systemh_irq(unsigned int irq)
                 unsigned long val, mask = 0x01 << 1;
 
                 /* Clear the "irq"th bit in the mask and set it in the request */
-                val = ctrl_inl((unsigned long)systemh_irq_mask_register);
+                val = __raw_readl((unsigned long)systemh_irq_mask_register);
                 val &= ~mask;
-                ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
+                __raw_writel(val, (unsigned long)systemh_irq_mask_register);
 
-                val = ctrl_inl((unsigned long)systemh_irq_request_register);
+                val = __raw_readl((unsigned long)systemh_irq_request_register);
                 val |= mask;
-                ctrl_outl(val, (unsigned long)systemh_irq_request_register);
+                __raw_writel(val, (unsigned long)systemh_irq_request_register);
         }
 }
 
@@ -57,9 +57,9 @@ static void enable_systemh_irq(unsigned int irq)
                 unsigned long val, mask = 0x01 << 1;
 
                 /* Set "irq"th bit in the mask register */
-                val = ctrl_inl((unsigned long)systemh_irq_mask_register);
+                val = __raw_readl((unsigned long)systemh_irq_mask_register);
                 val |= mask;
-                ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
+                __raw_writel(val, (unsigned long)systemh_irq_mask_register);
         }
 }
 
diff --git a/arch/sh/boards/mach-titan/io.c b/arch/sh/boards/mach-titan/io.c
index 0130e9826aca..29754c5091f0 100644
--- a/arch/sh/boards/mach-titan/io.c
+++ b/arch/sh/boards/mach-titan/io.c
@@ -16,8 +16,8 @@ static inline unsigned int port2adr(unsigned int port)
 u8 titan_inb(unsigned long port)
 {
         if (PXSEG(port))
-                return ctrl_inb(port);
-        return ctrl_inw(port2adr(port)) & 0xff;
+                return __raw_readb(port);
+        return __raw_readw(port2adr(port)) & 0xff;
 }
 
 u8 titan_inb_p(unsigned long port)
@@ -25,9 +25,9 @@ u8 titan_inb_p(unsigned long port)
         u8 v;
 
         if (PXSEG(port))
-                v = ctrl_inb(port);
+                v = __raw_readb(port);
         else
-                v = ctrl_inw(port2adr(port)) & 0xff;
+                v = __raw_readw(port2adr(port)) & 0xff;
         ctrl_delay();
         return v;
 }
@@ -35,9 +35,9 @@ u8 titan_inb_p(unsigned long port)
 u16 titan_inw(unsigned long port)
 {
         if (PXSEG(port))
-                return ctrl_inw(port);
+                return __raw_readw(port);
         else if (port >= 0x2000)
-                return ctrl_inw(port2adr(port));
+                return __raw_readw(port2adr(port));
         else
                 maybebadio(port);
         return 0;
@@ -46,9 +46,9 @@ u16 titan_inw(unsigned long port)
 u32 titan_inl(unsigned long port)
 {
         if (PXSEG(port))
-                return ctrl_inl(port);
+                return __raw_readl(port);
         else if (port >= 0x2000)
-                return ctrl_inw(port2adr(port));
+                return __raw_readw(port2adr(port));
         else
                 maybebadio(port);
         return 0;
@@ -57,26 +57,26 @@ u32 titan_inl(unsigned long port)
 void titan_outb(u8 value, unsigned long port)
 {
         if (PXSEG(port))
-                ctrl_outb(value, port);
+                __raw_writeb(value, port);
         else
-                ctrl_outw(value, port2adr(port));
+                __raw_writew(value, port2adr(port));
 }
 
 void titan_outb_p(u8 value, unsigned long port)
 {
         if (PXSEG(port))
-                ctrl_outb(value, port);
+                __raw_writeb(value, port);
         else
-                ctrl_outw(value, port2adr(port));
+                __raw_writew(value, port2adr(port));
         ctrl_delay();
 }
 
 void titan_outw(u16 value, unsigned long port)
 {
         if (PXSEG(port))
-                ctrl_outw(value, port);
+                __raw_writew(value, port);
         else if (port >= 0x2000)
-                ctrl_outw(value, port2adr(port));
+                __raw_writew(value, port2adr(port));
         else
                 maybebadio(port);
 }
@@ -84,7 +84,7 @@ void titan_outw(u16 value, unsigned long port)
 void titan_outl(u32 value, unsigned long port)
 {
         if (PXSEG(port))
-                ctrl_outl(value, port);
+                __raw_writel(value, port);
         else
                 maybebadio(port);
 }
diff --git a/arch/sh/boards/mach-x3proto/ilsel.c b/arch/sh/boards/mach-x3proto/ilsel.c
index b5c673c39337..5c9842704c60 100644
--- a/arch/sh/boards/mach-x3proto/ilsel.c
+++ b/arch/sh/boards/mach-x3proto/ilsel.c
@@ -70,10 +70,10 @@ static void __ilsel_enable(ilsel_source_t set, unsigned int bit)
         pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n",
                  __func__, bit, addr, shift, set);
 
-        tmp = ctrl_inw(addr);
+        tmp = __raw_readw(addr);
         tmp &= ~(0xf << shift);
         tmp |= set << shift;
-        ctrl_outw(tmp, addr);
+        __raw_writew(tmp, addr);
 }
 
 /**
@@ -142,9 +142,9 @@ void ilsel_disable(unsigned int irq)
 
         addr = mk_ilsel_addr(irq);
 
-        tmp = ctrl_inw(addr);
+        tmp = __raw_readw(addr);
         tmp &= ~(0xf << mk_ilsel_shift(irq));
-        ctrl_outw(tmp, addr);
+        __raw_writew(tmp, addr);
 
         clear_bit(irq, &ilsel_level_map);
 }
diff --git a/arch/sh/boards/mach-x3proto/setup.c b/arch/sh/boards/mach-x3proto/setup.c
index efe4cb9f8a77..e284592fd42a 100644
--- a/arch/sh/boards/mach-x3proto/setup.c
+++ b/arch/sh/boards/mach-x3proto/setup.c
@@ -149,7 +149,7 @@ static void __init x3proto_init_irq(void)
         plat_irq_setup_pins(IRQ_MODE_IRL3210);
 
         /* Set ICR0.LVLMODE */
-        ctrl_outl(ctrl_inl(0xfe410000) | (1 << 21), 0xfe410000);
+        __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000);
 }
 
 static struct sh_machine_vector mv_x3proto __initmv = {
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index 50aa0c1f76ea..cbfedfb42e04 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -55,7 +55,7 @@ static struct irq_chip hd64461_irq_chip = {
 
 static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
-        unsigned short intv = ctrl_inw(HD64461_NIRR);
+        unsigned short intv = __raw_readw(HD64461_NIRR);
         struct irq_desc *ext_desc;
         unsigned int ext_irq = HD64461_IRQBASE;
 
diff --git a/arch/sh/drivers/dma/dma-pvr2.c b/arch/sh/drivers/dma/dma-pvr2.c
index 391cbe1c2956..3cee58e7f1e5 100644
--- a/arch/sh/drivers/dma/dma-pvr2.c
+++ b/arch/sh/drivers/dma/dma-pvr2.c
@@ -40,10 +40,10 @@ static irqreturn_t pvr2_dma_interrupt(int irq, void *dev_id)
 
 static int pvr2_request_dma(struct dma_channel *chan)
 {
-        if (ctrl_inl(PVR2_DMA_MODE) != 0)
+        if (__raw_readl(PVR2_DMA_MODE) != 0)
                 return -EBUSY;
 
-        ctrl_outl(0, PVR2_DMA_LMMODE0);
+        __raw_writel(0, PVR2_DMA_LMMODE0);
 
         return 0;
 }
@@ -60,9 +60,9 @@ static int pvr2_xfer_dma(struct dma_channel *chan)
 
         xfer_complete = 0;
 
-        ctrl_outl(chan->dar, PVR2_DMA_ADDR);
-        ctrl_outl(chan->count, PVR2_DMA_COUNT);
-        ctrl_outl(chan->mode & DMA_MODE_MASK, PVR2_DMA_MODE);
+        __raw_writel(chan->dar, PVR2_DMA_ADDR);
+        __raw_writel(chan->count, PVR2_DMA_COUNT);
+        __raw_writel(chan->mode & DMA_MODE_MASK, PVR2_DMA_MODE);
 
         return 0;
 }
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index 37fb5b8bbc3f..565cc1a4cbba 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -54,7 +54,7 @@ static inline unsigned int get_dmte_irq(unsigned int chan)
  */
 static inline unsigned int calc_xmit_shift(struct dma_channel *chan)
 {
-        u32 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
+        u32 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
 
         return ts_shift[(chcr & CHCR_TS_MASK)>>CHCR_TS_SHIFT];
 }
@@ -70,13 +70,13 @@ static irqreturn_t dma_tei(int irq, void *dev_id)
         struct dma_channel *chan = dev_id;
         u32 chcr;
 
-        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
+        chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
 
         if (!(chcr & CHCR_TE))
                 return IRQ_NONE;
 
         chcr &= ~(CHCR_IE | CHCR_DE);
-        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         wake_up(&chan->wait_queue);
 
@@ -115,7 +115,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
                 chan->flags &= ~DMA_TEI_CAPABLE;
         }
 
-        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         chan->flags |= DMA_CONFIGURED;
         return 0;
@@ -126,13 +126,13 @@ static void sh_dmac_enable_dma(struct dma_channel *chan)
         int irq;
         u32 chcr;
 
-        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
+        chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
         chcr |= CHCR_DE;
 
         if (chan->flags & DMA_TEI_CAPABLE)
                 chcr |= CHCR_IE;
 
-        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         if (chan->flags & DMA_TEI_CAPABLE) {
                 irq = get_dmte_irq(chan->chan);
@@ -150,9 +150,9 @@ static void sh_dmac_disable_dma(struct dma_channel *chan)
                 disable_irq(irq);
         }
 
-        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
+        chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
         chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
-        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 }
 
 static int sh_dmac_xfer_dma(struct dma_channel *chan)
@@ -183,12 +183,12 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
          */
         if (chan->sar || (mach_is_dreamcast() &&
                           chan->chan == PVR2_CASCADE_CHAN))
-                ctrl_outl(chan->sar, (dma_base_addr[chan->chan]+SAR));
+                __raw_writel(chan->sar, (dma_base_addr[chan->chan]+SAR));
         if (chan->dar || (mach_is_dreamcast() &&
                           chan->chan == PVR2_CASCADE_CHAN))
-                ctrl_outl(chan->dar, (dma_base_addr[chan->chan] + DAR));
+                __raw_writel(chan->dar, (dma_base_addr[chan->chan] + DAR));
 
-        ctrl_outl(chan->count >> calc_xmit_shift(chan),
+        __raw_writel(chan->count >> calc_xmit_shift(chan),
                 (dma_base_addr[chan->chan] + TCR));
 
         sh_dmac_enable_dma(chan);
@@ -198,10 +198,10 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
 
 static int sh_dmac_get_dma_residue(struct dma_channel *chan)
 {
-        if (!(ctrl_inl(dma_base_addr[chan->chan] + CHCR) & CHCR_DE))
+        if (!(__raw_readl(dma_base_addr[chan->chan] + CHCR) & CHCR_DE))
                 return 0;
 
-        return ctrl_inl(dma_base_addr[chan->chan] + TCR)
+        return __raw_readl(dma_base_addr[chan->chan] + TCR)
                  << calc_xmit_shift(chan);
 }
 
diff --git a/arch/sh/drivers/dma/dmabrg.c b/arch/sh/drivers/dma/dmabrg.c
index 5e22689c2fcf..72622e307613 100644
--- a/arch/sh/drivers/dma/dmabrg.c
+++ b/arch/sh/drivers/dma/dmabrg.c
@@ -86,8 +86,8 @@ static irqreturn_t dmabrg_irq(int irq, void *data)
         unsigned long dcr;
         unsigned int i;
 
-        dcr = ctrl_inl(DMABRGCR);
-        ctrl_outl(dcr & ~0x00ff0003, DMABRGCR); /* ack all */
+        dcr = __raw_readl(DMABRGCR);
+        __raw_writel(dcr & ~0x00ff0003, DMABRGCR);      /* ack all */
         dcr &= dcr >> 8;        /* ignore masked */
 
         /* USB stuff, get it out of the way first */
@@ -109,17 +109,17 @@ static irqreturn_t dmabrg_irq(int irq, void *data)
 static void dmabrg_disable_irq(unsigned int dmairq)
 {
         unsigned long dcr;
-        dcr = ctrl_inl(DMABRGCR);
+        dcr = __raw_readl(DMABRGCR);
         dcr &= ~(1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8));
-        ctrl_outl(dcr, DMABRGCR);
+        __raw_writel(dcr, DMABRGCR);
 }
 
 static void dmabrg_enable_irq(unsigned int dmairq)
 {
         unsigned long dcr;
-        dcr = ctrl_inl(DMABRGCR);
+        dcr = __raw_readl(DMABRGCR);
         dcr |= (1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8));
-        ctrl_outl(dcr, DMABRGCR);
+        __raw_writel(dcr, DMABRGCR);
 }
 
 int dmabrg_request_irq(unsigned int dmairq, void(*handler)(void*),
@@ -165,13 +165,13 @@ static int __init dmabrg_init(void)
                 printk(KERN_INFO "DMABRG: DMAC ch0 not reserved!\n");
 #endif
 
-        ctrl_outl(0, DMABRGCR);
-        ctrl_outl(0, DMACHCR0);
-        ctrl_outl(0x94000000, DMARSRA); /* enable DMABRG in DMAC 0 */
+        __raw_writel(0, DMABRGCR);
+        __raw_writel(0, DMACHCR0);
+        __raw_writel(0x94000000, DMARSRA);      /* enable DMABRG in DMAC 0 */
 
         /* enable DMABRG mode, enable the DMAC */
-        or = ctrl_inl(DMAOR);
-        ctrl_outl(or | DMAOR_BRG | DMAOR_DMEN, DMAOR);
+        or = __raw_readl(DMAOR);
+        __raw_writel(or | DMAOR_BRG | DMAOR_DMEN, DMAOR);
 
         ret = request_irq(DMABRGI0, dmabrg_irq, IRQF_DISABLED,
                         "DMABRG USB address error", NULL);
diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c
index 7898f14d6641..e248516118a9 100644
--- a/arch/sh/drivers/pci/fixups-rts7751r2d.c
+++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c
@@ -43,7 +43,7 @@ int pci_fixup_pcic(struct pci_channel *chan)
 {
         unsigned long bcr1, mcr;
 
-        bcr1 = ctrl_inl(SH7751_BCR1);
+        bcr1 = __raw_readl(SH7751_BCR1);
         bcr1 |= 0x40080000;     /* Enable Bit 19 BREQEN, set PCIC to slave */
         pci_write_reg(chan, bcr1, SH4_PCIBCR1);
 
@@ -54,7 +54,7 @@ int pci_fixup_pcic(struct pci_channel *chan)
         pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1);
         pci_write_reg(chan, 0xab000001, SH7751_PCICONF4);
 
-        mcr = ctrl_inl(SH7751_MCR);
+        mcr = __raw_readl(SH7751_MCR);
         mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
         pci_write_reg(chan, mcr, SH4_PCIMCR);
 
diff --git a/arch/sh/drivers/pci/pci-sh4.h b/arch/sh/drivers/pci/pci-sh4.h
index 3d5296cde622..4744a7dede0c 100644
--- a/arch/sh/drivers/pci/pci-sh4.h
+++ b/arch/sh/drivers/pci/pci-sh4.h
@@ -167,13 +167,13 @@ struct sh4_pci_address_map {
 static inline void pci_write_reg(struct pci_channel *chan,
                                  unsigned long val, unsigned long reg)
 {
-        ctrl_outl(val, chan->reg_base + reg);
+        __raw_writel(val, chan->reg_base + reg);
 }
 
 static inline unsigned long pci_read_reg(struct pci_channel *chan,
                                          unsigned long reg)
 {
-        return ctrl_inl(chan->reg_base + reg);
+        return __raw_readl(chan->reg_base + reg);
 }
 
 #endif /* __PCI_SH4_H */
diff --git a/arch/sh/drivers/pci/pci-sh5.h b/arch/sh/drivers/pci/pci-sh5.h
index f277628221f3..3f01decb4307 100644
--- a/arch/sh/drivers/pci/pci-sh5.h
+++ b/arch/sh/drivers/pci/pci-sh5.h
@@ -86,14 +86,14 @@ extern unsigned long pcicr_virt;
 /* #define PCISH5_VCR_REG(x)                ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */
 
 /* Write I/O functions */
-#define SH5PCI_WRITE(reg,val)        ctrl_outl((u32)(val),PCISH5_ICR_REG(reg))
-#define SH5PCI_WRITE_SHORT(reg,val)  ctrl_outw((u16)(val),PCISH5_ICR_REG(reg))
-#define SH5PCI_WRITE_BYTE(reg,val)   ctrl_outb((u8)(val),PCISH5_ICR_REG(reg))
+#define SH5PCI_WRITE(reg,val)        __raw_writel((u32)(val),PCISH5_ICR_REG(reg))
+#define SH5PCI_WRITE_SHORT(reg,val)  __raw_writew((u16)(val),PCISH5_ICR_REG(reg))
+#define SH5PCI_WRITE_BYTE(reg,val)   __raw_writeb((u8)(val),PCISH5_ICR_REG(reg))
 
 /* Read I/O functions */
-#define SH5PCI_READ(reg)             ctrl_inl(PCISH5_ICR_REG(reg))
-#define SH5PCI_READ_SHORT(reg)       ctrl_inw(PCISH5_ICR_REG(reg))
-#define SH5PCI_READ_BYTE(reg)        ctrl_inb(PCISH5_ICR_REG(reg))
+#define SH5PCI_READ(reg)             __raw_readl(PCISH5_ICR_REG(reg))
+#define SH5PCI_READ_SHORT(reg)       __raw_readw(PCISH5_ICR_REG(reg))
+#define SH5PCI_READ_BYTE(reg)        __raw_readb(PCISH5_ICR_REG(reg))
 
 /* Set PCI config bits */
 #define SET_CONFIG_BITS(bus,devfn,where)  ((((bus) << 16) | ((devfn) << 8) | ((where) & ~3)) | 0x80000000)
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index 70c1999a0ec4..2455cf32db5a 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -97,9 +97,9 @@ static int __init sh7751_pci_init(void)
                 return ret;
 
         /* Set the BCR's to enable PCI access */
-        reg = ctrl_inl(SH7751_BCR1);
+        reg = __raw_readl(SH7751_BCR1);
         reg |= 0x80000;
-        ctrl_outl(reg, SH7751_BCR1);
+        __raw_writel(reg, SH7751_BCR1);
 
         /* Turn the clocks back on (not done in reset)*/
         pci_write_reg(chan, 0, SH4_PCICLKR);
@@ -159,13 +159,13 @@ static int __init sh7751_pci_init(void)
                 return -1;
 
         /* configure the wait control registers */
-        word = ctrl_inl(SH7751_WCR1);
+        word = __raw_readl(SH7751_WCR1);
         pci_write_reg(chan, word, SH4_PCIWCR1);
-        word = ctrl_inl(SH7751_WCR2);
+        word = __raw_readl(SH7751_WCR2);
         pci_write_reg(chan, word, SH4_PCIWCR2);
-        word = ctrl_inl(SH7751_WCR3);
+        word = __raw_readl(SH7751_WCR3);
         pci_write_reg(chan, word, SH4_PCIWCR3);
-        word = ctrl_inl(SH7751_MCR);
+        word = __raw_readl(SH7751_MCR);
         pci_write_reg(chan, word, SH4_PCIMCR);
 
         /* NOTE: I'm ignoring the PCI error IRQs for now..
diff --git a/arch/sh/drivers/superhyway/ops-sh4-202.c b/arch/sh/drivers/superhyway/ops-sh4-202.c
index 3b14bf860db6..6da62e9475c4 100644
--- a/arch/sh/drivers/superhyway/ops-sh4-202.c
+++ b/arch/sh/drivers/superhyway/ops-sh4-202.c
@@ -134,8 +134,8 @@ static int sh4202_read_vcr(unsigned long base, struct superhyway_vcr_info *vcr)
          *
          * Do not trust the documentation, for it is evil.
          */
-        vcrh = ctrl_inl(base);
-        vcrl = ctrl_inl(base + sizeof(u32));
+        vcrh = __raw_readl(base);
+        vcrl = __raw_readl(base + sizeof(u32));
 
         tmp = ((u64)vcrh << 32) | vcrl;
         memcpy(vcr, &tmp, sizeof(u64));
@@ -147,8 +147,8 @@ static int sh4202_write_vcr(unsigned long base, struct superhyway_vcr_info vcr)
 {
         u64 tmp = *(u64 *)&vcr;
 
-        ctrl_outl((tmp >> 32) & 0xffffffff, base);
-        ctrl_outl(tmp & 0xffffffff, base + sizeof(u32));
+        __raw_writel((tmp >> 32) & 0xffffffff, base);
+        __raw_writel(tmp & 0xffffffff, base + sizeof(u32));
 
         return 0;
 }
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
index 78eed3e0bdf5..47de10976991 100644
--- a/arch/sh/include/asm/dma-sh.h
+++ b/arch/sh/include/asm/dma-sh.h
@@ -20,14 +20,14 @@
     defined(CONFIG_CPU_SUBTYPE_SH7780)  || \
     defined(CONFIG_CPU_SUBTYPE_SH7785)
 #define dmaor_read_reg(n) \
-    (n ? ctrl_inw(SH_DMAC_BASE1 + DMAOR) \
-        : ctrl_inw(SH_DMAC_BASE0 + DMAOR))
+    (n ? __raw_readw(SH_DMAC_BASE1 + DMAOR) \
+        : __raw_readw(SH_DMAC_BASE0 + DMAOR))
 #define dmaor_write_reg(n, data) \
-    (n ? ctrl_outw(data, SH_DMAC_BASE1 + DMAOR) \
-    : ctrl_outw(data, SH_DMAC_BASE0 + DMAOR))
+    (n ? __raw_writew(data, SH_DMAC_BASE1 + DMAOR) \
+    : __raw_writew(data, SH_DMAC_BASE0 + DMAOR))
 #else /* Other CPU */
-#define dmaor_read_reg(n) ctrl_inw(SH_DMAC_BASE0 + DMAOR)
-#define dmaor_write_reg(n, data) ctrl_outw(data, SH_DMAC_BASE0 + DMAOR)
+#define dmaor_read_reg(n) __raw_readw(SH_DMAC_BASE0 + DMAOR)
+#define dmaor_write_reg(n, data) __raw_writew(data, SH_DMAC_BASE0 + DMAOR)
 #endif
 
 static int dmte_irq_map[] __maybe_unused = {
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index 41080b173a7a..384c7471a374 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -158,7 +158,7 @@ static inline void enable_mmu(void)
         unsigned int cpu = smp_processor_id();
 
         /* Enable MMU */
-        ctrl_outl(MMU_CONTROL_INIT, MMUCR);
+        __raw_writel(MMU_CONTROL_INIT, MMUCR);
         ctrl_barrier();
 
         if (asid_cache(cpu) == NO_CONTEXT)
@@ -171,9 +171,9 @@ static inline void disable_mmu(void)
 {
         unsigned long cr;
 
-        cr = ctrl_inl(MMUCR);
+        cr = __raw_readl(MMUCR);
         cr &= ~MMU_CONTROL_INIT;
-        ctrl_outl(cr, MMUCR);
+        __raw_writel(cr, MMUCR);
 
         ctrl_barrier();
 }
diff --git a/arch/sh/include/asm/mmu_context_32.h b/arch/sh/include/asm/mmu_context_32.h
index 8ef800c549ab..10e2e17210d2 100644
--- a/arch/sh/include/asm/mmu_context_32.h
+++ b/arch/sh/include/asm/mmu_context_32.h
@@ -49,11 +49,11 @@ static inline unsigned long get_asid(void)
 /* MMU_TTB is used for optimizing the fault handling. */
 static inline void set_TTB(pgd_t *pgd)
 {
-        ctrl_outl((unsigned long)pgd, MMU_TTB);
+        __raw_writel((unsigned long)pgd, MMU_TTB);
 }
 
 static inline pgd_t *get_TTB(void)
 {
-        return (pgd_t *)ctrl_inl(MMU_TTB);
+        return (pgd_t *)__raw_readl(MMU_TTB);
 }
 #endif /* __ASM_SH_MMU_CONTEXT_32_H */
diff --git a/arch/sh/include/asm/watchdog.h b/arch/sh/include/asm/watchdog.h
index 19dfff5c8511..85a7aca7fb8f 100644
--- a/arch/sh/include/asm/watchdog.h
+++ b/arch/sh/include/asm/watchdog.h
@@ -70,7 +70,7 @@
  */
 static inline __u32 sh_wdt_read_cnt(void)
 {
-        return ctrl_inl(WTCNT_R);
+        return __raw_readl(WTCNT_R);
 }
 
 /**
@@ -82,7 +82,7 @@ static inline __u32 sh_wdt_read_cnt(void)
  */
 static inline void sh_wdt_write_cnt(__u32 val)
 {
-        ctrl_outl((WTCNT_HIGH << 24) | (__u32)val, WTCNT);
+        __raw_writel((WTCNT_HIGH << 24) | (__u32)val, WTCNT);
 }
 
 /**
@@ -94,7 +94,7 @@ static inline void sh_wdt_write_cnt(__u32 val)
  */
 static inline void sh_wdt_write_bst(__u32 val)
 {
-        ctrl_outl((WTBST_HIGH << 24) | (__u32)val, WTBST);
+        __raw_writel((WTBST_HIGH << 24) | (__u32)val, WTBST);
 }
 /**
  *      sh_wdt_read_csr - Read from Control/Status Register
@@ -103,7 +103,7 @@ static inline void sh_wdt_write_bst(__u32 val)
  */
 static inline __u32 sh_wdt_read_csr(void)
 {
-        return ctrl_inl(WTCSR_R);
+        return __raw_readl(WTCSR_R);
 }
 
 /**
@@ -115,7 +115,7 @@ static inline __u32 sh_wdt_read_csr(void)
  */
 static inline void sh_wdt_write_csr(__u32 val)
 {
-        ctrl_outl((WTCSR_HIGH << 24) | (__u32)val, WTCSR);
+        __raw_writel((WTCSR_HIGH << 24) | (__u32)val, WTCSR);
 }
 #else
 /**
@@ -124,7 +124,7 @@ static inline void sh_wdt_write_csr(__u32 val)
  */
 static inline __u8 sh_wdt_read_cnt(void)
 {
-        return ctrl_inb(WTCNT_R);
+        return __raw_readb(WTCNT_R);
 }
 
 /**
@@ -136,7 +136,7 @@ static inline __u8 sh_wdt_read_cnt(void)
  */
 static inline void sh_wdt_write_cnt(__u8 val)
 {
-        ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, WTCNT);
+        __raw_writew((WTCNT_HIGH << 8) | (__u16)val, WTCNT);
 }
 
 /**
@@ -146,7 +146,7 @@ static inline void sh_wdt_write_cnt(__u8 val)
  */
 static inline __u8 sh_wdt_read_csr(void)
 {
-        return ctrl_inb(WTCSR_R);
+        return __raw_readb(WTCSR_R);
 }
 
 /**
@@ -158,7 +158,7 @@ static inline __u8 sh_wdt_read_csr(void)
  */
 static inline void sh_wdt_write_csr(__u8 val)
 {
-        ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR);
+        __raw_writew((WTCSR_HIGH << 8) | (__u16)val, WTCSR);
 }
 #endif /* CONFIG_CPU_SUBTYPE_SH7785 || CONFIG_CPU_SUBTYPE_SH7780 */
 #endif /* __KERNEL__ */
diff --git a/arch/sh/include/cpu-sh2/cpu/watchdog.h b/arch/sh/include/cpu-sh2/cpu/watchdog.h
index 393161c9c6d0..1eab8aa63a6d 100644
--- a/arch/sh/include/cpu-sh2/cpu/watchdog.h
+++ b/arch/sh/include/cpu-sh2/cpu/watchdog.h
@@ -44,7 +44,7 @@ static inline __u8 sh_wdt_read_rstcsr(void)
         /*
          * Same read/write brain-damage as for WTCNT here..
          */
-        return ctrl_inb(RSTCSR_R);
+        return __raw_readb(RSTCSR_R);
 }
 
 /**
@@ -62,7 +62,7 @@ static inline void sh_wdt_write_rstcsr(__u8 val)
          * we can't presently touch the WOVF bit, since the upper byte
          * has to be swapped for this. So just leave it alone..
          */
-        ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, RSTCSR);
+        __raw_writeb((WTCNT_HIGH << 8) | (__u16)val, RSTCSR);
 }
 
 #endif /* __ASM_CPU_SH2_WATCHDOG_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/dac.h b/arch/sh/include/cpu-sh3/cpu/dac.h
index 05fda8316ebc..98f1d15f0ab5 100644
--- a/arch/sh/include/cpu-sh3/cpu/dac.h
+++ b/arch/sh/include/cpu-sh3/cpu/dac.h
@@ -17,25 +17,25 @@
 static __inline__ void sh_dac_enable(int channel)
 {
         unsigned char v;
-        v = ctrl_inb(DACR);
+        v = __raw_readb(DACR);
         if(channel) v |= DACR_DAOE1;
         else v |= DACR_DAOE0;
-        ctrl_outb(v,DACR);
+        __raw_writeb(v,DACR);
 }
 
 static __inline__ void sh_dac_disable(int channel)
 {
         unsigned char v;
-        v = ctrl_inb(DACR);
+        v = __raw_readb(DACR);
         if(channel) v &= ~DACR_DAOE1;
         else v &= ~DACR_DAOE0;
-        ctrl_outb(v,DACR);
+        __raw_writeb(v,DACR);
 }
 
 static __inline__ void sh_dac_output(u8 value, int channel)
 {
-        if(channel) ctrl_outb(value,DADR1);
-        else ctrl_outb(value,DADR0);
+        if(channel) __raw_writeb(value,DADR1);
+        else __raw_writeb(value,DADR0);
 }
 
 #endif /* __ASM_CPU_SH3_DAC_H */
diff --git a/arch/sh/include/mach-common/mach/magicpanelr2.h b/arch/sh/include/mach-common/mach/magicpanelr2.h
index c644a77ee357..183a2f744251 100644
--- a/arch/sh/include/mach-common/mach/magicpanelr2.h
+++ b/arch/sh/include/mach-common/mach/magicpanelr2.h
@@ -19,12 +19,12 @@
 #include <asm/io_generic.h>
 
 
-#define SETBITS_OUTB(mask, reg)   ctrl_outb(ctrl_inb(reg) | mask, reg)
-#define SETBITS_OUTW(mask, reg)   ctrl_outw(ctrl_inw(reg) | mask, reg)
-#define SETBITS_OUTL(mask, reg)   ctrl_outl(ctrl_inl(reg) | mask, reg)
-#define CLRBITS_OUTB(mask, reg)   ctrl_outb(ctrl_inb(reg) & ~mask, reg)
-#define CLRBITS_OUTW(mask, reg)   ctrl_outw(ctrl_inw(reg) & ~mask, reg)
-#define CLRBITS_OUTL(mask, reg)   ctrl_outl(ctrl_inl(reg) & ~mask, reg)
+#define SETBITS_OUTB(mask, reg)   __raw_writeb(__raw_readb(reg) | mask, reg)
+#define SETBITS_OUTW(mask, reg)   __raw_writew(__raw_readw(reg) | mask, reg)
+#define SETBITS_OUTL(mask, reg)   __raw_writel(__raw_readl(reg) | mask, reg)
+#define CLRBITS_OUTB(mask, reg)   __raw_writeb(__raw_readb(reg) & ~mask, reg)
+#define CLRBITS_OUTW(mask, reg)   __raw_writew(__raw_readw(reg) & ~mask, reg)
+#define CLRBITS_OUTL(mask, reg)   __raw_writel(__raw_readl(reg) & ~mask, reg)
 
 
 #define PA_LED          PORT_PADR      /* LED */
diff --git a/arch/sh/kernel/cpu/adc.c b/arch/sh/kernel/cpu/adc.c
index da3d6877f93d..d307571d54b6 100644
--- a/arch/sh/kernel/cpu/adc.c
+++ b/arch/sh/kernel/cpu/adc.c
@@ -18,19 +18,19 @@ int adc_single(unsigned int channel)
 
         off = (channel & 0x03) << 2;
 
-        csr = ctrl_inb(ADCSR);
+        csr = __raw_readb(ADCSR);
         csr = channel | ADCSR_ADST | ADCSR_CKS;
-        ctrl_outb(csr, ADCSR);
+        __raw_writeb(csr, ADCSR);
 
         do {
-                csr = ctrl_inb(ADCSR);
+                csr = __raw_readb(ADCSR);
         } while ((csr & ADCSR_ADF) == 0);
 
         csr &= ~(ADCSR_ADF | ADCSR_ADST);
-        ctrl_outb(csr, ADCSR);
+        __raw_writeb(csr, ADCSR);
 
-        return (((ctrl_inb(ADDRAH + off) << 8) |
-                ctrl_inb(ADDRAL + off)) >> 6);
+        return (((__raw_readb(ADDRAH + off) << 8) |
+                __raw_readb(ADDRAL + off)) >> 6);
 }
 
 EXPORT_SYMBOL(adc_single);
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 05a7d2a373b6..6311b0b1789d 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -61,10 +61,10 @@ onchip_setup(dsp);
 static void __init speculative_execution_init(void)
 {
         /* Clear RABD */
-        ctrl_outl(ctrl_inl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
+        __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
 
         /* Flush the update */
-        (void)ctrl_inl(CPUOPM);
+        (void)__raw_readl(CPUOPM);
         ctrl_barrier();
 }
 #else
@@ -111,7 +111,7 @@ static void cache_init(void)
         unsigned long ccr, flags;
 
         jump_to_uncached();
-        ccr = ctrl_inl(CCR);
+        ccr = __raw_readl(CCR);
 
         /*
          * At this point we don't know whether the cache is enabled or not - a
@@ -155,7 +155,7 @@ static void cache_init(void)
                         for (addr = addrstart;
                              addr < addrstart + waysize;
                              addr += current_cpu_data.dcache.linesz)
-                                ctrl_outl(0, addr);
+                                __raw_writel(0, addr);
 
                         addrstart += current_cpu_data.dcache.way_incr;
                 } while (--ways);
@@ -188,7 +188,7 @@ static void cache_init(void)
 
         l2_cache_init();
 
-        ctrl_outl(flags, CCR);
+        __raw_writel(flags, CCR);
         back_to_cached();
 }
 #else
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index 06e7e2959b54..96a239583948 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -123,7 +123,7 @@ static void enable_intc_irq(unsigned int irq)
                 bitmask = 1 << (irq - 32);
         }
 
-        ctrl_outl(bitmask, reg);
+        __raw_writel(bitmask, reg);
 }
 
 static void disable_intc_irq(unsigned int irq)
@@ -139,7 +139,7 @@ static void disable_intc_irq(unsigned int irq)
                 bitmask = 1 << (irq - 32);
         }
 
-        ctrl_outl(bitmask, reg);
+        __raw_writel(bitmask, reg);
 }
 
 static void mask_and_ack_intc(unsigned int irq)
@@ -170,11 +170,11 @@ void __init plat_irq_setup(void)
 
 
         /* Disable all interrupts and set all priorities to 0 to avoid trouble */
-        ctrl_outl(-1, INTC_INTDSB_0);
-        ctrl_outl(-1, INTC_INTDSB_1);
+        __raw_writel(-1, INTC_INTDSB_0);
+        __raw_writel(-1, INTC_INTDSB_1);
 
         for (reg = INTC_INTPRI_0, i = 0; i < INTC_INTPRI_PREGS; i++, reg += 8)
-                ctrl_outl( NO_PRIORITY, reg);
+                __raw_writel( NO_PRIORITY, reg);
 
 
 #ifdef CONFIG_SH_CAYMAN
@@ -199,7 +199,7 @@ void __init plat_irq_setup(void)
                         reg = INTC_ICR_SET;
                         i = IRQ_IRL0;
                 }
-                ctrl_outl(INTC_ICR_IRLM, reg);
+                __raw_writel(INTC_ICR_IRLM, reg);
 
                 /* Set interrupt priorities according to platform description */
                 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
@@ -207,7 +207,7 @@ void __init plat_irq_setup(void)
                                 ((i % INTC_INTPRI_PPREG) * 4);
                         if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
                                 /* Upon the 7th, set Priority Register */
-                                ctrl_outl(data, reg);
+                                __raw_writel(data, reg);
                                 data = 0;
                                 reg += 8;
                         }
diff --git a/arch/sh/kernel/cpu/sh2/clock-sh7619.c b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
index 4fe863170e31..0c9f24d7a02f 100644
--- a/arch/sh/kernel/cpu/sh2/clock-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
@@ -31,7 +31,7 @@ static const int pfc_divisors[] = {1,2,0,4};
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 7];
+        clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
 }
 
 static struct clk_ops sh7619_master_clk_ops = {
@@ -40,7 +40,7 @@ static struct clk_ops sh7619_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -50,7 +50,7 @@ static struct clk_ops sh7619_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 7];
+        return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
 }
 
 static struct clk_ops sh7619_bus_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
index 7814c76159a7..b26264dc2aef 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
 
 static void master_clk_init(struct clk *clk)
 {
-        return 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+        return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
 static struct clk_ops sh7201_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7201_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -53,7 +53,7 @@ static struct clk_ops sh7201_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -63,7 +63,7 @@ static struct clk_ops sh7201_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007);
+        int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
index 940986965102..7e75d8f79502 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
@@ -39,7 +39,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0003] * PLL2 ;
+        clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * PLL2 ;
 }
 
 static struct clk_ops sh7203_master_clk_ops = {
@@ -48,7 +48,7 @@ static struct clk_ops sh7203_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -58,7 +58,7 @@ static struct clk_ops sh7203_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx-2];
 }
 
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
index c2268bdeceeb..b27a5e2687ab 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+        clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
 static struct clk_ops sh7206_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7206_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -53,7 +53,7 @@ static struct clk_ops sh7206_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+        return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
 static struct clk_ops sh7206_bus_clk_ops = {
@@ -62,7 +62,7 @@ static struct clk_ops sh7206_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh3.c b/arch/sh/kernel/cpu/sh3/clock-sh3.c
index 27b8738f0b09..b78384afac09 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh3.c
@@ -28,7 +28,7 @@ static int pfc_divisors[]    = { 1, 2, 3, 4, 6, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         clk->rate *= pfc_divisors[idx];
@@ -40,7 +40,7 @@ static struct clk_ops sh3_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         return clk->parent->rate / pfc_divisors[idx];
@@ -52,7 +52,7 @@ static struct clk_ops sh3_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
 
         return clk->parent->rate / stc_multipliers[idx];
@@ -64,7 +64,7 @@ static struct clk_ops sh3_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
         return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7705.c b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
index 0ca8f2c3646c..0ecea1451c6f 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
@@ -32,7 +32,7 @@ static int pfc_divisors[]    = { 1, 2, 3, 4, 6, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0003];
+        clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
 }
 
 static struct clk_ops sh7705_master_clk_ops = {
@@ -41,7 +41,7 @@ static struct clk_ops sh7705_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ctrl_inw(FRQCR) & 0x0003;
+        int idx = __raw_readw(FRQCR) & 0x0003;
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -51,7 +51,7 @@ static struct clk_ops sh7705_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0300) >> 8;
+        int idx = (__raw_readw(FRQCR) & 0x0300) >> 8;
         return clk->parent->rate / stc_multipliers[idx];
 }
 
@@ -61,7 +61,7 @@ static struct clk_ops sh7705_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0030) >> 4;
+        int idx = (__raw_readw(FRQCR) & 0x0030) >> 4;
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7706.c b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
index 4bf7887d310a..6f9ff8b57dd6 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7706.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
@@ -24,7 +24,7 @@ static int pfc_divisors[]    = { 1, 2, 4, 1, 3, 6, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         clk->rate *= pfc_divisors[idx];
@@ -36,7 +36,7 @@ static struct clk_ops sh7706_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         return clk->parent->rate / pfc_divisors[idx];
@@ -48,7 +48,7 @@ static struct clk_ops sh7706_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
 
         return clk->parent->rate / stc_multipliers[idx];
@@ -60,7 +60,7 @@ static struct clk_ops sh7706_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
         return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
index e8749505bd2a..f302ba09e681 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
@@ -24,7 +24,7 @@ static int pfc_divisors[]    = { 1, 2, 4, 1, 3, 6, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         clk->rate *= pfc_divisors[idx];
@@ -36,7 +36,7 @@ static struct clk_ops sh7709_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         return clk->parent->rate / pfc_divisors[idx];
@@ -48,7 +48,7 @@ static struct clk_ops sh7709_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = (frqcr & 0x0080) ?
                 ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1;
 
@@ -61,7 +61,7 @@ static struct clk_ops sh7709_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
         return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7710.c b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
index 030a58ba18a5..29a87d8946a4 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
@@ -26,7 +26,7 @@ static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007];
+        clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];
 }
 
 static struct clk_ops sh7710_master_clk_ops = {
@@ -35,7 +35,7 @@ static struct clk_ops sh7710_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0007);
+        int idx = (__raw_readw(FRQCR) & 0x0007);
         return clk->parent->rate / md_table[idx];
 }
 
@@ -45,7 +45,7 @@ static struct clk_ops sh7710_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0700) >> 8;
+        int idx = (__raw_readw(FRQCR) & 0x0700) >> 8;
         return clk->parent->rate / md_table[idx];
 }
 
@@ -55,7 +55,7 @@ static struct clk_ops sh7710_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0070) >> 4;
+        int idx = (__raw_readw(FRQCR) & 0x0070) >> 4;
         return clk->parent->rate / md_table[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7712.c b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
index 6428ee6c77ed..b0d0c5203996 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7712.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
@@ -23,7 +23,7 @@ static int divisors[]    = { 1, 2, 3, 4, 6 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = (frqcr & 0x0300) >> 8;
 
         clk->rate *= multipliers[idx];
@@ -35,7 +35,7 @@ static struct clk_ops sh7712_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = frqcr & 0x0007;
 
         return clk->parent->rate / divisors[idx];
@@ -47,7 +47,7 @@ static struct clk_ops sh7712_module_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = (frqcr & 0x0030) >> 4;
 
         return clk->parent->rate / divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index c2db65719f4d..295ec4c99e98 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -30,23 +30,23 @@ int detect_cpu_and_cache_system(void)
         addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12);
 
         /* First, write back & invalidate */
-        data0  = ctrl_inl(addr0);
-        ctrl_outl(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
-        data1  = ctrl_inl(addr1);
-        ctrl_outl(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);
+        data0  = __raw_readl(addr0);
+        __raw_writel(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
+        data1  = __raw_readl(addr1);
+        __raw_writel(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);
 
         /* Next, check if there's shadow or not */
-        data0 = ctrl_inl(addr0);
+        data0 = __raw_readl(addr0);
         data0 ^= SH_CACHE_VALID;
-        ctrl_outl(data0, addr0);
-        data1 = ctrl_inl(addr1);
+        __raw_writel(data0, addr0);
+        data1 = __raw_readl(addr1);
         data2 = data1 ^ SH_CACHE_VALID;
-        ctrl_outl(data2, addr1);
-        data3 = ctrl_inl(addr0);
+        __raw_writel(data2, addr1);
+        data3 = __raw_readl(addr0);
 
         /* Lastly, invaliate them. */
-        ctrl_outl(data0&~SH_CACHE_VALID, addr0);
-        ctrl_outl(data2&~SH_CACHE_VALID, addr1);
+        __raw_writel(data0&~SH_CACHE_VALID, addr0);
+        __raw_writel(data2&~SH_CACHE_VALID, addr1);
 
         back_to_cached();
 
@@ -94,9 +94,9 @@ int detect_cpu_and_cache_system(void)
                 boot_cpu_data.dcache.way_incr   = (1 << 13);
                 boot_cpu_data.dcache.entry_mask = 0x1ff0;
                 boot_cpu_data.dcache.sets       = 512;
-                ctrl_outl(CCR_CACHE_32KB, CCR3_REG);
+                __raw_writel(CCR_CACHE_32KB, CCR3_REG);
 #else
-                ctrl_outl(CCR_CACHE_16KB, CCR3_REG);
+                __raw_writel(CCR_CACHE_16KB, CCR3_REG);
 #endif
 #endif
         }
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c
index c98846857855..53be70b98116 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c
@@ -58,7 +58,7 @@ static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
 void __init plat_irq_setup_pins(int mode)
 {
         if (mode == IRQ_MODE_IRQ) {
-                ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
+                __raw_writew(__raw_readw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
                 register_intc_controller(&intc_desc_irq0123);
                 return;
         }
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 21421e34e7d5..6b80850294da 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -23,7 +23,7 @@ static int frqcr3_values[]   = { 0, 1, 2, 3, 4, 5, 6  };
 
 static unsigned long emi_clk_recalc(struct clk *clk)
 {
-        int idx = ctrl_inl(CPG2_FRQCR3) & 0x0007;
+        int idx = __raw_readl(CPG2_FRQCR3) & 0x0007;
         return clk->parent->rate / frqcr3_divisors[idx];
 }
 
@@ -52,7 +52,7 @@ static struct clk sh4202_emi_clk = {
 
 static unsigned long femi_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(CPG2_FRQCR3) >> 3) & 0x0007;
+        int idx = (__raw_readl(CPG2_FRQCR3) >> 3) & 0x0007;
         return clk->parent->rate / frqcr3_divisors[idx];
 }
 
@@ -92,7 +92,7 @@ static void shoc_clk_init(struct clk *clk)
 
 static unsigned long shoc_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(CPG2_FRQCR3) >> 6) & 0x0007;
+        int idx = (__raw_readl(CPG2_FRQCR3) >> 6) & 0x0007;
         return clk->parent->rate / frqcr3_divisors[idx];
 }
 
@@ -122,10 +122,10 @@ static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id)
 
         tmp = frqcr3_lookup(clk, rate);
 
-        frqcr3 = ctrl_inl(CPG2_FRQCR3);
+        frqcr3 = __raw_readl(CPG2_FRQCR3);
         frqcr3 &= ~(0x0007 << 6);
         frqcr3 |= tmp << 6;
-        ctrl_outl(frqcr3, CPG2_FRQCR3);
+        __raw_writel(frqcr3, CPG2_FRQCR3);
 
         clk->rate = clk->parent->rate / frqcr3_divisors[tmp];
 
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4.c b/arch/sh/kernel/cpu/sh4/clock-sh4.c
index 73294d9cd049..5add75c1f539 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4.c
@@ -28,7 +28,7 @@ static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0007];
+        clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007];
 }
 
 static struct clk_ops sh4_master_clk_ops = {
@@ -37,7 +37,7 @@ static struct clk_ops sh4_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0007);
+        int idx = (__raw_readw(FRQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -47,7 +47,7 @@ static struct clk_ops sh4_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) >> 3) & 0x0007;
+        int idx = (__raw_readw(FRQCR) >> 3) & 0x0007;
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -57,7 +57,7 @@ static struct clk_ops sh4_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) >> 6) & 0x0007;
+        int idx = (__raw_readw(FRQCR) >> 6) & 0x0007;
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index cc02b3145cca..822977a06d84 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -28,9 +28,9 @@ int __init detect_cpu_and_cache_system(void)
                 [9] = (1 << 16)
         };
 
-        pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffffff;
-        prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff;
-        cvr = (ctrl_inl(CCN_CVR));
+        pvr = (__raw_readl(CCN_PVR) >> 8) & 0xffffff;
+        prr = (__raw_readl(CCN_PRR) >> 4) & 0xff;
+        cvr = (__raw_readl(CCN_CVR));
 
         /*
          * Setup some sane SH-4 defaults for the icache
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index 4b733715cdb5..b9b7e10ad68f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -198,7 +198,7 @@ void __init plat_irq_setup_pins(int mode)
 {
         switch (mode) {
         case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
-                ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+                __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
                 register_intc_controller(&intc_desc_irlm);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index b2a9df1af64c..ffd79e57254f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -442,7 +442,7 @@ void __init plat_irq_setup_pins(int mode)
 
         switch (mode) {
         case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
-                ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+                __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
                 register_intc_controller(&intc_desc_irlm);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 5b74cc0b43da..a16eb3656f4b 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -319,7 +319,7 @@ void __init plat_irq_setup_pins(int mode)
 {
         switch (mode) {
         case IRQ_MODE_IRQ:
-                ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+                __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
                 register_intc_controller(&intc_desc_irq);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index 8a8a993f55ea..97aea9d69b00 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -43,9 +43,9 @@ static unsigned long *sq_bitmap;
 
 #define store_queue_barrier()                   \
 do {                                            \
-        (void)ctrl_inl(P4SEG_STORE_QUE);        \
-        ctrl_outl(0, P4SEG_STORE_QUE + 0);      \
-        ctrl_outl(0, P4SEG_STORE_QUE + 8);      \
+        (void)__raw_readl(P4SEG_STORE_QUE);     \
+        __raw_writel(0, P4SEG_STORE_QUE + 0);   \
+        __raw_writel(0, P4SEG_STORE_QUE + 8);   \
 } while (0);
 
 /**
@@ -123,8 +123,8 @@ static int __sq_remap(struct sq_mapping *map, unsigned long flags)
          * straightforward, as we can just load up each queue's QACR with
          * the physical address appropriately masked.
          */
-        ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0);
-        ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1);
+        __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0);
+        __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1);
 #endif
 
         return 0;
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index ddc235ca9664..86aae60677dc 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -35,7 +35,7 @@ static struct clk_ops sh7757_master_clk_ops = {
 
 static void module_clk_recalc(struct clk *clk)
 {
-        int idx = ctrl_inl(FRQCR) & 0x0000000f;
+        int idx = __raw_readl(FRQCR) & 0x0000000f;
         clk->rate = clk->parent->rate / p1fc_divisors[idx];
 }
 
@@ -45,7 +45,7 @@ static struct clk_ops sh7757_module_clk_ops = {
 
 static void bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) >> 8) & 0x0000000f;
+        int idx = (__raw_readl(FRQCR) >> 8) & 0x0000000f;
         clk->rate = clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -55,7 +55,7 @@ static struct clk_ops sh7757_bus_clk_ops = {
 
 static void cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) >> 20) & 0x0000000f;
+        int idx = (__raw_readl(FRQCR) >> 20) & 0x0000000f;
         clk->rate = clk->parent->rate / ifc_divisors[idx];
 }
 
@@ -78,7 +78,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static void shyway_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) >> 12) & 0x0000000f;
+        int idx = (__raw_readl(FRQCR) >> 12) & 0x0000000f;
         clk->rate = clk->parent->rate / sfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 370cd47642ef..9f401163e71e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -22,7 +22,7 @@ static int cfc_divisors[] = { 1, 1, 4, 1, 1, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= p0fc_divisors[(ctrl_inl(FRQCR) >> 4) & 0x07];
+        clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07];
 }
 
 static struct clk_ops sh7763_master_clk_ops = {
@@ -31,7 +31,7 @@ static struct clk_ops sh7763_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 4) & 0x07);
+        int idx = ((__raw_readl(FRQCR) >> 4) & 0x07);
         return clk->parent->rate / p0fc_divisors[idx];
 }
 
@@ -41,7 +41,7 @@ static struct clk_ops sh7763_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 16) & 0x07);
+        int idx = ((__raw_readl(FRQCR) >> 16) & 0x07);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -68,7 +68,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static unsigned long shyway_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 20) & 0x07);
+        int idx = ((__raw_readl(FRQCR) >> 20) & 0x07);
         return clk->parent->rate / cfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
index e0b896769205..9e3354365d40 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
@@ -21,7 +21,7 @@ static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> 28) & 0x000f];
+        clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f];
 }
 
 static struct clk_ops sh7770_master_clk_ops = {
@@ -30,7 +30,7 @@ static struct clk_ops sh7770_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 28) & 0x000f);
+        int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -40,7 +40,7 @@ static struct clk_ops sh7770_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) & 0x000f);
+        int idx = (__raw_readl(FRQCR) & 0x000f);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -50,7 +50,7 @@ static struct clk_ops sh7770_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 24) & 0x000f);
+        int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index a249d823578e..150963a6001e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -22,7 +22,7 @@ static int cfc_divisors[] = { 1, 1, 4, 1, 6, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[ctrl_inl(FRQCR) & 0x0003];
+        clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003];
 }
 
 static struct clk_ops sh7780_master_clk_ops = {
@@ -31,7 +31,7 @@ static struct clk_ops sh7780_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) & 0x0003);
+        int idx = (__raw_readl(FRQCR) & 0x0003);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -41,7 +41,7 @@ static struct clk_ops sh7780_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 16) & 0x0007);
+        int idx = ((__raw_readl(FRQCR) >> 16) & 0x0007);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -51,7 +51,7 @@ static struct clk_ops sh7780_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 24) & 0x0001);
+        int idx = ((__raw_readl(FRQCR) >> 24) & 0x0001);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
@@ -74,7 +74,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static unsigned long shyway_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 20) & 0x0007);
+        int idx = ((__raw_readl(FRQCR) >> 20) & 0x0007);
         return clk->parent->rate / cfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index 23c27d32d982..e75c57bdfa5e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -33,7 +33,7 @@ static int cfc_divisors[] = { 1, 1, 4, 6 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK];
+        clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK];
 }
 
 static struct clk_ops shx3_master_clk_ops = {
@@ -42,7 +42,7 @@ static struct clk_ops shx3_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -52,7 +52,7 @@ static struct clk_ops shx3_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> BFC_POS) & BFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> BFC_POS) & BFC_MSK);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -62,7 +62,7 @@ static struct clk_ops shx3_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> IFC_POS) & IFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> IFC_POS) & IFC_MSK);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
@@ -85,7 +85,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static unsigned long shyway_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> CFC_POS) & CFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> CFC_POS) & CFC_MSK);
         return clk->parent->rate / cfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 9d426258aa00..9e8620e3ad3e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -596,7 +596,7 @@ void __init plat_early_device_setup(void)
 void l2_cache_init(void)
 {
         /* Enable L2 cache */
-        ctrl_outl(L2_CACHE_ENABLE, RAMCR);
+        __raw_writel(L2_CACHE_ENABLE, RAMCR);
 }
 
 enum {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 578e9f80271f..aa0f6e9bb89e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -718,7 +718,7 @@ void __init plat_early_device_setup(void)
 void l2_cache_init(void)
 {
         /* Enable L2 cache */
-        ctrl_outl(L2_CACHE_ENABLE, RAMCR);
+        __raw_writel(L2_CACHE_ENABLE, RAMCR);
 }
 
 enum {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 37e32efbbaa7..e75edf58796a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -487,17 +487,17 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7757-irl4567", vectors_irl4567,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ3-0 + IRQ7-4 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -507,32 +507,32 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ7654:
                 /* select IRQ mode for IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq4567);
                 break;
         case IRQ_MODE_IRQ3210:
                 /* select IRQ mode for IRL3-0 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq0123);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl4567);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl0123);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 6aba26fec416..7f6b0a5f7f82 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -538,11 +538,11 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7763-irl3210", irl_vectors,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ7-0 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         register_intc_controller(&intc_desc);
 }
@@ -552,27 +552,27 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ:
                 /* select IRQ mode for IRL3-0 + IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
                 register_intc_controller(&intc_irq_desc);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl7654_desc);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl3210_desc);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index c1643bc9590d..86d681ecf90e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -694,17 +694,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ7-0 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -714,27 +714,27 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ:
                 /* select IRQ mode for IRL3-0 + IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
                 register_intc_controller(&intc_irq_desc);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl7654_desc);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl3210_desc);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index c310558490d5..f8f21618d785 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -461,17 +461,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ7-0 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -481,27 +481,27 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ:
                 /* select IRQ mode for IRL3-0 + IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
                 register_intc_controller(&intc_irq_desc);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl7654_desc);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl3210_desc);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index f685b9b21999..23448d8c6711 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -541,17 +541,17 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ3-0 + IRQ7-4 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -561,32 +561,32 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ7654:
                 /* select IRQ mode for IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq4567);
                 break;
         case IRQ_MODE_IRQ3210:
                 /* select IRQ mode for IRL3-0 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq0123);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl4567);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl0123);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 71673487ace0..7e585320710a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -867,14 +867,14 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7786-irl4567", vectors_irl4567,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ3-0 + IRQ7-4 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -884,32 +884,32 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ7654:
                 /* select IRQ mode for IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq4567);
                 break;
         case IRQ_MODE_IRQ3210:
                 /* select IRQ mode for IRL3-0 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq0123);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl4567);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl0123);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh5/clock-sh5.c b/arch/sh/kernel/cpu/sh5/clock-sh5.c
index 7f864ebc51d3..9cfc19b8dbe4 100644
--- a/arch/sh/kernel/cpu/sh5/clock-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/clock-sh5.c
@@ -24,7 +24,7 @@ static unsigned long cprc_base;
 
 static void master_clk_init(struct clk *clk)
 {
-        int idx = (ctrl_inl(cprc_base + 0x00) >> 6) & 0x0007;
+        int idx = (__raw_readl(cprc_base + 0x00) >> 6) & 0x0007;
         clk->rate *= ifc_table[idx];
 }
 
@@ -34,7 +34,7 @@ static struct clk_ops sh5_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(cprc_base) >> 12) & 0x0007;
+        int idx = (__raw_readw(cprc_base) >> 12) & 0x0007;
         return clk->parent->rate / ifc_table[idx];
 }
 
@@ -44,7 +44,7 @@ static struct clk_ops sh5_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(cprc_base) >> 3) & 0x0007;
+        int idx = (__raw_readw(cprc_base) >> 3) & 0x0007;
         return clk->parent->rate / ifc_table[idx];
 }
 
@@ -54,7 +54,7 @@ static struct clk_ops sh5_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(cprc_base) & 0x0007);
+        int idx = (__raw_readw(cprc_base) & 0x0007);
         return clk->parent->rate / ifc_table[idx];
 }
 
diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c
index 69be603aa2d7..16b83cc89a41 100644
--- a/arch/sh/kernel/io_trapped.c
+++ b/arch/sh/kernel/io_trapped.c
@@ -184,31 +184,31 @@ static unsigned long long copy_word(unsigned long src_addr, int src_len,
 
         switch (src_len) {
         case 1:
-                tmp = ctrl_inb(src_addr);
+                tmp = __raw_readb(src_addr);
                 break;
         case 2:
-                tmp = ctrl_inw(src_addr);
+                tmp = __raw_readw(src_addr);
                 break;
         case 4:
-                tmp = ctrl_inl(src_addr);
+                tmp = __raw_readl(src_addr);
                 break;
         case 8:
-                tmp = ctrl_inq(src_addr);
+                tmp = __raw_readq(src_addr);
                 break;
         }
 
         switch (dst_len) {
         case 1:
-                ctrl_outb(tmp, dst_addr);
+                __raw_writeb(tmp, dst_addr);
                 break;
         case 2:
-                ctrl_outw(tmp, dst_addr);
+                __raw_writew(tmp, dst_addr);
                 break;
         case 4:
-                ctrl_outl(tmp, dst_addr);
+                __raw_writel(tmp, dst_addr);
                 break;
         case 8:
-                ctrl_outq(tmp, dst_addr);
+                __raw_writeq(tmp, dst_addr);
                 break;
         }
 
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index b6f43f0ea743..3cb88f114d7a 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -41,7 +41,7 @@ void show_regs(struct pt_regs * regs)
         printk("PC  : %08lx SP  : %08lx SR  : %08lx ",
                regs->pc, regs->regs[15], regs->sr);
 #ifdef CONFIG_MMU
-        printk("TEA : %08x\n", ctrl_inl(MMU_TEA));
+        printk("TEA : %08x\n", __raw_readl(MMU_TEA));
 #else
         printk("\n");
 #endif
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index 6a7cce79eb4e..579cd2ca358d 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -528,7 +528,7 @@ handle_syscall_restart(unsigned long save_r0, struct pt_regs *regs,
                 /* fallthrough */
                 case -ERESTARTNOINTR:
                         regs->regs[0] = save_r0;
-                        regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
+                        regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
                         break;
         }
 }
@@ -626,9 +626,9 @@ no_signal:
                     regs->regs[0] == -ERESTARTSYS ||
                     regs->regs[0] == -ERESTARTNOINTR) {
                         regs->regs[0] = save_r0;
-                        regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
+                        regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
                 } else if (regs->regs[0] == -ERESTART_RESTARTBLOCK) {
-                        regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
+                        regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
                         regs->regs[3] = __NR_restart_syscall;
                 }
         }
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index 7b036339dc92..0830c2a9f712 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -58,7 +58,7 @@ BUILD_TRAP_HANDLER(debug)
         TRAP_HANDLER_DECL;
 
         /* Rewind */
-        regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
+        regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
 
         if (notify_die(DIE_TRAP, "debug trap", regs, 0, vec & 0xff,
                        SIGTRAP) == NOTIFY_STOP)
@@ -75,7 +75,7 @@ BUILD_TRAP_HANDLER(bug)
         TRAP_HANDLER_DECL;
 
         /* Rewind */
-        regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
+        regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
 
         if (notify_die(DIE_TRAP, "bug trap", regs, 0, TRAPA_BUG_OPCODE & 0xff,
                        SIGTRAP) == NOTIFY_STOP)
diff --git a/arch/sh/mm/cache-debugfs.c b/arch/sh/mm/cache-debugfs.c
index 48ce82ee9fd2..690ed010d002 100644
--- a/arch/sh/mm/cache-debugfs.c
+++ b/arch/sh/mm/cache-debugfs.c
@@ -36,7 +36,7 @@ static int cache_seq_show(struct seq_file *file, void *iter)
          */
         jump_to_uncached();
 
-        ccr = ctrl_inl(CCR);
+        ccr = __raw_readl(CCR);
         if ((ccr & CCR_CACHE_ENABLE) == 0) {
                 back_to_cached();
 
@@ -89,7 +89,7 @@ static int cache_seq_show(struct seq_file *file, void *iter)
                 for (addr = addrstart, line = 0;
                      addr < addrstart + waysize;
                      addr += cache->linesz, line++) {
-                        unsigned long data = ctrl_inl(addr);
+                        unsigned long data = __raw_readl(addr);
 
                         /* Check the V bit, ignore invalid cachelines */
                         if ((data & 1) == 0)
diff --git a/arch/sh/mm/cache-sh2.c b/arch/sh/mm/cache-sh2.c
index 699a71f46327..defcf719f2e8 100644
--- a/arch/sh/mm/cache-sh2.c
+++ b/arch/sh/mm/cache-sh2.c
@@ -28,10 +28,10 @@ static void sh2__flush_wback_region(void *start, int size)
                 unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0);
                 int way;
                 for (way = 0; way < 4; way++) {
-                        unsigned long data =  ctrl_inl(addr | (way << 12));
+                        unsigned long data =  __raw_readl(addr | (way << 12));
                         if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
                                 data &= ~SH_CACHE_UPDATED;
-                                ctrl_outl(data, addr | (way << 12));
+                                __raw_writel(data, addr | (way << 12));
                         }
                 }
         }
@@ -47,7 +47,7 @@ static void sh2__flush_purge_region(void *start, int size)
                 & ~(L1_CACHE_BYTES-1);
 
         for (v = begin; v < end; v+=L1_CACHE_BYTES)
-                ctrl_outl((v & CACHE_PHYSADDR_MASK),
+                __raw_writel((v & CACHE_PHYSADDR_MASK),
                           CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
 }
 
@@ -63,9 +63,9 @@ static void sh2__flush_invalidate_region(void *start, int size)
         local_irq_save(flags);
         jump_to_uncached();
 
-        ccr = ctrl_inl(CCR);
+        ccr = __raw_readl(CCR);
         ccr |= CCR_CACHE_INVALIDATE;
-        ctrl_outl(ccr, CCR);
+        __raw_writel(ccr, CCR);
 
         back_to_cached();
         local_irq_restore(flags);
@@ -78,7 +78,7 @@ static void sh2__flush_invalidate_region(void *start, int size)
                 & ~(L1_CACHE_BYTES-1);
 
         for (v = begin; v < end; v+=L1_CACHE_BYTES)
-                ctrl_outl((v & CACHE_PHYSADDR_MASK),
+                __raw_writel((v & CACHE_PHYSADDR_MASK),
                           CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
 #endif
 }
diff --git a/arch/sh/mm/cache-sh2a.c b/arch/sh/mm/cache-sh2a.c
index 975899d83564..1f51225426a2 100644
--- a/arch/sh/mm/cache-sh2a.c
+++ b/arch/sh/mm/cache-sh2a.c
@@ -32,10 +32,10 @@ static void sh2a__flush_wback_region(void *start, int size)
                 unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0);
                 int way;
                 for (way = 0; way < 4; way++) {
-                        unsigned long data =  ctrl_inl(addr | (way << 11));
+                        unsigned long data =  __raw_readl(addr | (way << 11));
                         if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
                                 data &= ~SH_CACHE_UPDATED;
-                                ctrl_outl(data, addr | (way << 11));
+                                __raw_writel(data, addr | (way << 11));
                         }
                 }
         }
@@ -58,7 +58,7 @@ static void sh2a__flush_purge_region(void *start, int size)
         jump_to_uncached();
 
         for (v = begin; v < end; v+=L1_CACHE_BYTES) {
-                ctrl_outl((v & CACHE_PHYSADDR_MASK),
+                __raw_writel((v & CACHE_PHYSADDR_MASK),
                           CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
         }
         back_to_cached();
@@ -78,17 +78,17 @@ static void sh2a__flush_invalidate_region(void *start, int size)
         jump_to_uncached();
 
 #ifdef CONFIG_CACHE_WRITEBACK
-        ctrl_outl(ctrl_inl(CCR) | CCR_OCACHE_INVALIDATE, CCR);
+        __raw_writel(__raw_readl(CCR) | CCR_OCACHE_INVALIDATE, CCR);
         /* I-cache invalidate */
         for (v = begin; v < end; v+=L1_CACHE_BYTES) {
-                ctrl_outl((v & CACHE_PHYSADDR_MASK),
+                __raw_writel((v & CACHE_PHYSADDR_MASK),
                           CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
         }
 #else
         for (v = begin; v < end; v+=L1_CACHE_BYTES) {
-                ctrl_outl((v & CACHE_PHYSADDR_MASK),
+                __raw_writel((v & CACHE_PHYSADDR_MASK),
                           CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
-                ctrl_outl((v & CACHE_PHYSADDR_MASK),
+                __raw_writel((v & CACHE_PHYSADDR_MASK),
                           CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
         }
 #endif
@@ -115,14 +115,14 @@ static void sh2a_flush_icache_range(void *args)
                 int way;
                 /* O-Cache writeback */
                 for (way = 0; way < 4; way++) {
-                        unsigned long data =  ctrl_inl(CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
+                        unsigned long data =  __raw_readl(CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
                         if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
                                 data &= ~SH_CACHE_UPDATED;
-                                ctrl_outl(data, CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
+                                __raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
                         }
                 }
                 /* I-Cache invalidate */
-                ctrl_outl(addr,
+                __raw_writel(addr,
                           CACHE_IC_ADDRESS_ARRAY | addr | 0x00000008);
         }
 
diff --git a/arch/sh/mm/cache-sh3.c b/arch/sh/mm/cache-sh3.c
index faef80c98134..e37523f65195 100644
--- a/arch/sh/mm/cache-sh3.c
+++ b/arch/sh/mm/cache-sh3.c
@@ -50,12 +50,12 @@ static void sh3__flush_wback_region(void *start, int size)
                         p = __pa(v);
                         addr = addrstart | (v & current_cpu_data.dcache.entry_mask);
                         local_irq_save(flags);
-                        data = ctrl_inl(addr);
+                        data = __raw_readl(addr);
 
                         if ((data & CACHE_PHYSADDR_MASK) ==
                             (p & CACHE_PHYSADDR_MASK)) {
                                 data &= ~SH_CACHE_UPDATED;
-                                ctrl_outl(data, addr);
+                                __raw_writel(data, addr);
                                 local_irq_restore(flags);
                                 break;
                         }
@@ -86,7 +86,7 @@ static void sh3__flush_purge_region(void *start, int size)
                 data = (v & 0xfffffc00); /* _Virtual_ address, ~U, ~V */
                 addr = CACHE_OC_ADDRESS_ARRAY |
                         (v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC;
-                ctrl_outl(data, addr);
+                __raw_writel(data, addr);
         }
 }
 
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 87115b3ee70e..2cfae81914aa 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -132,9 +132,9 @@ static void flush_icache_all(void)
         jump_to_uncached();
 
         /* Flush I-cache */
-        ccr = ctrl_inl(CCR);
+        ccr = __raw_readl(CCR);
         ccr |= CCR_CACHE_ICI;
-        ctrl_outl(ccr, CCR);
+        __raw_writel(ccr, CCR);
 
         /*
          * back_to_cached() will take care of the barrier for us, don't add
@@ -377,9 +377,9 @@ extern void __weak sh4__flush_region_init(void);
 void __init sh4_cache_init(void)
 {
         printk("PVR=%08x CVR=%08x PRR=%08x\n",
-                ctrl_inl(CCN_PVR),
-                ctrl_inl(CCN_CVR),
-                ctrl_inl(CCN_PRR));
+                __raw_readl(CCN_PVR),
+                __raw_readl(CCN_CVR),
+                __raw_readl(CCN_PRR));
 
         local_flush_icache_range        = sh4_flush_icache_range;
         local_flush_dcache_page         = sh4_flush_dcache_page;
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c
index 870293ee539e..f498da1cce7a 100644
--- a/arch/sh/mm/cache-sh7705.c
+++ b/arch/sh/mm/cache-sh7705.c
@@ -48,10 +48,10 @@ static inline void cache_wback_all(void)
                         unsigned long data;
                         int v = SH_CACHE_UPDATED | SH_CACHE_VALID;
 
-                        data = ctrl_inl(addr);
+                        data = __raw_readl(addr);
 
                         if ((data & v) == v)
-                                ctrl_outl(data & ~v, addr);
+                                __raw_writel(data & ~v, addr);
 
                 }
 
@@ -115,10 +115,10 @@ static void __flush_dcache_page(unsigned long phys)
                      addr += current_cpu_data.dcache.linesz) {
                         unsigned long data;
 
-                        data = ctrl_inl(addr) & (0x1ffffC00 | SH_CACHE_VALID);
+                        data = __raw_readl(addr) & (0x1ffffC00 | SH_CACHE_VALID);
                         if (data == phys) {
                                 data &= ~(SH_CACHE_VALID | SH_CACHE_UPDATED);
-                                ctrl_outl(data, addr);
+                                __raw_writel(data, addr);
                         }
                 }
 
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index 3d5eece7e6d0..3c9bf5b5c36f 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -112,7 +112,7 @@ static void pmb_free(struct pmb_entry *pmbe)
 static void __set_pmb_entry(unsigned long vpn, unsigned long ppn,
                             unsigned long flags, int pos)
 {
-        ctrl_outl(vpn | PMB_V, mk_pmb_addr(pos));
+        __raw_writel(vpn | PMB_V, mk_pmb_addr(pos));
 
 #ifdef CONFIG_CACHE_WRITETHROUGH
         /*
@@ -124,7 +124,7 @@ static void __set_pmb_entry(unsigned long vpn, unsigned long ppn,
                 flags |= PMB_WT;
 #endif
 
-        ctrl_outl(ppn | flags | PMB_V, mk_pmb_data(pos));
+        __raw_writel(ppn | flags | PMB_V, mk_pmb_data(pos));
 }
 
 static void set_pmb_entry(struct pmb_entry *pmbe)
@@ -146,10 +146,10 @@ static void clear_pmb_entry(struct pmb_entry *pmbe)
 
         /* Clear V-bit */
         addr = mk_pmb_addr(entry);
-        ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr);
+        __raw_writel(__raw_readl(addr) & ~PMB_V, addr);
 
         addr = mk_pmb_data(entry);
-        ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr);
+        __raw_writel(__raw_readl(addr) & ~PMB_V, addr);
 
         back_to_cached();
 }
@@ -395,7 +395,7 @@ int pmb_init(void)
                 unsigned long vpn, ppn, flags;
 
                 addr = PMB_DATA + (i << PMB_E_SHIFT);
-                data = ctrl_inl(addr);
+                data = __raw_readl(addr);
                 if (!(data & PMB_V))
                         continue;
 
@@ -408,7 +408,7 @@ int pmb_init(void)
                         data &= ~(PMB_C | PMB_WT);
 #endif
                 }
-                ctrl_outl(data, addr);
+                __raw_writel(data, addr);
 
                 ppn = data & PMB_PFN_MASK;
 
@@ -416,7 +416,7 @@ int pmb_init(void)
                 flags |= data & PMB_SZ_MASK;
 
                 addr = PMB_ADDR + (i << PMB_E_SHIFT);
-                data = ctrl_inl(addr);
+                data = __raw_readl(addr);
 
                 vpn = data & PMB_PFN_MASK;
 
@@ -424,12 +424,12 @@ int pmb_init(void)
                 WARN_ON(IS_ERR(pmbe));
         }
 
-        ctrl_outl(0, PMB_IRMCR);
+        __raw_writel(0, PMB_IRMCR);
 
         /* Flush out the TLB */
-        i =  ctrl_inl(MMUCR);
+        i =  __raw_readl(MMUCR);
         i |= MMUCR_TI;
-        ctrl_outl(i, MMUCR);
+        __raw_writel(i, MMUCR);
 
         back_to_cached();
 
@@ -454,8 +454,8 @@ static int pmb_seq_show(struct seq_file *file, void *iter)
                 unsigned int size;
                 char *sz_str = NULL;
 
-                addr = ctrl_inl(mk_pmb_addr(i));
-                data = ctrl_inl(mk_pmb_data(i));
+                addr = __raw_readl(mk_pmb_addr(i));
+                data = __raw_readl(mk_pmb_data(i));
 
                 size = data & PMB_SZ_MASK;
                 sz_str = (size == PMB_SZ_16M)  ? " 16MB":
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c
index ace8e6d2f59d..4f5f7cbdd508 100644
--- a/arch/sh/mm/tlb-sh3.c
+++ b/arch/sh/mm/tlb-sh3.c
@@ -41,14 +41,14 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
 
         /* Set PTEH register */
         vpn = (address & MMU_VPN_MASK) | get_asid();
-        ctrl_outl(vpn, MMU_PTEH);
+        __raw_writel(vpn, MMU_PTEH);
 
         pteval = pte_val(pte);
 
         /* Set PTEL register */
         pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
         /* conveniently, we want all the software flags to be 0 anyway */
-        ctrl_outl(pteval, MMU_PTEL);
+        __raw_writel(pteval, MMU_PTEL);
 
         /* Load the TLB */
         asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
@@ -75,5 +75,5 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
         }
 
         for (i = 0; i < ways; i++)
-                ctrl_outl(data, addr + (i << 8));
+                __raw_writel(data, addr + (i << 8));
 }
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index 624c1daa9f3f..ccac77f504a8 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -29,7 +29,7 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
 
         /* Set PTEH register */
         vpn = (address & MMU_VPN_MASK) | get_asid();
-        ctrl_outl(vpn, MMU_PTEH);
+        __raw_writel(vpn, MMU_PTEH);
 
         pteval = pte.pte_low;
 
@@ -41,13 +41,13 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
          * the protection bits (with the exception of the compat-mode SZ
          * and PR bits, which are cleared) being written out in PTEL.
          */
-        ctrl_outl(pte.pte_high, MMU_PTEA);
+        __raw_writel(pte.pte_high, MMU_PTEA);
 #else
         if (cpu_data->flags & CPU_HAS_PTEA) {
                 /* The last 3 bits and the first one of pteval contains
                  * the PTEA timing control and space attribute bits
                  */
-                ctrl_outl(copy_ptea_attributes(pteval), MMU_PTEA);
+                __raw_writel(copy_ptea_attributes(pteval), MMU_PTEA);
         }
 #endif
 
@@ -57,7 +57,7 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
         pteval |= _PAGE_WT;
 #endif
         /* conveniently, we want all the software flags to be 0 anyway */
-        ctrl_outl(pteval, MMU_PTEL);
+        __raw_writel(pteval, MMU_PTEL);
 
         /* Load the TLB */
         asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
@@ -77,6 +77,6 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
         addr = MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT;
         data = page | asid; /* VALID bit is off */
         jump_to_uncached();
-        ctrl_outl(data, addr);
+        __raw_writel(data, addr);
         back_to_cached();
 }
diff --git a/arch/sh/mm/tlbflush_32.c b/arch/sh/mm/tlbflush_32.c
index 6f45c1f8a7fe..004bb3f25b5f 100644
--- a/arch/sh/mm/tlbflush_32.c
+++ b/arch/sh/mm/tlbflush_32.c
@@ -132,9 +132,9 @@ void local_flush_tlb_all(void)
          *      It's same position, bit #2.
          */
         local_irq_save(flags);
-        status = ctrl_inl(MMUCR);
+        status = __raw_readl(MMUCR);
         status |= 0x04;
-        ctrl_outl(status, MMUCR);
+        __raw_writel(status, MMUCR);
         ctrl_barrier();
         local_irq_restore(flags);
 }