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-rw-r--r--arch/sh64/mach-harp/setup.c129
1 files changed, 0 insertions, 129 deletions
diff --git a/arch/sh64/mach-harp/setup.c b/arch/sh64/mach-harp/setup.c
deleted file mode 100644
index 05011cb369bb..000000000000
--- a/arch/sh64/mach-harp/setup.c
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@@ -1,129 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mach-harp/setup.c
7 *
8 * SH-5 Simulator Platform Support
9 *
10 * This file handles the architecture-dependent parts of initialization
11 *
12 * Copyright (C) 2000, 2001 Paolo Alberelli
13 *
14 * benedict.gaster@superh.com: 3rd May 2002
15 * Added support for ramdisk, removing statically linked romfs at the same time. *
16 *
17 * lethal@linux-sh.org: 15th May 2003
18 * Use the generic procfs cpuinfo interface, just return a valid board name.
19 */
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <asm/platform.h>
23#include <asm/irq.h>
24
25/*
26 * Platform Dependent Interrupt Priorities.
27 */
28
29/* Using defaults defined in irq.h */
30#define RES NO_PRIORITY /* Disabled */
31#define IR0 IRL0_PRIORITY /* IRLs */
32#define IR1 IRL1_PRIORITY
33#define IR2 IRL2_PRIORITY
34#define IR3 IRL3_PRIORITY
35#define PCA INTA_PRIORITY /* PCI Ints */
36#define PCB INTB_PRIORITY
37#define PCC INTC_PRIORITY
38#define PCD INTD_PRIORITY
39#define SER TOP_PRIORITY
40#define ERR TOP_PRIORITY
41#define PW0 TOP_PRIORITY
42#define PW1 TOP_PRIORITY
43#define PW2 TOP_PRIORITY
44#define PW3 TOP_PRIORITY
45#define DM0 NO_PRIORITY /* DMA Ints */
46#define DM1 NO_PRIORITY
47#define DM2 NO_PRIORITY
48#define DM3 NO_PRIORITY
49#define DAE NO_PRIORITY
50#define TU0 TIMER_PRIORITY /* TMU Ints */
51#define TU1 NO_PRIORITY
52#define TU2 NO_PRIORITY
53#define TI2 NO_PRIORITY
54#define ATI NO_PRIORITY /* RTC Ints */
55#define PRI NO_PRIORITY
56#define CUI RTC_PRIORITY
57#define ERI SCIF_PRIORITY /* SCIF Ints */
58#define RXI SCIF_PRIORITY
59#define BRI SCIF_PRIORITY
60#define TXI SCIF_PRIORITY
61#define ITI TOP_PRIORITY /* WDT Ints */
62
63/*
64 * Platform dependent structures: maps and parms block.
65 */
66struct resource io_resources[] = {
67 /* To be updated with external devices */
68};
69
70struct resource kram_resources[] = {
71 /* These must be last in the array */
72 { .name = "Kernel code", .start = 0, .end = 0 },
73 /* These must be last in the array */
74 { .name = "Kernel data", .start = 0, .end = 0 }
75};
76
77struct resource xram_resources[] = {
78 /* To be updated with external devices */
79};
80
81struct resource rom_resources[] = {
82 /* To be updated with external devices */
83};
84
85struct sh64_platform platform_parms = {
86 .readonly_rootfs = 1,
87 .initial_root_dev = 0x0100,
88 .loader_type = 1,
89 .io_res_p = io_resources,
90 .io_res_count = ARRAY_SIZE(io_resources),
91 .kram_res_p = kram_resources,
92 .kram_res_count = ARRAY_SIZE(kram_resources),
93 .xram_res_p = xram_resources,
94 .xram_res_count = ARRAY_SIZE(xram_resources),
95 .rom_res_p = rom_resources,
96 .rom_res_count = ARRAY_SIZE(rom_resources),
97};
98
99int platform_int_priority[NR_INTC_IRQS] = {
100 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
101 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
102 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
103 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
104 TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
105 RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
106 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
107 RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
108};
109
110void __init platform_setup(void)
111{
112 /* Harp platform leaves the decision to head.S, for now */
113 platform_parms.fpu_flags = fpu_in_use;
114}
115
116void __init platform_monitor(void)
117{
118 /* Nothing yet .. */
119}
120
121void __init platform_reserve(void)
122{
123 /* Nothing yet .. */
124}
125
126const char *get_system_type(void)
127{
128 return "ST50 Harp";
129}