aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/mm/tlb-sh5.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/sh/mm/tlb-sh5.c')
-rw-r--r--arch/sh/mm/tlb-sh5.c60
1 files changed, 44 insertions, 16 deletions
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c
index dae131243bcc..f27dbe1c1599 100644
--- a/arch/sh/mm/tlb-sh5.c
+++ b/arch/sh/mm/tlb-sh5.c
@@ -117,26 +117,15 @@ int sh64_put_wired_dtlb_entry(unsigned long long entry)
117 * Load up a virtual<->physical translation for @eaddr<->@paddr in the 117 * Load up a virtual<->physical translation for @eaddr<->@paddr in the
118 * pre-allocated TLB slot @config_addr (see sh64_get_wired_dtlb_entry). 118 * pre-allocated TLB slot @config_addr (see sh64_get_wired_dtlb_entry).
119 */ 119 */
120inline void sh64_setup_tlb_slot(unsigned long long config_addr, 120void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr,
121 unsigned long eaddr, 121 unsigned long asid, unsigned long paddr)
122 unsigned long asid,
123 unsigned long paddr)
124{ 122{
125 unsigned long long pteh, ptel; 123 unsigned long long pteh, ptel;
126 124
127 /* Sign extension */ 125 pteh = neff_sign_extend(eaddr);
128#if (NEFF == 32)
129 pteh = (unsigned long long)(signed long long)(signed long) eaddr;
130#else
131#error "Can't sign extend more than 32 bits yet"
132#endif
133 pteh &= PAGE_MASK; 126 pteh &= PAGE_MASK;
134 pteh |= (asid << PTEH_ASID_SHIFT) | PTEH_VALID; 127 pteh |= (asid << PTEH_ASID_SHIFT) | PTEH_VALID;
135#if (NEFF == 32) 128 ptel = neff_sign_extend(paddr);
136 ptel = (unsigned long long)(signed long long)(signed long) paddr;
137#else
138#error "Can't sign extend more than 32 bits yet"
139#endif
140 ptel &= PAGE_MASK; 129 ptel &= PAGE_MASK;
141 ptel |= (_PAGE_CACHABLE | _PAGE_READ | _PAGE_WRITE); 130 ptel |= (_PAGE_CACHABLE | _PAGE_READ | _PAGE_WRITE);
142 131
@@ -152,5 +141,44 @@ inline void sh64_setup_tlb_slot(unsigned long long config_addr,
152 * 141 *
153 * Teardown any existing mapping in the TLB slot @config_addr. 142 * Teardown any existing mapping in the TLB slot @config_addr.
154 */ 143 */
155inline void sh64_teardown_tlb_slot(unsigned long long config_addr) 144void sh64_teardown_tlb_slot(unsigned long long config_addr)
156 __attribute__ ((alias("__flush_tlb_slot"))); 145 __attribute__ ((alias("__flush_tlb_slot")));
146
147static int dtlb_entry;
148static unsigned long long dtlb_entries[64];
149
150void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
151{
152 unsigned long long entry;
153 unsigned long paddr, flags;
154
155 BUG_ON(dtlb_entry == ARRAY_SIZE(dtlb_entries));
156
157 local_irq_save(flags);
158
159 entry = sh64_get_wired_dtlb_entry();
160 dtlb_entries[dtlb_entry++] = entry;
161
162 paddr = pte_val(pte) & _PAGE_FLAGS_HARDWARE_MASK;
163 paddr &= ~PAGE_MASK;
164
165 sh64_setup_tlb_slot(entry, addr, get_asid(), paddr);
166
167 local_irq_restore(flags);
168}
169
170void tlb_unwire_entry(void)
171{
172 unsigned long long entry;
173 unsigned long flags;
174
175 BUG_ON(!dtlb_entry);
176
177 local_irq_save(flags);
178 entry = dtlb_entries[dtlb_entry--];
179
180 sh64_teardown_tlb_slot(entry);
181 sh64_put_wired_dtlb_entry(entry);
182
183 local_irq_restore(flags);
184}