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-rw-r--r--arch/sh/mm/tlb-sh4.c25
1 files changed, 15 insertions, 10 deletions
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index f74cf667c8fa..13fde8cc7179 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -34,22 +34,27 @@ void update_mmu_cache(struct vm_area_struct * vma,
34 unsigned long flags; 34 unsigned long flags;
35 unsigned long pteval; 35 unsigned long pteval;
36 unsigned long vpn; 36 unsigned long vpn;
37 struct page *page;
38 unsigned long pfn;
39 37
40 /* Ptrace may call this routine. */ 38 /* Ptrace may call this routine. */
41 if (vma && current->active_mm != vma->vm_mm) 39 if (vma && current->active_mm != vma->vm_mm)
42 return; 40 return;
43 41
44 pfn = pte_pfn(pte); 42#ifndef CONFIG_CACHE_OFF
45 if (pfn_valid(pfn)) { 43 {
46 page = pfn_to_page(pfn); 44 unsigned long pfn = pte_pfn(pte);
47 if (!test_bit(PG_mapped, &page->flags)) { 45
48 unsigned long phys = pte_val(pte) & PTE_PHYS_MASK; 46 if (pfn_valid(pfn)) {
49 __flush_wback_region((void *)P1SEGADDR(phys), PAGE_SIZE); 47 struct page *page = pfn_to_page(pfn);
50 __set_bit(PG_mapped, &page->flags); 48
49 if (!test_bit(PG_mapped, &page->flags)) {
50 unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
51 __flush_wback_region((void *)P1SEGADDR(phys),
52 PAGE_SIZE);
53 __set_bit(PG_mapped, &page->flags);
54 }
51 } 55 }
52 } 56 }
57#endif
53 58
54 local_irq_save(flags); 59 local_irq_save(flags);
55 60
@@ -66,7 +71,7 @@ void update_mmu_cache(struct vm_area_struct * vma,
66 71
67 /* Set PTEL register */ 72 /* Set PTEL register */
68 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ 73 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
69#ifdef CONFIG_SH_WRITETHROUGH 74#ifdef CONFIG_CACHE_WRITETHROUGH
70 pteval |= _PAGE_WT; 75 pteval |= _PAGE_WT;
71#endif 76#endif
72 /* conveniently, we want all the software flags to be 0 anyway */ 77 /* conveniently, we want all the software flags to be 0 anyway */