diff options
Diffstat (limited to 'arch/sh/mm/tlb-sh3.c')
-rw-r--r-- | arch/sh/mm/tlb-sh3.c | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c index 7a0d5c10bf20..46b09e26e082 100644 --- a/arch/sh/mm/tlb-sh3.c +++ b/arch/sh/mm/tlb-sh3.c | |||
@@ -40,12 +40,17 @@ void update_mmu_cache(struct vm_area_struct * vma, | |||
40 | return; | 40 | return; |
41 | 41 | ||
42 | #if defined(CONFIG_SH7705_CACHE_32KB) | 42 | #if defined(CONFIG_SH7705_CACHE_32KB) |
43 | struct page *page; | 43 | { |
44 | page = pte_page(pte); | 44 | struct page *page = pte_page(pte); |
45 | if (VALID_PAGE(page) && !test_bit(PG_mapped, &page->flags)) { | 45 | unsigned long pfn = pte_pfn(pte); |
46 | unsigned long phys = pte_val(pte) & PTE_PHYS_MASK; | 46 | |
47 | __flush_wback_region((void *)P1SEGADDR(phys), PAGE_SIZE); | 47 | if (pfn_valid(pfn) && !test_bit(PG_mapped, &page->flags)) { |
48 | __set_bit(PG_mapped, &page->flags); | 48 | unsigned long phys = pte_val(pte) & PTE_PHYS_MASK; |
49 | |||
50 | __flush_wback_region((void *)P1SEGADDR(phys), | ||
51 | PAGE_SIZE); | ||
52 | __set_bit(PG_mapped, &page->flags); | ||
53 | } | ||
49 | } | 54 | } |
50 | #endif | 55 | #endif |
51 | 56 | ||
@@ -80,7 +85,7 @@ void __flush_tlb_page(unsigned long asid, unsigned long page) | |||
80 | */ | 85 | */ |
81 | addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000); | 86 | addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000); |
82 | data = (page & 0xfffe0000) | asid; /* VALID bit is off */ | 87 | data = (page & 0xfffe0000) | asid; /* VALID bit is off */ |
83 | 88 | ||
84 | if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) { | 89 | if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) { |
85 | addr |= MMU_PAGE_ASSOC_BIT; | 90 | addr |= MMU_PAGE_ASSOC_BIT; |
86 | ways = 1; /* we already know the way .. */ | 91 | ways = 1; /* we already know the way .. */ |