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-rw-r--r--arch/sh/mm/tlb-flush.c55
1 files changed, 1 insertions, 54 deletions
diff --git a/arch/sh/mm/tlb-flush.c b/arch/sh/mm/tlb-flush.c
index d2f7b4a2eb05..6f45c1f8a7fe 100644
--- a/arch/sh/mm/tlb-flush.c
+++ b/arch/sh/mm/tlb-flush.c
@@ -2,17 +2,15 @@
2 * TLB flushing operations for SH with an MMU. 2 * TLB flushing operations for SH with an MMU.
3 * 3 *
4 * Copyright (C) 1999 Niibe Yutaka 4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2003 - 2006 Paul Mundt 5 * Copyright (C) 2003 Paul Mundt
6 * 6 *
7 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 9 * for more details.
10 */ 10 */
11#include <linux/mm.h> 11#include <linux/mm.h>
12#include <linux/io.h>
13#include <asm/mmu_context.h> 12#include <asm/mmu_context.h>
14#include <asm/tlbflush.h> 13#include <asm/tlbflush.h>
15#include <asm/cacheflush.h>
16 14
17void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) 15void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
18{ 16{
@@ -140,54 +138,3 @@ void local_flush_tlb_all(void)
140 ctrl_barrier(); 138 ctrl_barrier();
141 local_irq_restore(flags); 139 local_irq_restore(flags);
142} 140}
143
144void update_mmu_cache(struct vm_area_struct *vma,
145 unsigned long address, pte_t pte)
146{
147 unsigned long flags;
148 unsigned long pteval;
149 unsigned long vpn;
150 struct page *page;
151 unsigned long pfn = pte_pfn(pte);
152 struct address_space *mapping;
153
154 if (!pfn_valid(pfn))
155 return;
156
157 page = pfn_to_page(pfn);
158 mapping = page_mapping(page);
159 if (mapping) {
160 unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
161 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
162
163 if (dirty)
164 __flush_wback_region((void *)P1SEGADDR(phys),
165 PAGE_SIZE);
166 }
167
168 local_irq_save(flags);
169
170 /* Set PTEH register */
171 vpn = (address & MMU_VPN_MASK) | get_asid();
172 ctrl_outl(vpn, MMU_PTEH);
173
174 pteval = pte_val(pte);
175
176#ifdef CONFIG_CPU_HAS_PTEA
177 /* Set PTEA register */
178 /* TODO: make this look less hacky */
179 ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);
180#endif
181
182 /* Set PTEL register */
183 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
184#if defined(CONFIG_SH_WRITETHROUGH) && defined(CONFIG_CPU_SH4)
185 pteval |= _PAGE_WT;
186#endif
187 /* conveniently, we want all the software flags to be 0 anyway */
188 ctrl_outl(pteval, MMU_PTEL);
189
190 /* Load the TLB */
191 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
192 local_irq_restore(flags);
193}