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-rw-r--r--arch/sh/mm/cache-sh7705.c29
1 files changed, 16 insertions, 13 deletions
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c
index 045abdf078f5..31f8deb7a158 100644
--- a/arch/sh/mm/cache-sh7705.c
+++ b/arch/sh/mm/cache-sh7705.c
@@ -3,11 +3,11 @@
3 * 3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka 4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2004 Alex Song 5 * Copyright (C) 2004 Alex Song
6 * Copyright (C) 2006 Paul Mundt
6 * 7 *
7 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 10 * for more details.
10 *
11 */ 11 */
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mman.h> 13#include <linux/mman.h>
@@ -32,9 +32,9 @@ static inline void cache_wback_all(void)
32{ 32{
33 unsigned long ways, waysize, addrstart; 33 unsigned long ways, waysize, addrstart;
34 34
35 ways = cpu_data->dcache.ways; 35 ways = current_cpu_data.dcache.ways;
36 waysize = cpu_data->dcache.sets; 36 waysize = current_cpu_data.dcache.sets;
37 waysize <<= cpu_data->dcache.entry_shift; 37 waysize <<= current_cpu_data.dcache.entry_shift;
38 38
39 addrstart = CACHE_OC_ADDRESS_ARRAY; 39 addrstart = CACHE_OC_ADDRESS_ARRAY;
40 40
@@ -43,7 +43,7 @@ static inline void cache_wback_all(void)
43 43
44 for (addr = addrstart; 44 for (addr = addrstart;
45 addr < addrstart + waysize; 45 addr < addrstart + waysize;
46 addr += cpu_data->dcache.linesz) { 46 addr += current_cpu_data.dcache.linesz) {
47 unsigned long data; 47 unsigned long data;
48 int v = SH_CACHE_UPDATED | SH_CACHE_VALID; 48 int v = SH_CACHE_UPDATED | SH_CACHE_VALID;
49 49
@@ -51,10 +51,9 @@ static inline void cache_wback_all(void)
51 51
52 if ((data & v) == v) 52 if ((data & v) == v)
53 ctrl_outl(data & ~v, addr); 53 ctrl_outl(data & ~v, addr);
54
55 } 54 }
56 55
57 addrstart += cpu_data->dcache.way_incr; 56 addrstart += current_cpu_data.dcache.way_incr;
58 } while (--ways); 57 } while (--ways);
59} 58}
60 59
@@ -94,9 +93,9 @@ static void __flush_dcache_page(unsigned long phys)
94 local_irq_save(flags); 93 local_irq_save(flags);
95 jump_to_P2(); 94 jump_to_P2();
96 95
97 ways = cpu_data->dcache.ways; 96 ways = current_cpu_data.dcache.ways;
98 waysize = cpu_data->dcache.sets; 97 waysize = current_cpu_data.dcache.sets;
99 waysize <<= cpu_data->dcache.entry_shift; 98 waysize <<= current_cpu_data.dcache.entry_shift;
100 99
101 addrstart = CACHE_OC_ADDRESS_ARRAY; 100 addrstart = CACHE_OC_ADDRESS_ARRAY;
102 101
@@ -105,7 +104,7 @@ static void __flush_dcache_page(unsigned long phys)
105 104
106 for (addr = addrstart; 105 for (addr = addrstart;
107 addr < addrstart + waysize; 106 addr < addrstart + waysize;
108 addr += cpu_data->dcache.linesz) { 107 addr += current_cpu_data.dcache.linesz) {
109 unsigned long data; 108 unsigned long data;
110 109
111 data = ctrl_inl(addr) & (0x1ffffC00 | SH_CACHE_VALID); 110 data = ctrl_inl(addr) & (0x1ffffC00 | SH_CACHE_VALID);
@@ -115,7 +114,7 @@ static void __flush_dcache_page(unsigned long phys)
115 } 114 }
116 } 115 }
117 116
118 addrstart += cpu_data->dcache.way_incr; 117 addrstart += current_cpu_data.dcache.way_incr;
119 } while (--ways); 118 } while (--ways);
120 119
121 back_to_P1(); 120 back_to_P1();
@@ -128,7 +127,11 @@ static void __flush_dcache_page(unsigned long phys)
128 */ 127 */
129void flush_dcache_page(struct page *page) 128void flush_dcache_page(struct page *page)
130{ 129{
131 if (test_bit(PG_mapped, &page->flags)) 130 struct address_space *mapping = page_mapping(page);
131
132 if (mapping && !mapping_mapped(mapping))
133 set_bit(PG_dcache_dirty, &page->flags);
134 else
132 __flush_dcache_page(PHYSADDR(page_address(page))); 135 __flush_dcache_page(PHYSADDR(page_address(page)));
133} 136}
134 137