diff options
Diffstat (limited to 'arch/sh/mm/cache-sh2.c')
-rw-r--r-- | arch/sh/mm/cache-sh2.c | 69 |
1 files changed, 38 insertions, 31 deletions
diff --git a/arch/sh/mm/cache-sh2.c b/arch/sh/mm/cache-sh2.c index 2689cb24ea2b..6614033f6be9 100644 --- a/arch/sh/mm/cache-sh2.c +++ b/arch/sh/mm/cache-sh2.c | |||
@@ -5,6 +5,7 @@ | |||
5 | * | 5 | * |
6 | * Released under the terms of the GNU GPL v2.0. | 6 | * Released under the terms of the GNU GPL v2.0. |
7 | */ | 7 | */ |
8 | |||
8 | #include <linux/init.h> | 9 | #include <linux/init.h> |
9 | #include <linux/mm.h> | 10 | #include <linux/mm.h> |
10 | 11 | ||
@@ -14,37 +15,43 @@ | |||
14 | #include <asm/cacheflush.h> | 15 | #include <asm/cacheflush.h> |
15 | #include <asm/io.h> | 16 | #include <asm/io.h> |
16 | 17 | ||
17 | /* | 18 | void __flush_wback_region(void *start, int size) |
18 | * Calculate the OC address and set the way bit on the SH-2. | ||
19 | * | ||
20 | * We must have already jump_to_P2()'ed prior to calling this | ||
21 | * function, since we rely on CCR manipulation to do the | ||
22 | * Right Thing(tm). | ||
23 | */ | ||
24 | unsigned long __get_oc_addr(unsigned long set, unsigned long way) | ||
25 | { | 19 | { |
26 | unsigned long ccr; | 20 | unsigned long v; |
27 | 21 | unsigned long begin, end; | |
28 | /* | 22 | |
29 | * On SH-2 the way bit isn't tracked in the address field | 23 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); |
30 | * if we're doing address array access .. instead, we need | 24 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) |
31 | * to manually switch out the way in the CCR. | 25 | & ~(L1_CACHE_BYTES-1); |
32 | */ | 26 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { |
33 | ccr = ctrl_inl(CCR); | 27 | /* FIXME cache purge */ |
34 | ccr &= ~0x00c0; | 28 | ctrl_outl((v & 0x1ffffc00), (v & 0x00000ff0) | 0x00000008); |
35 | ccr |= way << cpu_data->dcache.way_shift; | 29 | } |
36 | 30 | } | |
37 | /* | 31 | |
38 | * Despite the number of sets being halved, we end up losing | 32 | void __flush_purge_region(void *start, int size) |
39 | * the first 2 ways to OCRAM instead of the last 2 (if we're | 33 | { |
40 | * 4-way). As a result, forcibly setting the W1 bit handily | 34 | unsigned long v; |
41 | * bumps us up 2 ways. | 35 | unsigned long begin, end; |
42 | */ | 36 | |
43 | if (ccr & CCR_CACHE_ORA) | 37 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); |
44 | ccr |= 1 << (cpu_data->dcache.way_shift + 1); | 38 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) |
45 | 39 | & ~(L1_CACHE_BYTES-1); | |
46 | ctrl_outl(ccr, CCR); | 40 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { |
47 | 41 | ctrl_outl((v & 0x1ffffc00), (v & 0x00000ff0) | 0x00000008); | |
48 | return CACHE_OC_ADDRESS_ARRAY | (set << cpu_data->dcache.entry_shift); | 42 | } |
43 | } | ||
44 | |||
45 | void __flush_invalidate_region(void *start, int size) | ||
46 | { | ||
47 | unsigned long v; | ||
48 | unsigned long begin, end; | ||
49 | |||
50 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); | ||
51 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) | ||
52 | & ~(L1_CACHE_BYTES-1); | ||
53 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | ||
54 | ctrl_outl((v & 0x1ffffc00), (v & 0x00000ff0) | 0x00000008); | ||
55 | } | ||
49 | } | 56 | } |
50 | 57 | ||