diff options
Diffstat (limited to 'arch/sh/mm/cache-sh2.c')
-rw-r--r-- | arch/sh/mm/cache-sh2.c | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/arch/sh/mm/cache-sh2.c b/arch/sh/mm/cache-sh2.c index c4e80d2b764b..defcf719f2e8 100644 --- a/arch/sh/mm/cache-sh2.c +++ b/arch/sh/mm/cache-sh2.c | |||
@@ -16,7 +16,7 @@ | |||
16 | #include <asm/cacheflush.h> | 16 | #include <asm/cacheflush.h> |
17 | #include <asm/io.h> | 17 | #include <asm/io.h> |
18 | 18 | ||
19 | void __flush_wback_region(void *start, int size) | 19 | static void sh2__flush_wback_region(void *start, int size) |
20 | { | 20 | { |
21 | unsigned long v; | 21 | unsigned long v; |
22 | unsigned long begin, end; | 22 | unsigned long begin, end; |
@@ -28,16 +28,16 @@ void __flush_wback_region(void *start, int size) | |||
28 | unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0); | 28 | unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0); |
29 | int way; | 29 | int way; |
30 | for (way = 0; way < 4; way++) { | 30 | for (way = 0; way < 4; way++) { |
31 | unsigned long data = ctrl_inl(addr | (way << 12)); | 31 | unsigned long data = __raw_readl(addr | (way << 12)); |
32 | if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { | 32 | if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { |
33 | data &= ~SH_CACHE_UPDATED; | 33 | data &= ~SH_CACHE_UPDATED; |
34 | ctrl_outl(data, addr | (way << 12)); | 34 | __raw_writel(data, addr | (way << 12)); |
35 | } | 35 | } |
36 | } | 36 | } |
37 | } | 37 | } |
38 | } | 38 | } |
39 | 39 | ||
40 | void __flush_purge_region(void *start, int size) | 40 | static void sh2__flush_purge_region(void *start, int size) |
41 | { | 41 | { |
42 | unsigned long v; | 42 | unsigned long v; |
43 | unsigned long begin, end; | 43 | unsigned long begin, end; |
@@ -47,11 +47,11 @@ void __flush_purge_region(void *start, int size) | |||
47 | & ~(L1_CACHE_BYTES-1); | 47 | & ~(L1_CACHE_BYTES-1); |
48 | 48 | ||
49 | for (v = begin; v < end; v+=L1_CACHE_BYTES) | 49 | for (v = begin; v < end; v+=L1_CACHE_BYTES) |
50 | ctrl_outl((v & CACHE_PHYSADDR_MASK), | 50 | __raw_writel((v & CACHE_PHYSADDR_MASK), |
51 | CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); | 51 | CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); |
52 | } | 52 | } |
53 | 53 | ||
54 | void __flush_invalidate_region(void *start, int size) | 54 | static void sh2__flush_invalidate_region(void *start, int size) |
55 | { | 55 | { |
56 | #ifdef CONFIG_CACHE_WRITEBACK | 56 | #ifdef CONFIG_CACHE_WRITEBACK |
57 | /* | 57 | /* |
@@ -63,9 +63,9 @@ void __flush_invalidate_region(void *start, int size) | |||
63 | local_irq_save(flags); | 63 | local_irq_save(flags); |
64 | jump_to_uncached(); | 64 | jump_to_uncached(); |
65 | 65 | ||
66 | ccr = ctrl_inl(CCR); | 66 | ccr = __raw_readl(CCR); |
67 | ccr |= CCR_CACHE_INVALIDATE; | 67 | ccr |= CCR_CACHE_INVALIDATE; |
68 | ctrl_outl(ccr, CCR); | 68 | __raw_writel(ccr, CCR); |
69 | 69 | ||
70 | back_to_cached(); | 70 | back_to_cached(); |
71 | local_irq_restore(flags); | 71 | local_irq_restore(flags); |
@@ -78,7 +78,14 @@ void __flush_invalidate_region(void *start, int size) | |||
78 | & ~(L1_CACHE_BYTES-1); | 78 | & ~(L1_CACHE_BYTES-1); |
79 | 79 | ||
80 | for (v = begin; v < end; v+=L1_CACHE_BYTES) | 80 | for (v = begin; v < end; v+=L1_CACHE_BYTES) |
81 | ctrl_outl((v & CACHE_PHYSADDR_MASK), | 81 | __raw_writel((v & CACHE_PHYSADDR_MASK), |
82 | CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); | 82 | CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); |
83 | #endif | 83 | #endif |
84 | } | 84 | } |
85 | |||
86 | void __init sh2_cache_init(void) | ||
87 | { | ||
88 | __flush_wback_region = sh2__flush_wback_region; | ||
89 | __flush_purge_region = sh2__flush_purge_region; | ||
90 | __flush_invalidate_region = sh2__flush_invalidate_region; | ||
91 | } | ||