3 files changed, 3 insertions, 6 deletions

diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 0586bc62ad96..9bf19b00696a 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -248,9 +248,6 @@ asmlinkage void do_softirq(void)
 
 void __init init_IRQ(void)
 {
-#ifdef CONFIG_CPU_HAS_PINT_IRQ
-        init_IRQ_pint();
-#endif
         plat_irq_setup();
 
         /* Perform the machine specific initialisation */
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index c0b3c6f6edb5..a55ac81d795b 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -630,7 +630,7 @@ static int misaligned_fpu_load(struct pt_regs *regs,
                                 current->thread.fpu.hard.fp_regs[destreg] = buflo;
                                 current->thread.fpu.hard.fp_regs[destreg+1] = bufhi;
                         } else {
-#if defined(CONFIG_LITTLE_ENDIAN)
+#if defined(CONFIG_CPU_LITTLE_ENDIAN)
                                 current->thread.fpu.hard.fp_regs[destreg] = bufhi;
                                 current->thread.fpu.hard.fp_regs[destreg+1] = buflo;
 #else
@@ -700,7 +700,7 @@ static int misaligned_fpu_store(struct pt_regs *regs,
                                 buflo = current->thread.fpu.hard.fp_regs[srcreg];
                                 bufhi = current->thread.fpu.hard.fp_regs[srcreg+1];
                         } else {
-#if defined(CONFIG_LITTLE_ENDIAN)
+#if defined(CONFIG_CPU_LITTLE_ENDIAN)
                                 bufhi = current->thread.fpu.hard.fp_regs[srcreg];
                                 buflo = current->thread.fpu.hard.fp_regs[srcreg+1];
 #else
diff --git a/arch/sh/kernel/vmlinux_64.lds.S b/arch/sh/kernel/vmlinux_64.lds.S
index 3f1bd6392bb3..d1e177009a41 100644
--- a/arch/sh/kernel/vmlinux_64.lds.S
+++ b/arch/sh/kernel/vmlinux_64.lds.S
@@ -51,7 +51,7 @@ SECTIONS
                 KPROBES_TEXT
                 *(.fixup)
                 *(.gnu.warning)
-#ifdef CONFIG_LITTLE_ENDIAN
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
         } = 0x6ff0fff0
 #else
         } = 0xf0fff06f