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-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c66
1 files changed, 51 insertions, 15 deletions
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 07e5377bf550..b7c702821e6f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -52,17 +52,11 @@ static int __init sh7760_devices_setup(void)
52} 52}
53__initcall(sh7760_devices_setup); 53__initcall(sh7760_devices_setup);
54 54
55/*
56 * SH7760 INTC2-Style interrupts, vectors IRQ48-111 INTEVT 0x800-0xFE0
57 */
58static struct intc2_data intc2_irq_table[] = { 55static struct intc2_data intc2_irq_table[] = {
59 /* INTPRIO0 | INTMSK0 */
60 {48, 0, 28, 0, 31, 3}, /* IRQ 4 */ 56 {48, 0, 28, 0, 31, 3}, /* IRQ 4 */
61 {49, 0, 24, 0, 30, 3}, /* IRQ 3 */ 57 {49, 0, 24, 0, 30, 3}, /* IRQ 3 */
62 {50, 0, 20, 0, 29, 3}, /* IRQ 2 */ 58 {50, 0, 20, 0, 29, 3}, /* IRQ 2 */
63 {51, 0, 16, 0, 28, 3}, /* IRQ 1 */ 59 {51, 0, 16, 0, 28, 3}, /* IRQ 1 */
64 /* 52-55 (INTEVT 0x880-0x8E0) unused/reserved */
65 /* INTPRIO4 | INTMSK0 */
66 {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */ 60 {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
67 {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */ 61 {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
68 {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */ 62 {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
@@ -71,18 +65,15 @@ static struct intc2_data intc2_irq_table[] = {
71 {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */ 65 {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
72 {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */ 66 {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
73 {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */ 67 {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
74 /* INTPRIO8 | INTMSK0 */
75 {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */ 68 {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
76 {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */ 69 {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
77 {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */ 70 {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
78 {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */ 71 {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
79 {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */ 72 {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
80 {65, 8, 24, 0, 16, 3}, /* LCDC */ 73 {65, 8, 24, 0, 16, 3}, /* LCDC */
81 /* 66, 67 unused */
82 {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */ 74 {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
83 {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */ 75 {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
84 {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */ 76 {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
85 /* 71 unused */
86 {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */ 77 {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
87 {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */ 78 {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
88 {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */ 79 {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
@@ -91,26 +82,71 @@ static struct intc2_data intc2_irq_table[] = {
91 {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */ 82 {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
92 {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */ 83 {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
93 {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */ 84 {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
94 /* | INTMSK4 */
95 {80, 8, 4, 4, 23, 3}, /* SIM_ERI */ 85 {80, 8, 4, 4, 23, 3}, /* SIM_ERI */
96 {81, 8, 4, 4, 22, 3}, /* SIM_RXI */ 86 {81, 8, 4, 4, 22, 3}, /* SIM_RXI */
97 {82, 8, 4, 4, 21, 3}, /* SIM_TXI */ 87 {82, 8, 4, 4, 21, 3}, /* SIM_TXI */
98 {83, 8, 4, 4, 20, 3}, /* SIM_TEI */ 88 {83, 8, 4, 4, 20, 3}, /* SIM_TEI */
99 {84, 8, 0, 4, 19, 3}, /* HSPII */ 89 {84, 8, 0, 4, 19, 3}, /* HSPII */
100 /* INTPRIOC | INTMSK4 */
101 /* 85-87 unused/reserved */
102 {88, 12, 20, 4, 18, 3}, /* MMCI0 */ 90 {88, 12, 20, 4, 18, 3}, /* MMCI0 */
103 {89, 12, 20, 4, 17, 3}, /* MMCI1 */ 91 {89, 12, 20, 4, 17, 3}, /* MMCI1 */
104 {90, 12, 20, 4, 16, 3}, /* MMCI2 */ 92 {90, 12, 20, 4, 16, 3}, /* MMCI2 */
105 {91, 12, 20, 4, 15, 3}, /* MMCI3 */ 93 {91, 12, 20, 4, 15, 3}, /* MMCI3 */
106 {92, 12, 12, 4, 6, 3}, /* MFI (unsure, bug? in my 7760 manual*/ 94 {92, 12, 12, 4, 6, 3}, /* MFI */
107 /* 93-107 reserved/undocumented */
108 {108,12, 4, 4, 1, 3}, /* ADC */ 95 {108,12, 4, 4, 1, 3}, /* ADC */
109 {109,12, 0, 4, 0, 3}, /* CMTI */ 96 {109,12, 0, 4, 0, 3}, /* CMTI */
110 /* 110-111 reserved/unused */
111}; 97};
112 98
99static struct ipr_data sh7760_ipr_map[] = {
100 /* IRQ, IPR-idx, shift, priority */
101 { 16, 0, 12, 2 }, /* TMU0 TUNI*/
102 { 17, 0, 8, 2 }, /* TMU1 TUNI */
103 { 18, 0, 4, 2 }, /* TMU2 TUNI */
104 { 19, 0, 4, 2 }, /* TMU2 TIPCI */
105 { 27, 1, 12, 2 }, /* WDT ITI */
106 { 28, 1, 8, 2 }, /* REF RCMI */
107 { 29, 1, 8, 2 }, /* REF ROVI */
108 { 32, 2, 0, 7 }, /* HUDI */
109 { 33, 2, 12, 7 }, /* GPIOI */
110 { 34, 2, 8, 7 }, /* DMAC DMTE0 */
111 { 35, 2, 8, 7 }, /* DMAC DMTE1 */
112 { 36, 2, 8, 7 }, /* DMAC DMTE2 */
113 { 37, 2, 8, 7 }, /* DMAC DMTE3 */
114 { 38, 2, 8, 7 }, /* DMAC DMAE */
115 { 44, 2, 8, 7 }, /* DMAC DMTE4 */
116 { 45, 2, 8, 7 }, /* DMAC DMTE5 */
117 { 46, 2, 8, 7 }, /* DMAC DMTE6 */
118 { 47, 2, 8, 7 }, /* DMAC DMTE7 */
119/* these here are only valid if INTC_ICR bit 7 is set to 1!
120 * XXX: maybe CONFIG_SH_IRLMODE symbol? SH7751 could use it too */
121#if 0
122 { 2, 3, 12, 3 }, /* IRL0 */
123 { 5, 3, 8, 3 }, /* IRL1 */
124 { 8, 3, 4, 3 }, /* IRL2 */
125 { 11, 3, 0, 3 }, /* IRL3 */
126#endif
127};
128
129static unsigned long ipr_offsets[] = {
130 0xffd00004UL, /* 0: IPRA */
131 0xffd00008UL, /* 1: IPRB */
132 0xffd0000cUL, /* 2: IPRC */
133 0xffd00010UL, /* 3: IPRD */
134};
135
136/* given the IPR index return the address of the IPR register */
137unsigned int map_ipridx_to_addr(int idx)
138{
139 if (idx >= ARRAY_SIZE(ipr_offsets))
140 return 0;
141 return ipr_offsets[idx];
142}
143
113void __init init_IRQ_intc2(void) 144void __init init_IRQ_intc2(void)
114{ 145{
115 make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table)); 146 make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
116} 147}
148
149void __init init_IRQ_ipr(void)
150{
151 make_ipr_irq(sh7760_ipr_map, ARRAY_SIZE(sh7760_ipr_map));
152}