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-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index c7155f9b10f5..3ef5825ffa9e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -687,6 +687,31 @@ static struct clk sh7722_mstpcr[] = {
687} 687}
688 688
689static struct clk sh7722_mstpcr_clocks[] = { 689static struct clk sh7722_mstpcr_clocks[] = {
690#if defined(CONFIG_CPU_SUBTYPE_SH7722)
691 MSTPCR("uram0", "umem_clk", 0, 28),
692 MSTPCR("xymem0", "bus_clk", 0, 26),
693 MSTPCR("tmu0", "peripheral_clk", 0, 15),
694 MSTPCR("cmt0", "r_clk", 0, 14),
695 MSTPCR("rwdt0", "r_clk", 0, 13),
696 MSTPCR("flctl0", "peripheral_clk", 0, 10),
697 MSTPCR("scif0", "peripheral_clk", 0, 7),
698 MSTPCR("scif1", "peripheral_clk", 0, 6),
699 MSTPCR("scif2", "peripheral_clk", 0, 5),
700 MSTPCR("i2c0", "peripheral_clk", 1, 9),
701 MSTPCR("rtc0", "r_clk", 1, 8),
702 MSTPCR("sdhi0", "peripheral_clk", 2, 18),
703 MSTPCR("keysc0", "r_clk", 2, 14),
704 MSTPCR("usbf0", "peripheral_clk", 2, 11),
705 MSTPCR("2dg0", "bus_clk", 2, 9),
706 MSTPCR("siu0", "bus_clk", 2, 8),
707 MSTPCR("vou0", "bus_clk", 2, 5),
708 MSTPCR("jpu0", "bus_clk", 2, 6),
709 MSTPCR("beu0", "bus_clk", 2, 4),
710 MSTPCR("ceu0", "bus_clk", 2, 3),
711 MSTPCR("veu0", "bus_clk", 2, 2),
712 MSTPCR("vpu0", "bus_clk", 2, 1),
713 MSTPCR("lcdc0", "bus_clk", 2, 0),
714#endif
690}; 715};
691 716
692static struct clk *sh7722_clocks[] = { 717static struct clk *sh7722_clocks[] = {