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-rw-r--r--arch/sh/kernel/process.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 4a32550fd7c6..c4aa687ba26a 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -302,9 +302,11 @@ ubc_set_tracing(int asid, unsigned long pc)
302{ 302{
303 ctrl_outl(pc, UBC_BARA); 303 ctrl_outl(pc, UBC_BARA);
304 304
305#ifdef CONFIG_MMU
305 /* We don't have any ASID settings for the SH-2! */ 306 /* We don't have any ASID settings for the SH-2! */
306 if (cpu_data->type != CPU_SH7604) 307 if (cpu_data->type != CPU_SH7604)
307 ctrl_outb(asid, UBC_BASRA); 308 ctrl_outb(asid, UBC_BASRA);
309#endif
308 310
309 ctrl_outl(0, UBC_BAMRA); 311 ctrl_outl(0, UBC_BAMRA);
310 312
@@ -347,6 +349,7 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne
347 } 349 }
348#endif 350#endif
349 351
352#ifdef CONFIG_MMU
350 /* 353 /*
351 * Restore the kernel mode register 354 * Restore the kernel mode register
352 * k7 (r7_bank1) 355 * k7 (r7_bank1)
@@ -354,19 +357,21 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne
354 asm volatile("ldc %0, r7_bank" 357 asm volatile("ldc %0, r7_bank"
355 : /* no output */ 358 : /* no output */
356 : "r" (task_thread_info(next))); 359 : "r" (task_thread_info(next)));
360#endif
357 361
358#ifdef CONFIG_MMU
359 /* If no tasks are using the UBC, we're done */ 362 /* If no tasks are using the UBC, we're done */
360 if (ubc_usercnt == 0) 363 if (ubc_usercnt == 0)
361 /* If no tasks are using the UBC, we're done */; 364 /* If no tasks are using the UBC, we're done */;
362 else if (next->thread.ubc_pc && next->mm) { 365 else if (next->thread.ubc_pc && next->mm) {
363 ubc_set_tracing(next->mm->context & MMU_CONTEXT_ASID_MASK, 366 int asid = 0;
364 next->thread.ubc_pc); 367#ifdef CONFIG_MMU
368 asid |= next->mm->context & MMU_CONTEXT_ASID_MASK;
369#endif
370 ubc_set_tracing(asid, next->thread.ubc_pc);
365 } else { 371 } else {
366 ctrl_outw(0, UBC_BBRA); 372 ctrl_outw(0, UBC_BBRA);
367 ctrl_outw(0, UBC_BBRB); 373 ctrl_outw(0, UBC_BBRB);
368 } 374 }
369#endif
370 375
371 return prev; 376 return prev;
372} 377}