diff options
Diffstat (limited to 'arch/sh/kernel/cpu')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7343.c | 18 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7366.c | 18 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7722.c | 11 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7723.c | 11 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 26 |
5 files changed, 65 insertions, 19 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c index a63cdcaee0b2..9e4992a08e51 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <asm/clkdev.h> | ||
24 | #include <asm/clock.h> | 25 | #include <asm/clock.h> |
25 | 26 | ||
26 | /* SH7343 registers */ | 27 | /* SH7343 registers */ |
@@ -135,8 +136,10 @@ struct clk div4_clks[DIV4_NR] = { | |||
135 | [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), | 136 | [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), |
136 | }; | 137 | }; |
137 | 138 | ||
138 | struct clk div6_clks[] = { | 139 | enum { DIV6_V, DIV6_NR }; |
139 | SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), | 140 | |
141 | struct clk div6_clks[DIV6_NR] = { | ||
142 | [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), | ||
140 | }; | 143 | }; |
141 | 144 | ||
142 | #define MSTP(_str, _parent, _reg, _bit, _flags) \ | 145 | #define MSTP(_str, _parent, _reg, _bit, _flags) \ |
@@ -189,6 +192,13 @@ static struct clk mstp_clks[] = { | |||
189 | MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0), | 192 | MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0), |
190 | }; | 193 | }; |
191 | 194 | ||
195 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } | ||
196 | |||
197 | static struct clk_lookup lookups[] = { | ||
198 | /* DIV6 clocks */ | ||
199 | CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), | ||
200 | }; | ||
201 | |||
192 | int __init arch_clk_init(void) | 202 | int __init arch_clk_init(void) |
193 | { | 203 | { |
194 | int k, ret = 0; | 204 | int k, ret = 0; |
@@ -202,11 +212,13 @@ int __init arch_clk_init(void) | |||
202 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) | 212 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) |
203 | ret = clk_register(main_clks[k]); | 213 | ret = clk_register(main_clks[k]); |
204 | 214 | ||
215 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | ||
216 | |||
205 | if (!ret) | 217 | if (!ret) |
206 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); | 218 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); |
207 | 219 | ||
208 | if (!ret) | 220 | if (!ret) |
209 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); | 221 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); |
210 | 222 | ||
211 | if (!ret) | 223 | if (!ret) |
212 | ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); | 224 | ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c index f99db94cf8fb..4eeeb240823e 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <asm/clkdev.h> | ||
24 | #include <asm/clock.h> | 25 | #include <asm/clock.h> |
25 | 26 | ||
26 | /* SH7366 registers */ | 27 | /* SH7366 registers */ |
@@ -138,8 +139,10 @@ struct clk div4_clks[DIV4_NR] = { | |||
138 | [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), | 139 | [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), |
139 | }; | 140 | }; |
140 | 141 | ||
141 | struct clk div6_clks[] = { | 142 | enum { DIV6_V, DIV6_NR }; |
142 | SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), | 143 | |
144 | struct clk div6_clks[DIV6_NR] = { | ||
145 | [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), | ||
143 | }; | 146 | }; |
144 | 147 | ||
145 | #define MSTP(_str, _parent, _reg, _bit, _flags) \ | 148 | #define MSTP(_str, _parent, _reg, _bit, _flags) \ |
@@ -189,6 +192,13 @@ static struct clk mstp_clks[] = { | |||
189 | MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0), | 192 | MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0), |
190 | }; | 193 | }; |
191 | 194 | ||
195 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } | ||
196 | |||
197 | static struct clk_lookup lookups[] = { | ||
198 | /* DIV6 clocks */ | ||
199 | CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), | ||
200 | }; | ||
201 | |||
192 | int __init arch_clk_init(void) | 202 | int __init arch_clk_init(void) |
193 | { | 203 | { |
194 | int k, ret = 0; | 204 | int k, ret = 0; |
@@ -202,11 +212,13 @@ int __init arch_clk_init(void) | |||
202 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) | 212 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) |
203 | ret = clk_register(main_clks[k]); | 213 | ret = clk_register(main_clks[k]); |
204 | 214 | ||
215 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | ||
216 | |||
205 | if (!ret) | 217 | if (!ret) |
206 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); | 218 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); |
207 | 219 | ||
208 | if (!ret) | 220 | if (!ret) |
209 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); | 221 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); |
210 | 222 | ||
211 | if (!ret) | 223 | if (!ret) |
212 | ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); | 224 | ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c index 151bc3e219ac..d8a7ad8a83b3 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c | |||
@@ -149,8 +149,10 @@ struct clk div4_reparent_clks[DIV4_REPARENT_NR] = { | |||
149 | [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), | 149 | [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), |
150 | }; | 150 | }; |
151 | 151 | ||
152 | struct clk div6_clks[] = { | 152 | enum { DIV6_V, DIV6_NR }; |
153 | SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), | 153 | |
154 | struct clk div6_clks[DIV6_NR] = { | ||
155 | [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), | ||
154 | }; | 156 | }; |
155 | 157 | ||
156 | static struct clk mstp_clks[HWBLK_NR] = { | 158 | static struct clk mstp_clks[HWBLK_NR] = { |
@@ -184,6 +186,9 @@ static struct clk mstp_clks[HWBLK_NR] = { | |||
184 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } | 186 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } |
185 | 187 | ||
186 | static struct clk_lookup lookups[] = { | 188 | static struct clk_lookup lookups[] = { |
189 | /* DIV6 clocks */ | ||
190 | CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), | ||
191 | |||
187 | /* MSTP clocks */ | 192 | /* MSTP clocks */ |
188 | CLKDEV_CON_ID("uram0", &mstp_clks[HWBLK_URAM]), | 193 | CLKDEV_CON_ID("uram0", &mstp_clks[HWBLK_URAM]), |
189 | CLKDEV_CON_ID("xymem0", &mstp_clks[HWBLK_XYMEM]), | 194 | CLKDEV_CON_ID("xymem0", &mstp_clks[HWBLK_XYMEM]), |
@@ -265,7 +270,7 @@ int __init arch_clk_init(void) | |||
265 | DIV4_REPARENT_NR, &div4_table); | 270 | DIV4_REPARENT_NR, &div4_table); |
266 | 271 | ||
267 | if (!ret) | 272 | if (!ret) |
268 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); | 273 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); |
269 | 274 | ||
270 | if (!ret) | 275 | if (!ret) |
271 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); | 276 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c index b4331854f57b..edb2414896b1 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c | |||
@@ -149,8 +149,10 @@ struct clk div4_reparent_clks[DIV4_REPARENT_NR] = { | |||
149 | [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0), | 149 | [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0), |
150 | [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0), | 150 | [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0), |
151 | }; | 151 | }; |
152 | struct clk div6_clks[] = { | 152 | enum { DIV6_V, DIV6_NR }; |
153 | SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), | 153 | |
154 | struct clk div6_clks[DIV6_NR] = { | ||
155 | [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), | ||
154 | }; | 156 | }; |
155 | 157 | ||
156 | static struct clk mstp_clks[] = { | 158 | static struct clk mstp_clks[] = { |
@@ -209,6 +211,9 @@ static struct clk mstp_clks[] = { | |||
209 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } | 211 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } |
210 | 212 | ||
211 | static struct clk_lookup lookups[] = { | 213 | static struct clk_lookup lookups[] = { |
214 | /* DIV6 clocks */ | ||
215 | CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), | ||
216 | |||
212 | /* MSTP clocks */ | 217 | /* MSTP clocks */ |
213 | CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]), | 218 | CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]), |
214 | CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]), | 219 | CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]), |
@@ -341,7 +346,7 @@ int __init arch_clk_init(void) | |||
341 | DIV4_REPARENT_NR, &div4_table); | 346 | DIV4_REPARENT_NR, &div4_table); |
342 | 347 | ||
343 | if (!ret) | 348 | if (!ret) |
344 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); | 349 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); |
345 | 350 | ||
346 | if (!ret) | 351 | if (!ret) |
347 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); | 352 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c index 6f3d400f2f20..ad57c007b05c 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c | |||
@@ -164,12 +164,17 @@ struct clk div4_clks[DIV4_NR] = { | |||
164 | [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), | 164 | [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), |
165 | }; | 165 | }; |
166 | 166 | ||
167 | struct clk div6_clks[] = { | 167 | enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR }; |
168 | SH_CLK_DIV6("video_clk", &div3_clk, VCLKCR, 0), | 168 | |
169 | SH_CLK_DIV6("fsia_clk", &div3_clk, FCLKACR, 0), | 169 | #define DIV6(_str, _reg, _flags) \ |
170 | SH_CLK_DIV6("fsib_clk", &div3_clk, FCLKBCR, 0), | 170 | SH_CLK_DIV6(_str, &div3_clk, _reg, _flags) |
171 | SH_CLK_DIV6("irda_clk", &div3_clk, IRDACLKCR, 0), | 171 | |
172 | SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT), | 172 | struct clk div6_clks[DIV6_NR] = { |
173 | [DIV6_V] = DIV6("video_clk", VCLKCR, 0), | ||
174 | [DIV6_FA] = DIV6("fsia_clk", FCLKACR, 0), | ||
175 | [DIV6_FB] = DIV6("fsib_clk", FCLKBCR, 0), | ||
176 | [DIV6_I] = DIV6("irda_clk", IRDACLKCR, 0), | ||
177 | [DIV6_S] = DIV6("spu_clk", SPUCLKCR, CLK_ENABLE_ON_INIT), | ||
173 | }; | 178 | }; |
174 | 179 | ||
175 | static struct clk mstp_clks[HWBLK_NR] = { | 180 | static struct clk mstp_clks[HWBLK_NR] = { |
@@ -232,6 +237,13 @@ static struct clk mstp_clks[HWBLK_NR] = { | |||
232 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } | 237 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } |
233 | 238 | ||
234 | static struct clk_lookup lookups[] = { | 239 | static struct clk_lookup lookups[] = { |
240 | /* DIV6 clocks */ | ||
241 | CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), | ||
242 | CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]), | ||
243 | CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]), | ||
244 | CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]), | ||
245 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]), | ||
246 | |||
235 | /* MSTP clocks */ | 247 | /* MSTP clocks */ |
236 | CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]), | 248 | CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]), |
237 | CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]), | 249 | CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]), |
@@ -360,7 +372,7 @@ int __init arch_clk_init(void) | |||
360 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); | 372 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); |
361 | 373 | ||
362 | if (!ret) | 374 | if (!ret) |
363 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); | 375 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); |
364 | 376 | ||
365 | if (!ret) | 377 | if (!ret) |
366 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); | 378 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); |