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-rw-r--r--arch/sh/kernel/cpu/shmobile/pm.c42
1 files changed, 15 insertions, 27 deletions
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c
index 8c067adf6830..ee3c2aaf66fb 100644
--- a/arch/sh/kernel/cpu/shmobile/pm.c
+++ b/arch/sh/kernel/cpu/shmobile/pm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh/kernel/cpu/sh4a/pm-sh_mobile.c 2 * arch/sh/kernel/cpu/shmobile/pm.c
3 * 3 *
4 * Power management support code for SuperH Mobile 4 * Power management support code for SuperH Mobile
5 * 5 *
@@ -32,40 +32,20 @@
32 * 32 *
33 * R-standby mode is unsupported, but will be added in the future 33 * R-standby mode is unsupported, but will be added in the future
34 * U-standby mode is low priority since it needs bootloader hacks 34 * U-standby mode is low priority since it needs bootloader hacks
35 *
36 * All modes should be tied in with cpuidle. But before that can
37 * happen we need to keep track of enabled hardware blocks so we
38 * can avoid entering sleep modes that stop clocks to hardware
39 * blocks that are in use even though the cpu core is idle.
40 */ 35 */
41 36
37#define ILRAM_BASE 0xe5200000
38
42extern const unsigned char sh_mobile_standby[]; 39extern const unsigned char sh_mobile_standby[];
43extern const unsigned int sh_mobile_standby_size; 40extern const unsigned int sh_mobile_standby_size;
44 41
45static void sh_mobile_call_standby(unsigned long mode) 42void sh_mobile_call_standby(unsigned long mode)
46{ 43{
47 extern void *vbr_base; 44 void *onchip_mem = (void *)ILRAM_BASE;
48 void *onchip_mem = (void *)0xe5200000; /* ILRAM */ 45 void (*standby_onchip_mem)(unsigned long, unsigned long) = onchip_mem;
49 void (*standby_onchip_mem)(unsigned long) = onchip_mem;
50
51 /* Note: Wake up from sleep may generate exceptions!
52 * Setup VBR to point to on-chip ram if self-refresh is
53 * going to be used.
54 */
55 if (mode & SUSP_SH_SF)
56 asm volatile("ldc %0, vbr" : : "r" (onchip_mem) : "memory");
57
58 /* Copy the assembly snippet to the otherwise ununsed ILRAM */
59 memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
60 wmb();
61 ctrl_barrier();
62 46
63 /* Let assembly snippet in on-chip memory handle the rest */ 47 /* Let assembly snippet in on-chip memory handle the rest */
64 standby_onchip_mem(mode); 48 standby_onchip_mem(mode, ILRAM_BASE);
65
66 /* Put VBR back in System RAM again */
67 if (mode & SUSP_SH_SF)
68 asm volatile("ldc %0, vbr" : : "r" (&vbr_base) : "memory");
69} 49}
70 50
71static int sh_pm_enter(suspend_state_t state) 51static int sh_pm_enter(suspend_state_t state)
@@ -85,7 +65,15 @@ static struct platform_suspend_ops sh_pm_ops = {
85 65
86static int __init sh_pm_init(void) 66static int __init sh_pm_init(void)
87{ 67{
68 void *onchip_mem = (void *)ILRAM_BASE;
69
70 /* Copy the assembly snippet to the otherwise ununsed ILRAM */
71 memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
72 wmb();
73 ctrl_barrier();
74
88 suspend_set_ops(&sh_pm_ops); 75 suspend_set_ops(&sh_pm_ops);
76 sh_mobile_setup_cpuidle();
89 return 0; 77 return 0;
90} 78}
91 79