1 files changed, 4 insertions, 61 deletions

diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index 7e49cb812f8b..b0aacf675258 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -812,27 +812,6 @@ no_underflow:
         ! exceptions
         add     SP, ZERO, r14
 
-#ifdef CONFIG_POOR_MANS_STRACE
-        /* We've pushed all the registers now, so only r2-r4 hold anything
-         * useful. Move them into callee save registers */
-        or      r2, ZERO, r28
-        or      r3, ZERO, r29
-        or      r4, ZERO, r30
-
-        /* Preserve r2 as the event code */
-        movi    evt_debug, r3
-        ori     r3, 1, r3
-        ptabs   r3, tr0
-
-        or      SP, ZERO, r6
-        getcon  TRA, r5
-        blink   tr0, LINK
-
-        or      r28, ZERO, r2
-        or      r29, ZERO, r3
-        or      r30, ZERO, r4
-#endif
-
         /* For syscall and debug race condition, get TRA now */
         getcon  TRA, r5
 
@@ -887,11 +866,6 @@ no_underflow:
  */
         .global ret_from_irq
 ret_from_irq:
-#ifdef CONFIG_POOR_MANS_STRACE
-        pta     evt_debug_ret_from_irq, tr0
-        ori     SP, 0, r2
-        blink   tr0, LINK
-#endif
         ld.q    SP, FRAME_S(FSSR), r6
         shlri   r6, 30, r6
         andi    r6, 1, r6
@@ -905,12 +879,6 @@ ret_from_irq:
 ret_from_exception:
         preempt_stop()
 
-#ifdef CONFIG_POOR_MANS_STRACE
-        pta     evt_debug_ret_from_exc, tr0
-        ori     SP, 0, r2
-        blink   tr0, LINK
-#endif
-
         ld.q    SP, FRAME_S(FSSR), r6
         shlri   r6, 30, r6
         andi    r6, 1, r6
@@ -1236,18 +1204,6 @@ syscall_bad:
         .global syscall_ret
 syscall_ret:
         st.q    SP, FRAME_R(9), r2      /* Expecting SP back to BASIC frame */
-
-#ifdef CONFIG_POOR_MANS_STRACE
-        /* nothing useful in registers at this point */
-
-        movi    evt_debug2, r5
-        ori     r5, 1, r5
-        ptabs   r5, tr0
-        ld.q    SP, FRAME_R(9), r2
-        or      SP, ZERO, r3
-        blink   tr0, LINK
-#endif
-
         ld.q    SP, FRAME_S(FSPC), r2
         addi    r2, 4, r2               /* Move PC, being pre-execution event */
         st.q    SP, FRAME_S(FSPC), r2
@@ -1268,25 +1224,12 @@ ret_from_fork:
         ptabs   r5, tr0
         blink   tr0, LINK
 
-#ifdef CONFIG_POOR_MANS_STRACE
-        /* nothing useful in registers at this point */
-
-        movi    evt_debug2, r5
-        ori     r5, 1, r5
-        ptabs   r5, tr0
-        ld.q    SP, FRAME_R(9), r2
-        or      SP, ZERO, r3
-        blink   tr0, LINK
-#endif
-
         ld.q    SP, FRAME_S(FSPC), r2
         addi    r2, 4, r2               /* Move PC, being pre-execution event */
         st.q    SP, FRAME_S(FSPC), r2
         pta     ret_from_syscall, tr0
         blink   tr0, ZERO
 
-
-
 syscall_allowed:
         /* Use LINK to deflect the exit point, default is syscall_ret */
         pta     syscall_ret, tr0
@@ -1410,8 +1353,8 @@ peek_real_address_q:
            r2(out) : result quadword
 
            This is provided as a cheapskate way of manipulating device
-           registers for debugging (to avoid the need to onchip_remap the debug
-           module, and to avoid the need to onchip_remap the watchpoint
+           registers for debugging (to avoid the need to ioremap the debug
+           module, and to avoid the need to ioremap the watchpoint
            controller in a way that identity maps sufficient bits to avoid the
            SH5-101 cut2 silicon defect).
 
@@ -1459,8 +1402,8 @@ poke_real_address_q:
            r3 : quadword value to write.
 
            This is provided as a cheapskate way of manipulating device
-           registers for debugging (to avoid the need to onchip_remap the debug
-           module, and to avoid the need to onchip_remap the watchpoint
+           registers for debugging (to avoid the need to ioremap the debug
+           module, and to avoid the need to ioremap the watchpoint
            controller in a way that identity maps sufficient bits to avoid the
            SH5-101 cut2 silicon defect).