diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 10 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 13 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 19 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-shx3.c | 14 |
4 files changed, 13 insertions, 43 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index b9c6547c4a90..73c778d40d13 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c | |||
@@ -157,14 +157,6 @@ static struct intc_group groups[] __initdata = { | |||
157 | INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), | 157 | INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), |
158 | }; | 158 | }; |
159 | 159 | ||
160 | static struct intc_prio priorities[] __initdata = { | ||
161 | INTC_PRIO(SCIF0, 3), | ||
162 | INTC_PRIO(SCIF1, 3), | ||
163 | INTC_PRIO(SCIF2, 3), | ||
164 | INTC_PRIO(TMU0, 2), | ||
165 | INTC_PRIO(TMU1, 2), | ||
166 | }; | ||
167 | |||
168 | static struct intc_mask_reg mask_registers[] __initdata = { | 160 | static struct intc_mask_reg mask_registers[] __initdata = { |
169 | { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ | 161 | { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ |
170 | { } }, | 162 | { } }, |
@@ -217,7 +209,7 @@ static struct intc_sense_reg sense_registers[] __initdata = { | |||
217 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | 209 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, |
218 | }; | 210 | }; |
219 | 211 | ||
220 | static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups, priorities, | 212 | static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups, |
221 | mask_registers, prio_registers, sense_registers); | 213 | mask_registers, prio_registers, sense_registers); |
222 | 214 | ||
223 | void __init plat_irq_setup(void) | 215 | void __init plat_irq_setup(void) |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c index e8fd33ff0605..293004b526ff 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c | |||
@@ -168,11 +168,6 @@ static struct intc_group groups[] __initdata = { | |||
168 | INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), | 168 | INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), |
169 | }; | 169 | }; |
170 | 170 | ||
171 | static struct intc_prio priorities[] __initdata = { | ||
172 | INTC_PRIO(SCIF0, 3), | ||
173 | INTC_PRIO(SCIF1, 3), | ||
174 | }; | ||
175 | |||
176 | static struct intc_mask_reg mask_registers[] __initdata = { | 171 | static struct intc_mask_reg mask_registers[] __initdata = { |
177 | { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */ | 172 | { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */ |
178 | { 0, 0, 0, 0, 0, 0, GPIO, FLCTL, | 173 | { 0, 0, 0, 0, 0, 0, GPIO, FLCTL, |
@@ -195,7 +190,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { | |||
195 | { 0xffd4001c, 0, 32, 8, /* INT2PRI7 */ { FLCTL, GPIO } }, | 190 | { 0xffd4001c, 0, 32, 8, /* INT2PRI7 */ { FLCTL, GPIO } }, |
196 | }; | 191 | }; |
197 | 192 | ||
198 | static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups, priorities, | 193 | static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups, |
199 | mask_registers, prio_registers, NULL); | 194 | mask_registers, prio_registers, NULL); |
200 | 195 | ||
201 | /* Support for external interrupt pins in IRQ mode */ | 196 | /* Support for external interrupt pins in IRQ mode */ |
@@ -223,7 +218,7 @@ static struct intc_sense_reg irq_sense_registers[] __initdata = { | |||
223 | }; | 218 | }; |
224 | 219 | ||
225 | static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors, | 220 | static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors, |
226 | NULL, NULL, irq_mask_registers, irq_prio_registers, | 221 | NULL, irq_mask_registers, irq_prio_registers, |
227 | irq_sense_registers); | 222 | irq_sense_registers); |
228 | 223 | ||
229 | /* External interrupt pins in IRL mode */ | 224 | /* External interrupt pins in IRL mode */ |
@@ -257,10 +252,10 @@ static struct intc_mask_reg irl7654_mask_registers[] __initdata = { | |||
257 | }; | 252 | }; |
258 | 253 | ||
259 | static DECLARE_INTC_DESC(intc_irl7654_desc, "sh7780-irl7654", irl_vectors, | 254 | static DECLARE_INTC_DESC(intc_irl7654_desc, "sh7780-irl7654", irl_vectors, |
260 | NULL, NULL, irl7654_mask_registers, NULL, NULL); | 255 | NULL, irl7654_mask_registers, NULL, NULL); |
261 | 256 | ||
262 | static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors, | 257 | static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors, |
263 | NULL, NULL, irl3210_mask_registers, NULL, NULL); | 258 | NULL, irl3210_mask_registers, NULL, NULL); |
264 | 259 | ||
265 | #define INTC_ICR0 0xffd00000 | 260 | #define INTC_ICR0 0xffd00000 |
266 | #define INTC_INTMSK0 0xffd00044 | 261 | #define INTC_INTMSK0 0xffd00044 |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index 39b215d6cee5..74b60e96cdf4 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c | |||
@@ -178,15 +178,6 @@ static struct intc_group groups[] __initdata = { | |||
178 | INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), | 178 | INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), |
179 | }; | 179 | }; |
180 | 180 | ||
181 | static struct intc_prio priorities[] __initdata = { | ||
182 | INTC_PRIO(SCIF0, 3), | ||
183 | INTC_PRIO(SCIF1, 3), | ||
184 | INTC_PRIO(SCIF2, 3), | ||
185 | INTC_PRIO(SCIF3, 3), | ||
186 | INTC_PRIO(SCIF4, 3), | ||
187 | INTC_PRIO(SCIF5, 3), | ||
188 | }; | ||
189 | |||
190 | static struct intc_mask_reg mask_registers[] __initdata = { | 181 | static struct intc_mask_reg mask_registers[] __initdata = { |
191 | { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */ | 182 | { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */ |
192 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | 183 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, |
@@ -227,7 +218,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { | |||
227 | { 0xffd40024, 0, 32, 8, /* INT2PRI9 */ { DU, GDTA, } }, | 218 | { 0xffd40024, 0, 32, 8, /* INT2PRI9 */ { DU, GDTA, } }, |
228 | }; | 219 | }; |
229 | 220 | ||
230 | static DECLARE_INTC_DESC(intc_desc, "sh7785", vectors, groups, priorities, | 221 | static DECLARE_INTC_DESC(intc_desc, "sh7785", vectors, groups, |
231 | mask_registers, prio_registers, NULL); | 222 | mask_registers, prio_registers, NULL); |
232 | 223 | ||
233 | /* Support for external interrupt pins in IRQ mode */ | 224 | /* Support for external interrupt pins in IRQ mode */ |
@@ -248,11 +239,11 @@ static struct intc_sense_reg sense_registers[] __initdata = { | |||
248 | }; | 239 | }; |
249 | 240 | ||
250 | static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123, | 241 | static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123, |
251 | NULL, NULL, mask_registers, prio_registers, | 242 | NULL, mask_registers, prio_registers, |
252 | sense_registers); | 243 | sense_registers); |
253 | 244 | ||
254 | static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567, | 245 | static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567, |
255 | NULL, NULL, mask_registers, prio_registers, | 246 | NULL, mask_registers, prio_registers, |
256 | sense_registers); | 247 | sense_registers); |
257 | 248 | ||
258 | /* External interrupt pins in IRL mode */ | 249 | /* External interrupt pins in IRL mode */ |
@@ -280,10 +271,10 @@ static struct intc_vect vectors_irl4567[] __initdata = { | |||
280 | }; | 271 | }; |
281 | 272 | ||
282 | static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7785-irl0123", vectors_irl0123, | 273 | static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7785-irl0123", vectors_irl0123, |
283 | NULL, NULL, mask_registers, NULL, NULL); | 274 | NULL, mask_registers, NULL, NULL); |
284 | 275 | ||
285 | static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567, | 276 | static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567, |
286 | NULL, NULL, mask_registers, NULL, NULL); | 277 | NULL, mask_registers, NULL, NULL); |
287 | 278 | ||
288 | #define INTC_ICR0 0xffd00000 | 279 | #define INTC_ICR0 0xffd00000 |
289 | #define INTC_INTMSK0 0xffd00044 | 280 | #define INTC_INTMSK0 0xffd00044 |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c index c6cdd7e3b049..4dc958b6b314 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c | |||
@@ -165,13 +165,6 @@ static struct intc_group groups[] __initdata = { | |||
165 | INTC_GROUP(DTU3, DTU3_TEND, DTU3_AE, DTU3_TMISS), | 165 | INTC_GROUP(DTU3, DTU3_TEND, DTU3_AE, DTU3_TMISS), |
166 | }; | 166 | }; |
167 | 167 | ||
168 | static struct intc_prio priorities[] __initdata = { | ||
169 | INTC_PRIO(SCIF0, 3), | ||
170 | INTC_PRIO(SCIF1, 3), | ||
171 | INTC_PRIO(SCIF2, 3), | ||
172 | INTC_PRIO(SCIF3, 3), | ||
173 | }; | ||
174 | |||
175 | static struct intc_mask_reg mask_registers[] __initdata = { | 168 | static struct intc_mask_reg mask_registers[] __initdata = { |
176 | { 0xfe410030, 0xfe410050, 32, /* CnINTMSK0 / CnINTMSKCLR0 */ | 169 | { 0xfe410030, 0xfe410050, 32, /* CnINTMSK0 / CnINTMSKCLR0 */ |
177 | { IRQ0, IRQ1, IRQ2, IRQ3 } }, | 170 | { IRQ0, IRQ1, IRQ2, IRQ3 } }, |
@@ -218,7 +211,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { | |||
218 | INTICI3, INTICI2, INTICI1, INTICI0 }, INTC_SMP(4, 4) }, | 211 | INTICI3, INTICI2, INTICI1, INTICI0 }, INTC_SMP(4, 4) }, |
219 | }; | 212 | }; |
220 | 213 | ||
221 | static DECLARE_INTC_DESC(intc_desc, "shx3", vectors, groups, priorities, | 214 | static DECLARE_INTC_DESC(intc_desc, "shx3", vectors, groups, |
222 | mask_registers, prio_registers, NULL); | 215 | mask_registers, prio_registers, NULL); |
223 | 216 | ||
224 | /* Support for external interrupt pins in IRQ mode */ | 217 | /* Support for external interrupt pins in IRQ mode */ |
@@ -232,8 +225,7 @@ static struct intc_sense_reg sense_registers[] __initdata = { | |||
232 | }; | 225 | }; |
233 | 226 | ||
234 | static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups, | 227 | static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups, |
235 | priorities, mask_registers, prio_registers, | 228 | mask_registers, prio_registers, sense_registers); |
236 | sense_registers); | ||
237 | 229 | ||
238 | /* External interrupt pins in IRL mode */ | 230 | /* External interrupt pins in IRL mode */ |
239 | static struct intc_vect vectors_irl[] __initdata = { | 231 | static struct intc_vect vectors_irl[] __initdata = { |
@@ -248,7 +240,7 @@ static struct intc_vect vectors_irl[] __initdata = { | |||
248 | }; | 240 | }; |
249 | 241 | ||
250 | static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups, | 242 | static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups, |
251 | priorities, mask_registers, prio_registers, NULL); | 243 | mask_registers, prio_registers, NULL); |
252 | 244 | ||
253 | void __init plat_irq_setup_pins(int mode) | 245 | void __init plat_irq_setup_pins(int mode) |
254 | { | 246 | { |