diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7763.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7763.c | 114 |
1 files changed, 38 insertions, 76 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c index 3c5b629887a8..bdf0f61ae1ed 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2006 Paul Mundt | 4 | * Copyright (C) 2006 Paul Mundt |
5 | * Copyright (C) 2007 Yoshihiro Shimoda | 5 | * Copyright (C) 2007 Yoshihiro Shimoda |
6 | * Copyright (C) 2008 Nobuhiro Iwamatsu | 6 | * Copyright (C) 2008, 2009 Nobuhiro Iwamatsu |
7 | * | 7 | * |
8 | * This file is subject to the terms and conditions of the GNU General Public | 8 | * This file is subject to the terms and conditions of the GNU General Public |
9 | * License. See the file "COPYING" in the main directory of this archive | 9 | * License. See the file "COPYING" in the main directory of this archive |
@@ -22,18 +22,8 @@ static struct resource rtc_resources[] = { | |||
22 | .flags = IORESOURCE_IO, | 22 | .flags = IORESOURCE_IO, |
23 | }, | 23 | }, |
24 | [1] = { | 24 | [1] = { |
25 | /* Period IRQ */ | 25 | /* Shared Period/Carry/Alarm IRQ */ |
26 | .start = 21, | 26 | .start = 20, |
27 | .flags = IORESOURCE_IRQ, | ||
28 | }, | ||
29 | [2] = { | ||
30 | /* Carry IRQ */ | ||
31 | .start = 22, | ||
32 | .flags = IORESOURCE_IRQ, | ||
33 | }, | ||
34 | [3] = { | ||
35 | /* Alarm IRQ */ | ||
36 | .start = 20, | ||
37 | .flags = IORESOURCE_IRQ, | 27 | .flags = IORESOURCE_IRQ, |
38 | }, | 28 | }, |
39 | }; | 29 | }; |
@@ -50,17 +40,17 @@ static struct plat_sci_port sci_platform_data[] = { | |||
50 | .mapbase = 0xffe00000, | 40 | .mapbase = 0xffe00000, |
51 | .flags = UPF_BOOT_AUTOCONF, | 41 | .flags = UPF_BOOT_AUTOCONF, |
52 | .type = PORT_SCIF, | 42 | .type = PORT_SCIF, |
53 | .irqs = { 40, 41, 43, 42 }, | 43 | .irqs = { 40, 40, 40, 40 }, |
54 | }, { | 44 | }, { |
55 | .mapbase = 0xffe08000, | 45 | .mapbase = 0xffe08000, |
56 | .flags = UPF_BOOT_AUTOCONF, | 46 | .flags = UPF_BOOT_AUTOCONF, |
57 | .type = PORT_SCIF, | 47 | .type = PORT_SCIF, |
58 | .irqs = { 76, 77, 79, 78 }, | 48 | .irqs = { 76, 76, 76, 76 }, |
59 | }, { | 49 | }, { |
60 | .mapbase = 0xffe10000, | 50 | .mapbase = 0xffe10000, |
61 | .flags = UPF_BOOT_AUTOCONF, | 51 | .flags = UPF_BOOT_AUTOCONF, |
62 | .type = PORT_SCIF, | 52 | .type = PORT_SCIF, |
63 | .irqs = { 104, 105, 107, 106 }, | 53 | .irqs = { 104, 104, 104, 104 }, |
64 | }, { | 54 | }, { |
65 | .flags = 0, | 55 | .flags = 0, |
66 | } | 56 | } |
@@ -148,93 +138,65 @@ enum { | |||
148 | IRL_HHLL, IRL_HHLH, IRL_HHHL, | 138 | IRL_HHLL, IRL_HHLH, IRL_HHHL, |
149 | 139 | ||
150 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, | 140 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, |
151 | RTC_ATI, RTC_PRI, RTC_CUI, | 141 | RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI, |
152 | WDT, TMU0, TMU1, TMU2, TMU2_TICPI, | 142 | HUDI, LCDC, DMAC, SCIF0, IIC0, IIC1, CMT, GETHER, HAC, |
153 | HUDI, LCDC, | 143 | PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, PCIC5, |
154 | DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3, DMAC0_DMAE, | 144 | STIF0, STIF1, SCIF1, SIOF0, SIOF1, SIOF2, |
155 | SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI, | 145 | USBH, USBF, TPU, PCC, MMCIF, SIM, |
156 | DMAC0_DMINT4, DMAC0_DMINT5, | ||
157 | IIC0, IIC1, | ||
158 | CMT, | ||
159 | GEINT0, GEINT1, GEINT2, | ||
160 | HAC, | ||
161 | PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, | ||
162 | PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0, | ||
163 | STIF0, STIF1, | ||
164 | SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI, | ||
165 | SIOF0, SIOF1, SIOF2, | ||
166 | USBH, USBFI0, USBFI1, | ||
167 | TPU, PCC, | ||
168 | MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY, | ||
169 | SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND, | ||
170 | TMU3, TMU4, TMU5, ADC, SSI0, SSI1, SSI2, SSI3, | 146 | TMU3, TMU4, TMU5, ADC, SSI0, SSI1, SSI2, SSI3, |
171 | SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI, | 147 | SCIF2, GPIO, |
172 | GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3, | ||
173 | 148 | ||
174 | /* interrupt groups */ | 149 | /* interrupt groups */ |
175 | 150 | ||
176 | TMU012, TMU345, RTC, DMAC, SCIF0, GETHER, PCIC5, | 151 | TMU012, TMU345, |
177 | SCIF1, USBF, MMCIF, SIM, SCIF2, GPIO, | ||
178 | }; | 152 | }; |
179 | 153 | ||
180 | static struct intc_vect vectors[] __initdata = { | 154 | static struct intc_vect vectors[] __initdata = { |
181 | INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), | 155 | INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), |
182 | INTC_VECT(RTC_CUI, 0x4c0), | 156 | INTC_VECT(RTC, 0x4c0), |
183 | INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580), | 157 | INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580), |
184 | INTC_VECT(TMU1, 0x5a0), INTC_VECT(TMU2, 0x5c0), | 158 | INTC_VECT(TMU1, 0x5a0), INTC_VECT(TMU2, 0x5c0), |
185 | INTC_VECT(TMU2_TICPI, 0x5e0), INTC_VECT(HUDI, 0x600), | 159 | INTC_VECT(TMU2_TICPI, 0x5e0), INTC_VECT(HUDI, 0x600), |
186 | INTC_VECT(LCDC, 0x620), | 160 | INTC_VECT(LCDC, 0x620), |
187 | INTC_VECT(DMAC0_DMINT0, 0x640), INTC_VECT(DMAC0_DMINT1, 0x660), | 161 | INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660), |
188 | INTC_VECT(DMAC0_DMINT2, 0x680), INTC_VECT(DMAC0_DMINT3, 0x6a0), | 162 | INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0), |
189 | INTC_VECT(DMAC0_DMAE, 0x6c0), | 163 | INTC_VECT(DMAC, 0x6c0), |
190 | INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720), | 164 | INTC_VECT(SCIF0, 0x700), INTC_VECT(SCIF0, 0x720), |
191 | INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760), | 165 | INTC_VECT(SCIF0, 0x740), INTC_VECT(SCIF0, 0x760), |
192 | INTC_VECT(DMAC0_DMINT4, 0x780), INTC_VECT(DMAC0_DMINT5, 0x7a0), | 166 | INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0), |
193 | INTC_VECT(IIC0, 0x8A0), INTC_VECT(IIC1, 0x8C0), | 167 | INTC_VECT(IIC0, 0x8A0), INTC_VECT(IIC1, 0x8C0), |
194 | INTC_VECT(CMT, 0x900), INTC_VECT(GEINT0, 0x920), | 168 | INTC_VECT(CMT, 0x900), INTC_VECT(GETHER, 0x920), |
195 | INTC_VECT(GEINT1, 0x940), INTC_VECT(GEINT2, 0x960), | 169 | INTC_VECT(GETHER, 0x940), INTC_VECT(GETHER, 0x960), |
196 | INTC_VECT(HAC, 0x980), | 170 | INTC_VECT(HAC, 0x980), |
197 | INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20), | 171 | INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20), |
198 | INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60), | 172 | INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60), |
199 | INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0), | 173 | INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIC5, 0xaa0), |
200 | INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0), | 174 | INTC_VECT(PCIC5, 0xac0), INTC_VECT(PCIC5, 0xae0), |
201 | INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20), | 175 | INTC_VECT(PCIC5, 0xb00), INTC_VECT(PCIC5, 0xb20), |
202 | INTC_VECT(STIF0, 0xb40), INTC_VECT(STIF1, 0xb60), | 176 | INTC_VECT(STIF0, 0xb40), INTC_VECT(STIF1, 0xb60), |
203 | INTC_VECT(SCIF1_ERI, 0xb80), INTC_VECT(SCIF1_RXI, 0xba0), | 177 | INTC_VECT(SCIF1, 0xb80), INTC_VECT(SCIF1, 0xba0), |
204 | INTC_VECT(SCIF1_BRI, 0xbc0), INTC_VECT(SCIF1_TXI, 0xbe0), | 178 | INTC_VECT(SCIF1, 0xbc0), INTC_VECT(SCIF1, 0xbe0), |
205 | INTC_VECT(SIOF0, 0xc00), INTC_VECT(SIOF1, 0xc20), | 179 | INTC_VECT(SIOF0, 0xc00), INTC_VECT(SIOF1, 0xc20), |
206 | INTC_VECT(USBH, 0xc60), INTC_VECT(USBFI0, 0xc80), | 180 | INTC_VECT(USBH, 0xc60), INTC_VECT(USBF, 0xc80), |
207 | INTC_VECT(USBFI1, 0xca0), | 181 | INTC_VECT(USBF, 0xca0), |
208 | INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0), | 182 | INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0), |
209 | INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20), | 183 | INTC_VECT(MMCIF, 0xd00), INTC_VECT(MMCIF, 0xd20), |
210 | INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60), | 184 | INTC_VECT(MMCIF, 0xd40), INTC_VECT(MMCIF, 0xd60), |
211 | INTC_VECT(SIM_ERI, 0xd80), INTC_VECT(SIM_RXI, 0xda0), | 185 | INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0), |
212 | INTC_VECT(SIM_TXI, 0xdc0), INTC_VECT(SIM_TEND, 0xde0), | 186 | INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0), |
213 | INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20), | 187 | INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20), |
214 | INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60), | 188 | INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60), |
215 | INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0), | 189 | INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0), |
216 | INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0), | 190 | INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0), |
217 | INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20), | 191 | INTC_VECT(SCIF2, 0xf00), INTC_VECT(SCIF2, 0xf20), |
218 | INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60), | 192 | INTC_VECT(SCIF2, 0xf40), INTC_VECT(SCIF2, 0xf60), |
219 | INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0), | 193 | INTC_VECT(GPIO, 0xf80), INTC_VECT(GPIO, 0xfa0), |
220 | INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0), | 194 | INTC_VECT(GPIO, 0xfc0), INTC_VECT(GPIO, 0xfe0), |
221 | }; | 195 | }; |
222 | 196 | ||
223 | static struct intc_group groups[] __initdata = { | 197 | static struct intc_group groups[] __initdata = { |
224 | INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI), | 198 | INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI), |
225 | INTC_GROUP(TMU345, TMU3, TMU4, TMU5), | 199 | INTC_GROUP(TMU345, TMU3, TMU4, TMU5), |
226 | INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), | ||
227 | INTC_GROUP(DMAC, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, | ||
228 | DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE), | ||
229 | INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI), | ||
230 | INTC_GROUP(GETHER, GEINT0, GEINT1, GEINT2), | ||
231 | INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0), | ||
232 | INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI), | ||
233 | INTC_GROUP(USBF, USBFI0, USBFI1), | ||
234 | INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY), | ||
235 | INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND), | ||
236 | INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI), | ||
237 | INTC_GROUP(GPIO, GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3), | ||
238 | }; | 200 | }; |
239 | 201 | ||
240 | static struct intc_mask_reg mask_registers[] __initdata = { | 202 | static struct intc_mask_reg mask_registers[] __initdata = { |