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-rw-r--r--arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c1582
1 files changed, 925 insertions, 657 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
index ed23b155c097..4c74bd04bba4 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
@@ -1,11 +1,11 @@
1/* 1/*
2 * SH7757 (A0 step) Pinmux 2 * SH7757 (B0 step) Pinmux
3 * 3 *
4 * Copyright (C) 2009 Renesas Solutions Corp. 4 * Copyright (C) 2009-2010 Renesas Solutions Corp.
5 * 5 *
6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> 6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
7 * 7 *
8 * Based on SH7757 Pinmux 8 * Based on SH7723 Pinmux
9 * Copyright (C) 2008 Magnus Damm 9 * Copyright (C) 2008 Magnus Damm
10 * 10 *
11 * This file is subject to the terms and conditions of the GNU General Public 11 * This file is subject to the terms and conditions of the GNU General Public
@@ -40,27 +40,27 @@ enum {
40 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA, 40 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
41 PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA, 41 PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA,
42 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA, 42 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA,
43 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, 43 PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
44 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA, 44 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
45 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA, 45 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
46 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA, 46 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
47 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, 47 PTL6_DATA, PTL5_DATA, PTL4_DATA,
48 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA, 48 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
49 PTM6_DATA, PTM5_DATA, PTM4_DATA, 49 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
50 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA, 50 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
51 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA, 51 PTN6_DATA, PTN5_DATA, PTN4_DATA,
52 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA, 52 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
53 PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA, 53 PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA,
54 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA, 54 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA,
55 PTP6_DATA, PTP5_DATA, PTP4_DATA, 55 PTP7_DATA, PTP6_DATA, PTP5_DATA, PTP4_DATA,
56 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA, 56 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA,
57 PTQ6_DATA, PTQ5_DATA, PTQ4_DATA, 57 PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
58 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA, 58 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
59 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, 59 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
60 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA, 60 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
61 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA, 61 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
62 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA, 62 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
63 PTT5_DATA, PTT4_DATA, 63 PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
64 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA, 64 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
65 PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA, 65 PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
66 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA, 66 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
@@ -95,27 +95,27 @@ enum {
95 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN, 95 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
96 PTI7_IN, PTI6_IN, PTI5_IN, PTI4_IN, 96 PTI7_IN, PTI6_IN, PTI5_IN, PTI4_IN,
97 PTI3_IN, PTI2_IN, PTI1_IN, PTI0_IN, 97 PTI3_IN, PTI2_IN, PTI1_IN, PTI0_IN,
98 PTJ7_IN, PTJ6_IN, PTJ5_IN, PTJ4_IN, 98 PTJ6_IN, PTJ5_IN, PTJ4_IN,
99 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN, 99 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
100 PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN, 100 PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN,
101 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN, 101 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
102 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN, 102 PTL6_IN, PTL5_IN, PTL4_IN,
103 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN, 103 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
104 PTM6_IN, PTM5_IN, PTM4_IN, 104 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
105 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN, 105 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
106 PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN, 106 PTN6_IN, PTN5_IN, PTN4_IN,
107 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN, 107 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
108 PTO7_IN, PTO6_IN, PTO5_IN, PTO4_IN, 108 PTO7_IN, PTO6_IN, PTO5_IN, PTO4_IN,
109 PTO3_IN, PTO2_IN, PTO1_IN, PTO0_IN, 109 PTO3_IN, PTO2_IN, PTO1_IN, PTO0_IN,
110 PTP6_IN, PTP5_IN, PTP4_IN, 110 PTP7_IN, PTP6_IN, PTP5_IN, PTP4_IN,
111 PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN, 111 PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN,
112 PTQ6_IN, PTQ5_IN, PTQ4_IN, 112 PTQ6_IN, PTQ5_IN, PTQ4_IN,
113 PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN, 113 PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN,
114 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN, 114 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
115 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN, 115 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
116 PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN, 116 PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN,
117 PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN, 117 PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
118 PTT5_IN, PTT4_IN, 118 PTT7_IN, PTT6_IN, PTT5_IN, PTT4_IN,
119 PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN, 119 PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
120 PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN, 120 PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN,
121 PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN, 121 PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
@@ -132,16 +132,43 @@ enum {
132 PINMUX_INPUT_END, 132 PINMUX_INPUT_END,
133 133
134 PINMUX_INPUT_PULLUP_BEGIN, 134 PINMUX_INPUT_PULLUP_BEGIN,
135 PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
136 PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
137 PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
138 PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
139 PTE7_IN_PU, PTE6_IN_PU, PTE5_IN_PU, PTE4_IN_PU,
140 PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
141 PTF7_IN_PU, PTF6_IN_PU, PTF5_IN_PU, PTF4_IN_PU,
142 PTF3_IN_PU, PTF2_IN_PU, PTF1_IN_PU, PTF0_IN_PU,
143 PTG7_IN_PU, PTG6_IN_PU, PTG4_IN_PU,
144 PTH7_IN_PU, PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
145 PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
146 PTI7_IN_PU, PTI6_IN_PU, PTI4_IN_PU,
147 PTI3_IN_PU, PTI2_IN_PU, PTI1_IN_PU, PTI0_IN_PU,
148 PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
149 PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
150 PTK7_IN_PU, PTK6_IN_PU, PTK5_IN_PU, PTK4_IN_PU,
151 PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
152 PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU,
153 PTL3_IN_PU, PTL2_IN_PU, PTL1_IN_PU, PTL0_IN_PU,
154 PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
155 PTN4_IN_PU,
156 PTN3_IN_PU, PTN2_IN_PU, PTN1_IN_PU, PTN0_IN_PU,
157 PTO7_IN_PU, PTO6_IN_PU, PTO5_IN_PU, PTO4_IN_PU,
158 PTO3_IN_PU, PTO2_IN_PU, PTO1_IN_PU, PTO0_IN_PU,
159 PTT7_IN_PU, PTT6_IN_PU, PTT5_IN_PU, PTT4_IN_PU,
160 PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
135 PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU, 161 PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
136 PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU, 162 PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
137 PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU, 163 PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
138 PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU, 164 PTV3_IN_PU, PTV2_IN_PU,
139 PTW7_IN_PU, PTW6_IN_PU, PTW5_IN_PU, PTW4_IN_PU, 165 PTW1_IN_PU, PTW0_IN_PU,
140 PTW3_IN_PU, PTW2_IN_PU, PTW1_IN_PU, PTW0_IN_PU,
141 PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU, 166 PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
142 PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU, 167 PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
143 PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU, 168 PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
144 PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU, 169 PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
170 PTZ7_IN_PU, PTZ6_IN_PU, PTZ5_IN_PU, PTZ4_IN_PU,
171 PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU, PTZ0_IN_PU,
145 PINMUX_INPUT_PULLUP_END, 172 PINMUX_INPUT_PULLUP_END,
146 173
147 PINMUX_OUTPUT_BEGIN, 174 PINMUX_OUTPUT_BEGIN,
@@ -163,27 +190,27 @@ enum {
163 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT, 190 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
164 PTI7_OUT, PTI6_OUT, PTI5_OUT, PTI4_OUT, 191 PTI7_OUT, PTI6_OUT, PTI5_OUT, PTI4_OUT,
165 PTI3_OUT, PTI2_OUT, PTI1_OUT, PTI0_OUT, 192 PTI3_OUT, PTI2_OUT, PTI1_OUT, PTI0_OUT,
166 PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, PTJ4_OUT, 193 PTJ6_OUT, PTJ5_OUT, PTJ4_OUT,
167 PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT, 194 PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
168 PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT, 195 PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT,
169 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT, 196 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
170 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT, 197 PTL6_OUT, PTL5_OUT, PTL4_OUT,
171 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT, 198 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
172 PTM6_OUT, PTM5_OUT, PTM4_OUT, 199 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
173 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT, 200 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
174 PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT, 201 PTN6_OUT, PTN5_OUT, PTN4_OUT,
175 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT, 202 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT,
176 PTO7_OUT, PTO6_OUT, PTO5_OUT, PTO4_OUT, 203 PTO7_OUT, PTO6_OUT, PTO5_OUT, PTO4_OUT,
177 PTO3_OUT, PTO2_OUT, PTO1_OUT, PTO0_OUT, 204 PTO3_OUT, PTO2_OUT, PTO1_OUT, PTO0_OUT,
178 PTP6_OUT, PTP5_OUT, PTP4_OUT, 205 PTP7_OUT, PTP6_OUT, PTP5_OUT, PTP4_OUT,
179 PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT, 206 PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT,
180 PTQ6_OUT, PTQ5_OUT, PTQ4_OUT, 207 PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
181 PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT, 208 PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
182 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT, 209 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
183 PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT, 210 PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT,
184 PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT, 211 PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT,
185 PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT, 212 PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
186 PTT5_OUT, PTT4_OUT, 213 PTT7_OUT, PTT6_OUT, PTT5_OUT, PTT4_OUT,
187 PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT, 214 PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
188 PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT, 215 PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT,
189 PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT, 216 PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
@@ -218,27 +245,27 @@ enum {
218 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN, 245 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
219 PTI7_FN, PTI6_FN, PTI5_FN, PTI4_FN, 246 PTI7_FN, PTI6_FN, PTI5_FN, PTI4_FN,
220 PTI3_FN, PTI2_FN, PTI1_FN, PTI0_FN, 247 PTI3_FN, PTI2_FN, PTI1_FN, PTI0_FN,
221 PTJ7_FN, PTJ6_FN, PTJ5_FN, PTJ4_FN, 248 PTJ6_FN, PTJ5_FN, PTJ4_FN,
222 PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN, 249 PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
223 PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN, 250 PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN,
224 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN, 251 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
225 PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN, 252 PTL6_FN, PTL5_FN, PTL4_FN,
226 PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN, 253 PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN,
227 PTM6_FN, PTM5_FN, PTM4_FN, 254 PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
228 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN, 255 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
229 PTN7_FN, PTN6_FN, PTN5_FN, PTN4_FN, 256 PTN6_FN, PTN5_FN, PTN4_FN,
230 PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN, 257 PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN,
231 PTO7_FN, PTO6_FN, PTO5_FN, PTO4_FN, 258 PTO7_FN, PTO6_FN, PTO5_FN, PTO4_FN,
232 PTO3_FN, PTO2_FN, PTO1_FN, PTO0_FN, 259 PTO3_FN, PTO2_FN, PTO1_FN, PTO0_FN,
233 PTP6_FN, PTP5_FN, PTP4_FN, 260 PTP7_FN, PTP6_FN, PTP5_FN, PTP4_FN,
234 PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN, 261 PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN,
235 PTQ6_FN, PTQ5_FN, PTQ4_FN, 262 PTQ6_FN, PTQ5_FN, PTQ4_FN,
236 PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN, 263 PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN,
237 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN, 264 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
238 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN, 265 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
239 PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN, 266 PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN,
240 PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN, 267 PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
241 PTT5_FN, PTT4_FN, 268 PTT7_FN, PTT6_FN, PTT5_FN, PTT4_FN,
242 PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN, 269 PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
243 PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN, 270 PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN,
244 PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN, 271 PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
@@ -253,181 +280,248 @@ enum {
253 PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN, 280 PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN,
254 PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN, 281 PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN,
255 282
256 PS0_15_FN1, PS0_15_FN3, 283 PS0_15_FN1, PS0_15_FN2,
257 PS0_14_FN1, PS0_14_FN3, 284 PS0_14_FN1, PS0_14_FN2,
258 PS0_13_FN1, PS0_13_FN3, 285 PS0_13_FN1, PS0_13_FN2,
259 PS0_12_FN1, PS0_12_FN3, 286 PS0_12_FN1, PS0_12_FN2,
287 PS0_11_FN1, PS0_11_FN2,
288 PS0_10_FN1, PS0_10_FN2,
289 PS0_9_FN1, PS0_9_FN2,
290 PS0_8_FN1, PS0_8_FN2,
260 PS0_7_FN1, PS0_7_FN2, 291 PS0_7_FN1, PS0_7_FN2,
261 PS0_6_FN1, PS0_6_FN2, 292 PS0_6_FN1, PS0_6_FN2,
262 PS0_5_FN1, PS0_5_FN2, 293 PS0_5_FN1, PS0_5_FN2,
263 PS0_4_FN1, PS0_4_FN2, 294 PS0_4_FN1, PS0_4_FN2,
264 PS0_3_FN1, PS0_3_FN2, 295 PS0_3_FN1, PS0_3_FN2,
265 PS0_2_FN1, PS0_2_FN2, 296 PS0_2_FN1, PS0_2_FN2,
266 PS0_1_FN1, PS0_1_FN2,
267 297
268 PS1_7_FN1, PS1_7_FN3, 298 PS1_10_FN1, PS1_10_FN2,
269 PS1_6_FN1, PS1_6_FN3, 299 PS1_9_FN1, PS1_9_FN2,
300 PS1_8_FN1, PS1_8_FN2,
301 PS1_2_FN1, PS1_2_FN2,
302
303 PS2_13_FN1, PS2_13_FN2,
304 PS2_12_FN1, PS2_12_FN2,
305 PS2_7_FN1, PS2_7_FN2,
306 PS2_6_FN1, PS2_6_FN2,
307 PS2_5_FN1, PS2_5_FN2,
308 PS2_4_FN1, PS2_4_FN2,
309 PS2_2_FN1, PS2_2_FN2,
310
311 PS3_15_FN1, PS3_15_FN2,
312 PS3_14_FN1, PS3_14_FN2,
313 PS3_13_FN1, PS3_13_FN2,
314 PS3_12_FN1, PS3_12_FN2,
315 PS3_11_FN1, PS3_11_FN2,
316 PS3_10_FN1, PS3_10_FN2,
317 PS3_9_FN1, PS3_9_FN2,
318 PS3_8_FN1, PS3_8_FN2,
319 PS3_7_FN1, PS3_7_FN2,
320 PS3_2_FN1, PS3_2_FN2,
321 PS3_1_FN1, PS3_1_FN2,
270 322
271 PS2_13_FN1, PS2_13_FN3,
272 PS2_12_FN1, PS2_12_FN3,
273 PS2_1_FN1, PS2_1_FN2,
274 PS2_0_FN1, PS2_0_FN2,
275
276 PS4_15_FN1, PS4_15_FN2,
277 PS4_14_FN1, PS4_14_FN2, 323 PS4_14_FN1, PS4_14_FN2,
278 PS4_13_FN1, PS4_13_FN2, 324 PS4_13_FN1, PS4_13_FN2,
279 PS4_12_FN1, PS4_12_FN2, 325 PS4_12_FN1, PS4_12_FN2,
280 PS4_11_FN1, PS4_11_FN2,
281 PS4_10_FN1, PS4_10_FN2, 326 PS4_10_FN1, PS4_10_FN2,
282 PS4_9_FN1, PS4_9_FN2, 327 PS4_9_FN1, PS4_9_FN2,
328 PS4_8_FN1, PS4_8_FN2,
329 PS4_4_FN1, PS4_4_FN2,
283 PS4_3_FN1, PS4_3_FN2, 330 PS4_3_FN1, PS4_3_FN2,
284 PS4_2_FN1, PS4_2_FN2, 331 PS4_2_FN1, PS4_2_FN2,
285 PS4_1_FN1, PS4_1_FN2, 332 PS4_1_FN1, PS4_1_FN2,
286 PS4_0_FN1, PS4_0_FN2, 333 PS4_0_FN1, PS4_0_FN2,
287 334
335 PS5_11_FN1, PS5_11_FN2,
336 PS5_10_FN1, PS5_10_FN2,
288 PS5_9_FN1, PS5_9_FN2, 337 PS5_9_FN1, PS5_9_FN2,
289 PS5_8_FN1, PS5_8_FN2, 338 PS5_8_FN1, PS5_8_FN2,
290 PS5_7_FN1, PS5_7_FN2, 339 PS5_7_FN1, PS5_7_FN2,
291 PS5_6_FN1, PS5_6_FN2, 340 PS5_6_FN1, PS5_6_FN2,
292 PS5_5_FN1, PS5_5_FN2, 341 PS5_5_FN1, PS5_5_FN2,
293 PS5_4_FN1, PS5_4_FN2, 342 PS5_4_FN1, PS5_4_FN2,
294 343 PS5_3_FN1, PS5_3_FN2,
295 /* AN15 to 8 : EVENT15 to 8 */ 344 PS5_2_FN1, PS5_2_FN2,
296 PS6_7_FN_AN, PS6_7_FN_EV, 345
297 PS6_6_FN_AN, PS6_6_FN_EV, 346 PS6_15_FN1, PS6_15_FN2,
298 PS6_5_FN_AN, PS6_5_FN_EV, 347 PS6_14_FN1, PS6_14_FN2,
299 PS6_4_FN_AN, PS6_4_FN_EV, 348 PS6_13_FN1, PS6_13_FN2,
300 PS6_3_FN_AN, PS6_3_FN_EV, 349 PS6_12_FN1, PS6_12_FN2,
301 PS6_2_FN_AN, PS6_2_FN_EV, 350 PS6_11_FN1, PS6_11_FN2,
302 PS6_1_FN_AN, PS6_1_FN_EV, 351 PS6_10_FN1, PS6_10_FN2,
303 PS6_0_FN_AN, PS6_0_FN_EV, 352 PS6_9_FN1, PS6_9_FN2,
304 353 PS6_8_FN1, PS6_8_FN2,
354 PS6_7_FN1, PS6_7_FN2,
355 PS6_6_FN1, PS6_6_FN2,
356 PS6_5_FN1, PS6_5_FN2,
357 PS6_4_FN1, PS6_4_FN2,
358 PS6_3_FN1, PS6_3_FN2,
359 PS6_2_FN1, PS6_2_FN2,
360 PS6_1_FN1, PS6_1_FN2,
361 PS6_0_FN1, PS6_0_FN2,
362
363 PS7_15_FN1, PS7_15_FN2,
364 PS7_14_FN1, PS7_14_FN2,
365 PS7_13_FN1, PS7_13_FN2,
366 PS7_12_FN1, PS7_12_FN2,
367 PS7_11_FN1, PS7_11_FN2,
368 PS7_10_FN1, PS7_10_FN2,
369 PS7_9_FN1, PS7_9_FN2,
370 PS7_8_FN1, PS7_8_FN2,
371 PS7_7_FN1, PS7_7_FN2,
372 PS7_6_FN1, PS7_6_FN2,
373 PS7_5_FN1, PS7_5_FN2,
374 PS7_4_FN1, PS7_4_FN2,
375
376 PS8_15_FN1, PS8_15_FN2,
377 PS8_14_FN1, PS8_14_FN2,
378 PS8_13_FN1, PS8_13_FN2,
379 PS8_12_FN1, PS8_12_FN2,
380 PS8_11_FN1, PS8_11_FN2,
381 PS8_10_FN1, PS8_10_FN2,
382 PS8_9_FN1, PS8_9_FN2,
383 PS8_8_FN1, PS8_8_FN2,
305 PINMUX_FUNCTION_END, 384 PINMUX_FUNCTION_END,
306 385
307 PINMUX_MARK_BEGIN, 386 PINMUX_MARK_BEGIN,
308 /* PTA (mobule: LBSC, CPG, LPC) */ 387 /* PTA (mobule: LBSC, RGMII) */
309 BS_MARK, RDWR_MARK, WE1_MARK, RDY_MARK, 388 BS_MARK, RDWR_MARK, WE1_MARK, RDY_MARK,
310 MD10_MARK, MD9_MARK, MD8_MARK,
311 LGPIO7_MARK, LGPIO6_MARK, LGPIO5_MARK, LGPIO4_MARK,
312 LGPIO3_MARK, LGPIO2_MARK, LGPIO1_MARK, LGPIO0_MARK,
313
314 /* PTB (mobule: LBSC, EtherC, SIM, LPC) */
315 D15_MARK, D14_MARK, D13_MARK, D12_MARK,
316 D11_MARK, D10_MARK, D9_MARK, D8_MARK,
317 ET0_MDC_MARK, ET0_MDIO_MARK, ET1_MDC_MARK, ET1_MDIO_MARK, 389 ET0_MDC_MARK, ET0_MDIO_MARK, ET1_MDC_MARK, ET1_MDIO_MARK,
318 SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
319 WPSZ1_MARK, WPSZ0_MARK, FWID_MARK, FLSHSZ_MARK,
320 LPC_SPIEN_MARK, BASEL_MARK,
321 390
322 /* PTC (mobule: SD) */ 391 /* PTB (mobule: INTC, ONFI, TMU) */
323 SD_WP_MARK, SD_CD_MARK, SD_CLK_MARK, SD_CMD_MARK, 392 IRQ15_MARK, IRQ14_MARK, IRQ13_MARK, IRQ12_MARK,
324 SD_D3_MARK, SD_D2_MARK, SD_D1_MARK, SD_D0_MARK, 393 IRQ11_MARK, IRQ10_MARK, IRQ9_MARK, IRQ8_MARK,
394 ON_NRE_MARK, ON_NWE_MARK, ON_NWP_MARK, ON_NCE0_MARK,
395 ON_R_B0_MARK, ON_ALE_MARK, ON_CLE_MARK, TCLK_MARK,
325 396
326 /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */ 397 /* PTC (mobule: IRQ, PWMU) */
327 IRQ7_MARK, IRQ6_MARK, IRQ5_MARK, IRQ4_MARK, 398 IRQ7_MARK, IRQ6_MARK, IRQ5_MARK, IRQ4_MARK,
328 IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK, 399 IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK,
329 MD6_MARK, MD5_MARK, MD3_MARK, MD2_MARK, 400 PWMU0_MARK, PWMU1_MARK, PWMU2_MARK, PWMU3_MARK,
330 MD1_MARK, MD0_MARK, ADTRG1_MARK, ADTRG0_MARK, 401 PWMU4_MARK, PWMU5_MARK,
331 402
332 /* PTE (mobule: EtherC) */ 403 /* PTD (mobule: SPI0, DMAC) */
333 ET0_CRS_DV_MARK, ET0_TXD1_MARK, 404 SP0_MOSI_MARK, SP0_MISO_MARK, SP0_SCK_MARK, SP0_SCK_FB_MARK,
334 ET0_TXD0_MARK, ET0_TX_EN_MARK, 405 SP0_SS0_MARK, SP0_SS1_MARK, SP0_SS2_MARK, SP0_SS3_MARK,
335 ET0_REF_CLK_MARK, ET0_RXD1_MARK, 406 DREQ0_MARK, DACK0_MARK, TEND0_MARK,
336 ET0_RXD0_MARK, ET0_RX_ER_MARK, 407
337 408 /* PTE (mobule: RMII) */
338 /* PTF (mobule: EtherC) */ 409 RMII0_CRS_DV_MARK, RMII0_TXD1_MARK,
339 ET1_CRS_DV_MARK, ET1_TXD1_MARK, 410 RMII0_TXD0_MARK, RMII0_TXEN_MARK,
340 ET1_TXD0_MARK, ET1_TX_EN_MARK, 411 RMII0_REFCLK_MARK, RMII0_RXD1_MARK,
341 ET1_REF_CLK_MARK, ET1_RXD1_MARK, 412 RMII0_RXD0_MARK, RMII0_RX_ER_MARK,
342 ET1_RXD0_MARK, ET1_RX_ER_MARK, 413
343 414 /* PTF (mobule: RMII, SerMux) */
344 /* PTG (mobule: SYSTEM, PWMX, LPC) */ 415 RMII1_CRS_DV_MARK, RMII1_TXD1_MARK,
345 STATUS0_MARK, STATUS1_MARK, 416 RMII1_TXD0_MARK, RMII1_TXEN_MARK,
346 PWX0_MARK, PWX1_MARK, PWX2_MARK, PWX3_MARK, 417 RMII1_REFCLK_MARK, RMII1_RXD1_MARK,
347 SERIRQ_MARK, CLKRUN_MARK, LPCPD_MARK, LDRQ_MARK, 418 RMII1_RXD0_MARK, RMII1_RX_ER_MARK,
348 419 RAC_RI_MARK,
349 /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */ 420
350 TCLK_MARK, RXD4_MARK, TXD4_MARK, 421 /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */
422 BOOTFMS_MARK, BOOTWP_MARK, A25_MARK, A24_MARK,
423 SERIRQ_MARK, WDTOVF_MARK, LPCPD_MARK, LDRQ_MARK,
424 MMCCLK_MARK, MMCCMD_MARK,
425
426 /* PTH (mobule: SPI1, LPC, DMAC, ADC) */
351 SP1_MOSI_MARK, SP1_MISO_MARK, SP1_SCK_MARK, SP1_SCK_FB_MARK, 427 SP1_MOSI_MARK, SP1_MISO_MARK, SP1_SCK_MARK, SP1_SCK_FB_MARK,
352 SP1_SS0_MARK, SP1_SS1_MARK, SP0_SS1_MARK, 428 SP1_SS0_MARK, SP1_SS1_MARK, WP_MARK, FMS0_MARK,
429 TEND1_MARK, DREQ1_MARK, DACK1_MARK, ADTRG1_MARK,
430 ADTRG0_MARK,
353 431
354 /* PTI (mobule: INTC) */ 432 /* PTI (mobule: LBSC, SDHI) */
355 IRQ15_MARK, IRQ14_MARK, IRQ13_MARK, IRQ12_MARK, 433 D15_MARK, D14_MARK, D13_MARK, D12_MARK,
356 IRQ11_MARK, IRQ10_MARK, IRQ9_MARK, IRQ8_MARK, 434 D11_MARK, D10_MARK, D9_MARK, D8_MARK,
435 SD_WP_MARK, SD_CD_MARK, SD_CLK_MARK, SD_CMD_MARK,
436 SD_D3_MARK, SD_D2_MARK, SD_D1_MARK, SD_D0_MARK,
357 437
358 /* PTJ (mobule: SCIF234, SERMUX) */ 438 /* PTJ (mobule: SCIF234) */
359 RXD3_MARK, TXD3_MARK, RXD2_MARK, TXD2_MARK, 439 RTS3_MARK, CTS3_MARK, TXD3_MARK, RXD3_MARK,
360 COM1_TXD_MARK, COM1_RXD_MARK, COM1_RTS_MARK, COM1_CTS_MARK, 440 RTS4_MARK, RXD4_MARK, TXD4_MARK,
361 441
362 /* PTK (mobule: SERMUX) */ 442 /* PTK (mobule: SERMUX, LBSC, SCIF) */
363 COM2_TXD_MARK, COM2_RXD_MARK, COM2_RTS_MARK, COM2_CTS_MARK, 443 COM2_TXD_MARK, COM2_RXD_MARK, COM2_RTS_MARK, COM2_CTS_MARK,
364 COM2_DTR_MARK, COM2_DSR_MARK, COM2_DCD_MARK, COM2_RI_MARK, 444 COM2_DTR_MARK, COM2_DSR_MARK, COM2_DCD_MARK, CLKOUT_MARK,
445 SCK2_MARK, SCK4_MARK, SCK3_MARK,
365 446
366 /* PTL (mobule: SERMUX) */ 447 /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */
367 RAC_TXD_MARK, RAC_RXD_MARK, RAC_RTS_MARK, RAC_CTS_MARK, 448 RAC_RXD_MARK, RAC_RTS_MARK, RAC_CTS_MARK, RAC_DTR_MARK,
368 RAC_DTR_MARK, RAC_DSR_MARK, RAC_DCD_MARK, RAC_RI_MARK, 449 RAC_DSR_MARK, RAC_DCD_MARK, RAC_TXD_MARK, RXD2_MARK,
450 CS5_MARK, CS6_MARK, AUDSYNC_MARK, AUDCK_MARK,
451 TXD2_MARK,
369 452
370 /* PTM (mobule: IIC, LPC) */ 453 /* PTM (mobule: LBSC, IIC) */
454 CS4_MARK, RD_MARK, WE0_MARK, CS0_MARK,
371 SDA6_MARK, SCL6_MARK, SDA7_MARK, SCL7_MARK, 455 SDA6_MARK, SCL6_MARK, SDA7_MARK, SCL7_MARK,
372 WP_MARK, FMS0_MARK, FMS1_MARK,
373 456
374 /* PTN (mobule: SCIF234, EVC) */ 457 /* PTN (mobule: USB, JMC, SGPIO, WDT) */
375 SCK2_MARK, RTS4_MARK, RTS3_MARK, RTS2_MARK, 458 VBUS_EN_MARK, VBUS_OC_MARK, JMCTCK_MARK, JMCTMS_MARK,
376 CTS4_MARK, CTS3_MARK, CTS2_MARK, 459 JMCTDO_MARK, JMCTDI_MARK, JMCTRST_MARK,
377 EVENT7_MARK, EVENT6_MARK, EVENT5_MARK, EVENT4_MARK, 460 SGPIO1_CLK_MARK, SGPIO1_LOAD_MARK, SGPIO1_DI_MARK,
378 EVENT3_MARK, EVENT2_MARK, EVENT1_MARK, EVENT0_MARK, 461 SGPIO1_DO_MARK, SUB_CLKIN_MARK,
379 462
380 /* PTO (mobule: SGPIO) */ 463 /* PTO (mobule: SGPIO, SerMux) */
381 SGPIO0_CLK_MARK, SGPIO0_LOAD_MARK, 464 SGPIO0_CLK_MARK, SGPIO0_LOAD_MARK, SGPIO0_DI_MARK,
382 SGPIO0_DI_MARK, SGPIO0_DO_MARK, 465 SGPIO0_DO_MARK, SGPIO2_CLK_MARK, SGPIO2_LOAD_MARK,
383 SGPIO1_CLK_MARK, SGPIO1_LOAD_MARK, 466 SGPIO2_DI_MARK, SGPIO2_DO_MARK,
384 SGPIO1_DI_MARK, SGPIO1_DO_MARK, 467 COM1_TXD_MARK, COM1_RXD_MARK, COM1_RTS_MARK, COM1_CTS_MARK,
385
386 /* PTP (mobule: JMC, SCIF234) */
387 JMCTCK_MARK, JMCTMS_MARK, JMCTDO_MARK, JMCTDI_MARK,
388 JMCRST_MARK, SCK4_MARK, SCK3_MARK,
389 468
390 /* PTQ (mobule: LPC) */ 469 /* PTQ (mobule: LPC) */
391 LAD3_MARK, LAD2_MARK, LAD1_MARK, LAD0_MARK, 470 LAD3_MARK, LAD2_MARK, LAD1_MARK, LAD0_MARK,
392 LFRAME_MARK, LRESET_MARK, LCLK_MARK, 471 LFRAME_MARK, LRESET_MARK, LCLK_MARK,
393 472
394 /* PTR (mobule: GRA, IIC) */ 473 /* PTR (mobule: GRA, IIC) */
395 DDC3_MARK, DDC2_MARK, 474 DDC3_MARK, DDC2_MARK, SDA2_MARK, SCL2_MARK,
396 SDA8_MARK, SCL8_MARK, SDA2_MARK, SCL2_MARK,
397 SDA1_MARK, SCL1_MARK, SDA0_MARK, SCL0_MARK, 475 SDA1_MARK, SCL1_MARK, SDA0_MARK, SCL0_MARK,
476 SDA8_MARK, SCL8_MARK,
398 477
399 /* PTS (mobule: GRA, IIC) */ 478 /* PTS (mobule: GRA, IIC) */
400 DDC1_MARK, DDC0_MARK, 479 DDC1_MARK, DDC0_MARK, SDA5_MARK, SCL5_MARK,
401 SDA9_MARK, SCL9_MARK, SDA5_MARK, SCL5_MARK,
402 SDA4_MARK, SCL4_MARK, SDA3_MARK, SCL3_MARK, 480 SDA4_MARK, SCL4_MARK, SDA3_MARK, SCL3_MARK,
481 SDA9_MARK, SCL9_MARK,
403 482
404 /* PTT (mobule: SYSTEM, PWMX) */ 483 /* PTT (mobule: PWMX, AUD) */
405 AUDSYNC_MARK, AUDCK_MARK, 484 PWMX7_MARK, PWMX6_MARK, PWMX5_MARK, PWMX4_MARK,
406 AUDATA3_MARK, AUDATA2_MARK, 485 PWMX3_MARK, PWMX2_MARK, PWMX1_MARK, PWMX0_MARK,
407 AUDATA1_MARK, AUDATA0_MARK, 486 AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
408 PWX7_MARK, PWX6_MARK, PWX5_MARK, PWX4_MARK, 487 STATUS1_MARK, STATUS0_MARK,
409 488
410 /* PTU (mobule: LBSC, DMAC) */ 489 /* PTU (mobule: LPC, APM) */
411 CS6_MARK, CS5_MARK, CS4_MARK, CS0_MARK, 490 LGPIO7_MARK, LGPIO6_MARK, LGPIO5_MARK, LGPIO4_MARK,
412 RD_MARK, WE0_MARK, A25_MARK, A24_MARK, 491 LGPIO3_MARK, LGPIO2_MARK, LGPIO1_MARK, LGPIO0_MARK,
413 DREQ0_MARK, DACK0_MARK, 492 APMONCTL_O_MARK, APMPWBTOUT_O_MARK, APMSCI_O_MARK,
493 APMVDDON_MARK, APMSLPBTN_MARK, APMPWRBTN_MARK, APMS5N_MARK,
494 APMS3N_MARK,
414 495
415 /* PTV (mobule: LBSC, DMAC) */ 496 /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */
416 A23_MARK, A22_MARK, A21_MARK, A20_MARK, 497 A23_MARK, A22_MARK, A21_MARK, A20_MARK,
417 A19_MARK, A18_MARK, A17_MARK, A16_MARK, 498 A19_MARK, A18_MARK, A17_MARK, A16_MARK,
418 TEND0_MARK, DREQ1_MARK, DACK1_MARK, TEND1_MARK, 499 COM2_RI_MARK, R_SPI_MOSI_MARK, R_SPI_MISO_MARK,
500 R_SPI_RSPCK_MARK, R_SPI_SSL0_MARK, R_SPI_SSL1_MARK,
501 EVENT7_MARK, EVENT6_MARK, VBIOS_DI_MARK, VBIOS_DO_MARK,
502 VBIOS_CLK_MARK, VBIOS_CS_MARK,
419 503
420 /* PTW (mobule: LBSC) */ 504 /* PTW (mobule: LBSC, EVC, SCIF) */
421 A15_MARK, A14_MARK, A13_MARK, A12_MARK, 505 A15_MARK, A14_MARK, A13_MARK, A12_MARK,
422 A11_MARK, A10_MARK, A9_MARK, A8_MARK, 506 A11_MARK, A10_MARK, A9_MARK, A8_MARK,
507 EVENT5_MARK, EVENT4_MARK, EVENT3_MARK, EVENT2_MARK,
508 EVENT1_MARK, EVENT0_MARK, CTS4_MARK, CTS2_MARK,
423 509
424 /* PTX (mobule: LBSC) */ 510 /* PTX (mobule: LBSC, SCIF, SIM) */
425 A7_MARK, A6_MARK, A5_MARK, A4_MARK, 511 A7_MARK, A6_MARK, A5_MARK, A4_MARK,
426 A3_MARK, A2_MARK, A1_MARK, A0_MARK, 512 A3_MARK, A2_MARK, A1_MARK, A0_MARK,
513 RTS2_MARK, SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
427 514
428 /* PTY (mobule: LBSC) */ 515 /* PTY (mobule: LBSC) */
429 D7_MARK, D6_MARK, D5_MARK, D4_MARK, 516 D7_MARK, D6_MARK, D5_MARK, D4_MARK,
430 D3_MARK, D2_MARK, D1_MARK, D0_MARK, 517 D3_MARK, D2_MARK, D1_MARK, D0_MARK,
518
519 /* PTZ (mobule: eMMC, ONFI) */
520 MMCDAT7_MARK, MMCDAT6_MARK, MMCDAT5_MARK, MMCDAT4_MARK,
521 MMCDAT3_MARK, MMCDAT2_MARK, MMCDAT1_MARK, MMCDAT0_MARK,
522 ON_DQ7_MARK, ON_DQ6_MARK, ON_DQ5_MARK, ON_DQ4_MARK,
523 ON_DQ3_MARK, ON_DQ2_MARK, ON_DQ1_MARK, ON_DQ0_MARK,
524
431 PINMUX_MARK_END, 525 PINMUX_MARK_END,
432}; 526};
433 527
@@ -473,6 +567,8 @@ static pinmux_enum_t pinmux_data[] = {
473 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT), 567 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
474 568
475 /* PTE GPIO */ 569 /* PTE GPIO */
570 PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT),
571 PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT),
476 PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT), 572 PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT),
477 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT), 573 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
478 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT), 574 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
@@ -521,7 +617,6 @@ static pinmux_enum_t pinmux_data[] = {
521 PINMUX_DATA(PTI0_DATA, PTI0_IN, PTI0_OUT), 617 PINMUX_DATA(PTI0_DATA, PTI0_IN, PTI0_OUT),
522 618
523 /* PTJ GPIO */ 619 /* PTJ GPIO */
524 PINMUX_DATA(PTJ7_DATA, PTJ7_IN, PTJ7_OUT),
525 PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT), 620 PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT),
526 PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT), 621 PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT),
527 PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT), 622 PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT),
@@ -541,7 +636,6 @@ static pinmux_enum_t pinmux_data[] = {
541 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT), 636 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
542 637
543 /* PTL GPIO */ 638 /* PTL GPIO */
544 PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT),
545 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT), 639 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
546 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT), 640 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
547 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT), 641 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
@@ -560,7 +654,6 @@ static pinmux_enum_t pinmux_data[] = {
560 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT), 654 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
561 655
562 /* PTN GPIO */ 656 /* PTN GPIO */
563 PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT),
564 PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT), 657 PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT),
565 PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT), 658 PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT),
566 PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT), 659 PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT),
@@ -609,6 +702,8 @@ static pinmux_enum_t pinmux_data[] = {
609 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT), 702 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
610 703
611 /* PTT GPIO */ 704 /* PTT GPIO */
705 PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT),
706 PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT),
612 PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT), 707 PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT),
613 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT), 708 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
614 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT), 709 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
@@ -677,186 +772,204 @@ static pinmux_enum_t pinmux_data[] = {
677 PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT), 772 PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT),
678 773
679 /* PTA FN */ 774 /* PTA FN */
680 PINMUX_DATA(BS_MARK, PS0_15_FN1, PTA7_FN), 775 PINMUX_DATA(BS_MARK, PTA7_FN),
681 PINMUX_DATA(LGPIO7_MARK, PS0_15_FN3, PTA7_FN), 776 PINMUX_DATA(RDWR_MARK, PTA6_FN),
682 PINMUX_DATA(RDWR_MARK, PS0_14_FN1, PTA6_FN), 777 PINMUX_DATA(WE1_MARK, PTA5_FN),
683 PINMUX_DATA(LGPIO6_MARK, PS0_14_FN3, PTA6_FN), 778 PINMUX_DATA(RDY_MARK, PTA4_FN),
684 PINMUX_DATA(WE1_MARK, PS0_13_FN1, PTA5_FN), 779 PINMUX_DATA(ET0_MDC_MARK, PTA3_FN),
685 PINMUX_DATA(LGPIO5_MARK, PS0_13_FN3, PTA5_FN), 780 PINMUX_DATA(ET0_MDIO_MARK, PTA2_FN),
686 PINMUX_DATA(RDY_MARK, PS0_12_FN1, PTA4_FN), 781 PINMUX_DATA(ET1_MDC_MARK, PTA1_FN),
687 PINMUX_DATA(LGPIO4_MARK, PS0_12_FN3, PTA4_FN), 782 PINMUX_DATA(ET1_MDIO_MARK, PTA0_FN),
688 PINMUX_DATA(LGPIO3_MARK, PTA3_FN),
689 PINMUX_DATA(LGPIO2_MARK, PTA2_FN),
690 PINMUX_DATA(LGPIO1_MARK, PTA1_FN),
691 PINMUX_DATA(LGPIO0_MARK, PTA0_FN),
692 783
693 /* PTB FN */ 784 /* PTB FN */
694 PINMUX_DATA(D15_MARK, PS0_7_FN1, PTB7_FN), 785 PINMUX_DATA(IRQ15_MARK, PS0_15_FN1, PTB7_FN),
695 PINMUX_DATA(ET0_MDC_MARK, PS0_7_FN2, PTB7_FN), 786 PINMUX_DATA(ON_NRE_MARK, PS0_15_FN2, PTB7_FN),
696 PINMUX_DATA(D14_MARK, PS0_6_FN1, PTB6_FN), 787 PINMUX_DATA(IRQ14_MARK, PS0_14_FN1, PTB6_FN),
697 PINMUX_DATA(ET0_MDIO_MARK, PS0_6_FN2, PTB6_FN), 788 PINMUX_DATA(ON_NWE_MARK, PS0_14_FN2, PTB6_FN),
698 PINMUX_DATA(D13_MARK, PS0_5_FN1, PTB5_FN), 789 PINMUX_DATA(IRQ13_MARK, PS0_13_FN1, PTB5_FN),
699 PINMUX_DATA(ET1_MDC_MARK, PS0_5_FN2, PTB5_FN), 790 PINMUX_DATA(ON_NWP_MARK, PS0_13_FN2, PTB5_FN),
700 PINMUX_DATA(D12_MARK, PS0_4_FN1, PTB4_FN), 791 PINMUX_DATA(IRQ12_MARK, PS0_12_FN1, PTB4_FN),
701 PINMUX_DATA(ET1_MDIO_MARK, PS0_4_FN2, PTB4_FN), 792 PINMUX_DATA(ON_NCE0_MARK, PS0_12_FN2, PTB4_FN),
702 PINMUX_DATA(D11_MARK, PS0_3_FN1, PTB3_FN), 793 PINMUX_DATA(IRQ11_MARK, PS0_11_FN1, PTB3_FN),
703 PINMUX_DATA(SIM_D_MARK, PS0_3_FN2, PTB3_FN), 794 PINMUX_DATA(ON_R_B0_MARK, PS0_11_FN2, PTB3_FN),
704 PINMUX_DATA(D10_MARK, PS0_2_FN1, PTB2_FN), 795 PINMUX_DATA(IRQ10_MARK, PS0_10_FN1, PTB2_FN),
705 PINMUX_DATA(SIM_CLK_MARK, PS0_2_FN2, PTB2_FN), 796 PINMUX_DATA(ON_ALE_MARK, PS0_10_FN2, PTB2_FN),
706 PINMUX_DATA(D9_MARK, PS0_1_FN1, PTB1_FN), 797 PINMUX_DATA(IRQ9_MARK, PS0_9_FN1, PTB1_FN),
707 PINMUX_DATA(SIM_RST_MARK, PS0_1_FN2, PTB1_FN), 798 PINMUX_DATA(ON_CLE_MARK, PS0_9_FN2, PTB1_FN),
708 PINMUX_DATA(D8_MARK, PTB0_FN), 799 PINMUX_DATA(IRQ8_MARK, PS0_8_FN1, PTB0_FN),
800 PINMUX_DATA(TCLK_MARK, PS0_8_FN2, PTB0_FN),
709 801
710 /* PTC FN */ 802 /* PTC FN */
711 PINMUX_DATA(SD_WP_MARK, PTC7_FN), 803 PINMUX_DATA(IRQ7_MARK, PS0_7_FN1, PTC7_FN),
712 PINMUX_DATA(SD_CD_MARK, PTC6_FN), 804 PINMUX_DATA(PWMU0_MARK, PS0_7_FN2, PTC7_FN),
713 PINMUX_DATA(SD_CLK_MARK, PTC5_FN), 805 PINMUX_DATA(IRQ6_MARK, PS0_6_FN1, PTC6_FN),
714 PINMUX_DATA(SD_CMD_MARK, PTC4_FN), 806 PINMUX_DATA(PWMU1_MARK, PS0_6_FN2, PTC6_FN),
715 PINMUX_DATA(SD_D3_MARK, PTC3_FN), 807 PINMUX_DATA(IRQ5_MARK, PS0_5_FN1, PTC5_FN),
716 PINMUX_DATA(SD_D2_MARK, PTC2_FN), 808 PINMUX_DATA(PWMU2_MARK, PS0_5_FN2, PTC5_FN),
717 PINMUX_DATA(SD_D1_MARK, PTC1_FN), 809 PINMUX_DATA(IRQ4_MARK, PS0_4_FN1, PTC5_FN),
718 PINMUX_DATA(SD_D0_MARK, PTC0_FN), 810 PINMUX_DATA(PWMU3_MARK, PS0_4_FN2, PTC4_FN),
811 PINMUX_DATA(IRQ3_MARK, PS0_3_FN1, PTC3_FN),
812 PINMUX_DATA(PWMU4_MARK, PS0_3_FN2, PTC3_FN),
813 PINMUX_DATA(IRQ2_MARK, PS0_2_FN1, PTC2_FN),
814 PINMUX_DATA(PWMU5_MARK, PS0_2_FN2, PTC2_FN),
815 PINMUX_DATA(IRQ1_MARK, PTC1_FN),
816 PINMUX_DATA(IRQ0_MARK, PTC0_FN),
719 817
720 /* PTD FN */ 818 /* PTD FN */
721 PINMUX_DATA(IRQ7_MARK, PS1_7_FN1, PTD7_FN), 819 PINMUX_DATA(SP0_MOSI_MARK, PTD7_FN),
722 PINMUX_DATA(ADTRG1_MARK, PS1_7_FN3, PTD7_FN), 820 PINMUX_DATA(SP0_MISO_MARK, PTD6_FN),
723 PINMUX_DATA(IRQ6_MARK, PS1_6_FN1, PTD6_FN), 821 PINMUX_DATA(SP0_SCK_MARK, PTD5_FN),
724 PINMUX_DATA(ADTRG0_MARK, PS1_6_FN3, PTD6_FN), 822 PINMUX_DATA(SP0_SCK_FB_MARK, PTD4_FN),
725 PINMUX_DATA(IRQ5_MARK, PTD5_FN), 823 PINMUX_DATA(SP0_SS0_MARK, PTD3_FN),
726 PINMUX_DATA(IRQ4_MARK, PTD4_FN), 824 PINMUX_DATA(SP0_SS1_MARK, PS1_10_FN1, PTD2_FN),
727 PINMUX_DATA(IRQ3_MARK, PTD3_FN), 825 PINMUX_DATA(DREQ0_MARK, PS1_10_FN2, PTD2_FN),
728 PINMUX_DATA(IRQ2_MARK, PTD2_FN), 826 PINMUX_DATA(SP0_SS2_MARK, PS1_9_FN1, PTD1_FN),
729 PINMUX_DATA(IRQ1_MARK, PTD1_FN), 827 PINMUX_DATA(DACK0_MARK, PS1_9_FN2, PTD1_FN),
730 PINMUX_DATA(IRQ0_MARK, PTD0_FN), 828 PINMUX_DATA(SP0_SS3_MARK, PS1_8_FN1, PTD0_FN),
829 PINMUX_DATA(TEND0_MARK, PS1_8_FN2, PTD0_FN),
731 830
732 /* PTE FN */ 831 /* PTE FN */
733 PINMUX_DATA(ET0_CRS_DV_MARK, PTE7_FN), 832 PINMUX_DATA(RMII0_CRS_DV_MARK, PTE7_FN),
734 PINMUX_DATA(ET0_TXD1_MARK, PTE6_FN), 833 PINMUX_DATA(RMII0_TXD1_MARK, PTE6_FN),
735 PINMUX_DATA(ET0_TXD0_MARK, PTE5_FN), 834 PINMUX_DATA(RMII0_TXD0_MARK, PTE5_FN),
736 PINMUX_DATA(ET0_TX_EN_MARK, PTE4_FN), 835 PINMUX_DATA(RMII0_TXEN_MARK, PTE4_FN),
737 PINMUX_DATA(ET0_REF_CLK_MARK, PTE3_FN), 836 PINMUX_DATA(RMII0_REFCLK_MARK, PTE3_FN),
738 PINMUX_DATA(ET0_RXD1_MARK, PTE2_FN), 837 PINMUX_DATA(RMII0_RXD1_MARK, PTE2_FN),
739 PINMUX_DATA(ET0_RXD0_MARK, PTE1_FN), 838 PINMUX_DATA(RMII0_RXD0_MARK, PTE1_FN),
740 PINMUX_DATA(ET0_RX_ER_MARK, PTE0_FN), 839 PINMUX_DATA(RMII0_RX_ER_MARK, PTE0_FN),
741 840
742 /* PTF FN */ 841 /* PTF FN */
743 PINMUX_DATA(ET1_CRS_DV_MARK, PTF7_FN), 842 PINMUX_DATA(RMII1_CRS_DV_MARK, PTF7_FN),
744 PINMUX_DATA(ET1_TXD1_MARK, PTF6_FN), 843 PINMUX_DATA(RMII1_TXD1_MARK, PTF6_FN),
745 PINMUX_DATA(ET1_TXD0_MARK, PTF5_FN), 844 PINMUX_DATA(RMII1_TXD0_MARK, PTF5_FN),
746 PINMUX_DATA(ET1_TX_EN_MARK, PTF4_FN), 845 PINMUX_DATA(RMII1_TXEN_MARK, PTF4_FN),
747 PINMUX_DATA(ET1_REF_CLK_MARK, PTF3_FN), 846 PINMUX_DATA(RMII1_REFCLK_MARK, PTF3_FN),
748 PINMUX_DATA(ET1_RXD1_MARK, PTF2_FN), 847 PINMUX_DATA(RMII1_RXD1_MARK, PS1_2_FN1, PTF2_FN),
749 PINMUX_DATA(ET1_RXD0_MARK, PTF1_FN), 848 PINMUX_DATA(RAC_RI_MARK, PS1_2_FN2, PTF2_FN),
750 PINMUX_DATA(ET1_RX_ER_MARK, PTF0_FN), 849 PINMUX_DATA(RMII1_RXD0_MARK, PTF1_FN),
850 PINMUX_DATA(RMII1_RX_ER_MARK, PTF0_FN),
751 851
752 /* PTG FN */ 852 /* PTG FN */
753 PINMUX_DATA(PWX0_MARK, PTG7_FN), 853 PINMUX_DATA(BOOTFMS_MARK, PTG7_FN),
754 PINMUX_DATA(PWX1_MARK, PTG6_FN), 854 PINMUX_DATA(BOOTWP_MARK, PTG6_FN),
755 PINMUX_DATA(STATUS0_MARK, PS2_13_FN1, PTG5_FN), 855 PINMUX_DATA(A25_MARK, PS2_13_FN1, PTG5_FN),
756 PINMUX_DATA(PWX2_MARK, PS2_13_FN3, PTG5_FN), 856 PINMUX_DATA(MMCCLK_MARK, PS2_13_FN2, PTG5_FN),
757 PINMUX_DATA(STATUS1_MARK, PS2_12_FN1, PTG4_FN), 857 PINMUX_DATA(A24_MARK, PS2_12_FN1, PTG4_FN),
758 PINMUX_DATA(PWX3_MARK, PS2_12_FN3, PTG4_FN), 858 PINMUX_DATA(MMCCMD_MARK, PS2_12_FN2, PTG4_FN),
759 PINMUX_DATA(SERIRQ_MARK, PTG3_FN), 859 PINMUX_DATA(SERIRQ_MARK, PTG3_FN),
760 PINMUX_DATA(CLKRUN_MARK, PTG2_FN), 860 PINMUX_DATA(WDTOVF_MARK, PTG2_FN),
761 PINMUX_DATA(LPCPD_MARK, PTG1_FN), 861 PINMUX_DATA(LPCPD_MARK, PTG1_FN),
762 PINMUX_DATA(LDRQ_MARK, PTG0_FN), 862 PINMUX_DATA(LDRQ_MARK, PTG0_FN),
763 863
764 /* PTH FN */ 864 /* PTH FN */
765 PINMUX_DATA(SP1_MOSI_MARK, PTH7_FN), 865 PINMUX_DATA(SP1_MOSI_MARK, PS2_7_FN1, PTH7_FN),
766 PINMUX_DATA(SP1_MISO_MARK, PTH6_FN), 866 PINMUX_DATA(TEND1_MARK, PS2_7_FN2, PTH7_FN),
767 PINMUX_DATA(SP1_SCK_MARK, PTH5_FN), 867 PINMUX_DATA(SP1_MISO_MARK, PS2_6_FN1, PTH6_FN),
768 PINMUX_DATA(SP1_SCK_FB_MARK, PTH4_FN), 868 PINMUX_DATA(DREQ1_MARK, PS2_6_FN2, PTH6_FN),
869 PINMUX_DATA(SP1_SCK_MARK, PS2_5_FN1, PTH5_FN),
870 PINMUX_DATA(DACK1_MARK, PS2_5_FN2, PTH5_FN),
871 PINMUX_DATA(SP1_SCK_FB_MARK, PS2_4_FN1, PTH4_FN),
872 PINMUX_DATA(ADTRG1_MARK, PS2_4_FN2, PTH4_FN),
769 PINMUX_DATA(SP1_SS0_MARK, PTH3_FN), 873 PINMUX_DATA(SP1_SS0_MARK, PTH3_FN),
770 PINMUX_DATA(TCLK_MARK, PTH2_FN), 874 PINMUX_DATA(SP1_SS1_MARK, PS2_2_FN1, PTH2_FN),
771 PINMUX_DATA(RXD4_MARK, PS2_1_FN1, PTH1_FN), 875 PINMUX_DATA(ADTRG0_MARK, PS2_2_FN2, PTH2_FN),
772 PINMUX_DATA(SP1_SS1_MARK, PS2_1_FN2, PTH1_FN), 876 PINMUX_DATA(WP_MARK, PTH1_FN),
773 PINMUX_DATA(TXD4_MARK, PS2_0_FN1, PTH0_FN), 877 PINMUX_DATA(FMS0_MARK, PTH0_FN),
774 PINMUX_DATA(SP0_SS1_MARK, PS2_0_FN2, PTH0_FN),
775 878
776 /* PTI FN */ 879 /* PTI FN */
777 PINMUX_DATA(IRQ15_MARK, PTI7_FN), 880 PINMUX_DATA(D15_MARK, PS3_15_FN1, PTI7_FN),
778 PINMUX_DATA(IRQ14_MARK, PTI6_FN), 881 PINMUX_DATA(SD_WP_MARK, PS3_15_FN2, PTI7_FN),
779 PINMUX_DATA(IRQ13_MARK, PTI5_FN), 882 PINMUX_DATA(D14_MARK, PS3_14_FN1, PTI6_FN),
780 PINMUX_DATA(IRQ12_MARK, PTI4_FN), 883 PINMUX_DATA(SD_CD_MARK, PS3_14_FN2, PTI6_FN),
781 PINMUX_DATA(IRQ11_MARK, PTI3_FN), 884 PINMUX_DATA(D13_MARK, PS3_13_FN1, PTI5_FN),
782 PINMUX_DATA(IRQ10_MARK, PTI2_FN), 885 PINMUX_DATA(SD_CLK_MARK, PS3_13_FN2, PTI5_FN),
783 PINMUX_DATA(IRQ9_MARK, PTI1_FN), 886 PINMUX_DATA(D12_MARK, PS3_12_FN1, PTI4_FN),
784 PINMUX_DATA(IRQ8_MARK, PTI0_FN), 887 PINMUX_DATA(SD_CMD_MARK, PS3_12_FN2, PTI4_FN),
888 PINMUX_DATA(D11_MARK, PS3_11_FN1, PTI3_FN),
889 PINMUX_DATA(SD_D3_MARK, PS3_11_FN2, PTI3_FN),
890 PINMUX_DATA(D10_MARK, PS3_10_FN1, PTI2_FN),
891 PINMUX_DATA(SD_D2_MARK, PS3_10_FN2, PTI2_FN),
892 PINMUX_DATA(D9_MARK, PS3_9_FN1, PTI1_FN),
893 PINMUX_DATA(SD_D1_MARK, PS3_9_FN2, PTI1_FN),
894 PINMUX_DATA(D8_MARK, PS3_8_FN1, PTI0_FN),
895 PINMUX_DATA(SD_D0_MARK, PS3_8_FN2, PTI0_FN),
785 896
786 /* PTJ FN */ 897 /* PTJ FN */
787 PINMUX_DATA(RXD3_MARK, PTJ7_FN), 898 PINMUX_DATA(RTS3_MARK, PTJ6_FN),
788 PINMUX_DATA(TXD3_MARK, PTJ6_FN), 899 PINMUX_DATA(CTS3_MARK, PTJ5_FN),
789 PINMUX_DATA(RXD2_MARK, PTJ5_FN), 900 PINMUX_DATA(TXD3_MARK, PTJ4_FN),
790 PINMUX_DATA(TXD2_MARK, PTJ4_FN), 901 PINMUX_DATA(RXD3_MARK, PTJ3_FN),
791 PINMUX_DATA(COM1_TXD_MARK, PTJ3_FN), 902 PINMUX_DATA(RTS4_MARK, PTJ2_FN),
792 PINMUX_DATA(COM1_RXD_MARK, PTJ2_FN), 903 PINMUX_DATA(RXD4_MARK, PTJ1_FN),
793 PINMUX_DATA(COM1_RTS_MARK, PTJ1_FN), 904 PINMUX_DATA(TXD4_MARK, PTJ0_FN),
794 PINMUX_DATA(COM1_CTS_MARK, PTJ0_FN),
795 905
796 /* PTK FN */ 906 /* PTK FN */
797 PINMUX_DATA(COM2_TXD_MARK, PTK7_FN), 907 PINMUX_DATA(COM2_TXD_MARK, PS3_7_FN1, PTK7_FN),
908 PINMUX_DATA(SCK2_MARK, PS3_7_FN2, PTK7_FN),
798 PINMUX_DATA(COM2_RXD_MARK, PTK6_FN), 909 PINMUX_DATA(COM2_RXD_MARK, PTK6_FN),
799 PINMUX_DATA(COM2_RTS_MARK, PTK5_FN), 910 PINMUX_DATA(COM2_RTS_MARK, PTK5_FN),
800 PINMUX_DATA(COM2_CTS_MARK, PTK4_FN), 911 PINMUX_DATA(COM2_CTS_MARK, PTK4_FN),
801 PINMUX_DATA(COM2_DTR_MARK, PTK3_FN), 912 PINMUX_DATA(COM2_DTR_MARK, PTK3_FN),
802 PINMUX_DATA(COM2_DSR_MARK, PTK2_FN), 913 PINMUX_DATA(COM2_DSR_MARK, PS3_2_FN1, PTK2_FN),
803 PINMUX_DATA(COM2_DCD_MARK, PTK1_FN), 914 PINMUX_DATA(SCK4_MARK, PS3_2_FN2, PTK2_FN),
804 PINMUX_DATA(COM2_RI_MARK, PTK0_FN), 915 PINMUX_DATA(COM2_DCD_MARK, PS3_1_FN1, PTK1_FN),
916 PINMUX_DATA(SCK3_MARK, PS3_1_FN2, PTK1_FN),
917 PINMUX_DATA(CLKOUT_MARK, PTK0_FN),
805 918
806 /* PTL FN */ 919 /* PTL FN */
807 PINMUX_DATA(RAC_TXD_MARK, PTL7_FN), 920 PINMUX_DATA(RAC_RXD_MARK, PS4_14_FN1, PTL6_FN),
808 PINMUX_DATA(RAC_RXD_MARK, PTL6_FN), 921 PINMUX_DATA(RXD2_MARK, PS4_14_FN2, PTL6_FN),
809 PINMUX_DATA(RAC_RTS_MARK, PTL5_FN), 922 PINMUX_DATA(RAC_RTS_MARK, PS4_13_FN1, PTL5_FN),
810 PINMUX_DATA(RAC_CTS_MARK, PTL4_FN), 923 PINMUX_DATA(CS5_MARK, PS4_13_FN2, PTL5_FN),
924 PINMUX_DATA(RAC_CTS_MARK, PS4_12_FN1, PTL4_FN),
925 PINMUX_DATA(CS6_MARK, PS4_12_FN2, PTL4_FN),
811 PINMUX_DATA(RAC_DTR_MARK, PTL3_FN), 926 PINMUX_DATA(RAC_DTR_MARK, PTL3_FN),
812 PINMUX_DATA(RAC_DSR_MARK, PTL2_FN), 927 PINMUX_DATA(RAC_DSR_MARK, PS4_10_FN1, PTL2_FN),
813 PINMUX_DATA(RAC_DCD_MARK, PTL1_FN), 928 PINMUX_DATA(AUDSYNC_MARK, PS4_10_FN2, PTL2_FN),
814 PINMUX_DATA(RAC_RI_MARK, PTL0_FN), 929 PINMUX_DATA(RAC_DCD_MARK, PS4_9_FN1, PTL1_FN),
930 PINMUX_DATA(AUDCK_MARK, PS4_9_FN2, PTL1_FN),
931 PINMUX_DATA(RAC_TXD_MARK, PS4_8_FN1, PTL0_FN),
932 PINMUX_DATA(TXD2_MARK, PS4_8_FN1, PTL0_FN),
815 933
816 /* PTM FN */ 934 /* PTM FN */
817 PINMUX_DATA(WP_MARK, PTM6_FN), 935 PINMUX_DATA(CS4_MARK, PTM7_FN),
818 PINMUX_DATA(FMS0_MARK, PTM5_FN), 936 PINMUX_DATA(RD_MARK, PTM6_FN),
819 PINMUX_DATA(FMS1_MARK, PTM4_FN), 937 PINMUX_DATA(WE0_MARK, PTM7_FN),
938 PINMUX_DATA(CS0_MARK, PTM4_FN),
820 PINMUX_DATA(SDA6_MARK, PTM3_FN), 939 PINMUX_DATA(SDA6_MARK, PTM3_FN),
821 PINMUX_DATA(SCL6_MARK, PTM2_FN), 940 PINMUX_DATA(SCL6_MARK, PTM2_FN),
822 PINMUX_DATA(SDA7_MARK, PTM1_FN), 941 PINMUX_DATA(SDA7_MARK, PTM1_FN),
823 PINMUX_DATA(SCL7_MARK, PTM0_FN), 942 PINMUX_DATA(SCL7_MARK, PTM0_FN),
824 943
825 /* PTN FN */ 944 /* PTN FN */
826 PINMUX_DATA(SCK2_MARK, PS4_15_FN1, PTN7_FN), 945 PINMUX_DATA(VBUS_EN_MARK, PTN6_FN),
827 PINMUX_DATA(EVENT7_MARK, PS4_15_FN2, PTN7_FN), 946 PINMUX_DATA(VBUS_OC_MARK, PTN5_FN),
828 PINMUX_DATA(RTS4_MARK, PS4_14_FN1, PTN6_FN), 947 PINMUX_DATA(JMCTCK_MARK, PS4_4_FN1, PTN4_FN),
829 PINMUX_DATA(EVENT6_MARK, PS4_14_FN2, PTN6_FN), 948 PINMUX_DATA(SGPIO1_CLK_MARK, PS4_4_FN2, PTN4_FN),
830 PINMUX_DATA(RTS3_MARK, PS4_13_FN1, PTN5_FN), 949 PINMUX_DATA(JMCTMS_MARK, PS4_3_FN1, PTN5_FN),
831 PINMUX_DATA(EVENT5_MARK, PS4_13_FN2, PTN5_FN), 950 PINMUX_DATA(SGPIO1_LOAD_MARK, PS4_3_FN2, PTN5_FN),
832 PINMUX_DATA(RTS2_MARK, PS4_12_FN1, PTN4_FN), 951 PINMUX_DATA(JMCTDO_MARK, PS4_2_FN1, PTN2_FN),
833 PINMUX_DATA(EVENT4_MARK, PS4_12_FN2, PTN4_FN), 952 PINMUX_DATA(SGPIO1_DO_MARK, PS4_2_FN2, PTN2_FN),
834 PINMUX_DATA(CTS4_MARK, PS4_11_FN1, PTN3_FN), 953 PINMUX_DATA(JMCTDI_MARK, PS4_1_FN1, PTN1_FN),
835 PINMUX_DATA(EVENT3_MARK, PS4_11_FN2, PTN3_FN), 954 PINMUX_DATA(SGPIO1_DI_MARK, PS4_1_FN2, PTN1_FN),
836 PINMUX_DATA(CTS3_MARK, PS4_10_FN1, PTN2_FN), 955 PINMUX_DATA(JMCTRST_MARK, PS4_0_FN1, PTN0_FN),
837 PINMUX_DATA(EVENT2_MARK, PS4_10_FN2, PTN2_FN), 956 PINMUX_DATA(SUB_CLKIN_MARK, PS4_0_FN2, PTN0_FN),
838 PINMUX_DATA(CTS2_MARK, PS4_9_FN1, PTN1_FN),
839 PINMUX_DATA(EVENT1_MARK, PS4_9_FN2, PTN1_FN),
840 PINMUX_DATA(EVENT0_MARK, PTN0_FN),
841 957
842 /* PTO FN */ 958 /* PTO FN */
843 PINMUX_DATA(SGPIO0_CLK_MARK, PTO7_FN), 959 PINMUX_DATA(SGPIO0_CLK_MARK, PTO7_FN),
844 PINMUX_DATA(SGPIO0_LOAD_MARK, PTO6_FN), 960 PINMUX_DATA(SGPIO0_LOAD_MARK, PTO6_FN),
845 PINMUX_DATA(SGPIO0_DI_MARK, PTO5_FN), 961 PINMUX_DATA(SGPIO0_DI_MARK, PTO5_FN),
846 PINMUX_DATA(SGPIO0_DO_MARK, PTO4_FN), 962 PINMUX_DATA(SGPIO0_DO_MARK, PTO4_FN),
847 PINMUX_DATA(SGPIO1_CLK_MARK, PTO3_FN), 963 PINMUX_DATA(SGPIO2_CLK_MARK, PS5_11_FN1, PTO3_FN),
848 PINMUX_DATA(SGPIO1_LOAD_MARK, PTO2_FN), 964 PINMUX_DATA(COM1_TXD_MARK, PS5_11_FN2, PTO3_FN),
849 PINMUX_DATA(SGPIO1_DI_MARK, PTO1_FN), 965 PINMUX_DATA(SGPIO2_LOAD_MARK, PS5_10_FN1, PTO2_FN),
850 PINMUX_DATA(SGPIO1_DO_MARK, PTO0_FN), 966 PINMUX_DATA(COM1_RXD_MARK, PS5_10_FN2, PTO2_FN),
967 PINMUX_DATA(SGPIO2_DI_MARK, PS5_9_FN1, PTO1_FN),
968 PINMUX_DATA(COM1_RTS_MARK, PS5_9_FN2, PTO1_FN),
969 PINMUX_DATA(SGPIO2_DO_MARK, PS5_8_FN1, PTO0_FN),
970 PINMUX_DATA(COM1_CTS_MARK, PS5_8_FN2, PTO0_FN),
851 971
852 /* PTP FN */ 972 /* PTP FN */
853 PINMUX_DATA(JMCTCK_MARK, PTP6_FN),
854 PINMUX_DATA(JMCTMS_MARK, PTP5_FN),
855 PINMUX_DATA(JMCTDO_MARK, PTP4_FN),
856 PINMUX_DATA(JMCTDI_MARK, PTP3_FN),
857 PINMUX_DATA(JMCRST_MARK, PTP2_FN),
858 PINMUX_DATA(SCK4_MARK, PTP1_FN),
859 PINMUX_DATA(SCK3_MARK, PTP0_FN),
860 973
861 /* PTQ FN */ 974 /* PTQ FN */
862 PINMUX_DATA(LAD3_MARK, PTQ6_FN), 975 PINMUX_DATA(LAD3_MARK, PTQ6_FN),
@@ -864,8 +977,8 @@ static pinmux_enum_t pinmux_data[] = {
864 PINMUX_DATA(LAD1_MARK, PTQ4_FN), 977 PINMUX_DATA(LAD1_MARK, PTQ4_FN),
865 PINMUX_DATA(LAD0_MARK, PTQ3_FN), 978 PINMUX_DATA(LAD0_MARK, PTQ3_FN),
866 PINMUX_DATA(LFRAME_MARK, PTQ2_FN), 979 PINMUX_DATA(LFRAME_MARK, PTQ2_FN),
867 PINMUX_DATA(SCK4_MARK, PTQ1_FN), 980 PINMUX_DATA(LRESET_MARK, PTQ1_FN),
868 PINMUX_DATA(SCK3_MARK, PTQ0_FN), 981 PINMUX_DATA(LCLK_MARK, PTQ0_FN),
869 982
870 /* PTR FN */ 983 /* PTR FN */
871 PINMUX_DATA(SDA8_MARK, PTR7_FN), /* DDC3? */ 984 PINMUX_DATA(SDA8_MARK, PTR7_FN), /* DDC3? */
@@ -888,58 +1001,84 @@ static pinmux_enum_t pinmux_data[] = {
888 PINMUX_DATA(SCL3_MARK, PTS0_FN), 1001 PINMUX_DATA(SCL3_MARK, PTS0_FN),
889 1002
890 /* PTT FN */ 1003 /* PTT FN */
891 PINMUX_DATA(AUDSYNC_MARK, PTS5_FN), 1004 PINMUX_DATA(PWMX7_MARK, PS5_7_FN1, PTT7_FN),
892 PINMUX_DATA(AUDCK_MARK, PTS4_FN), 1005 PINMUX_DATA(AUDATA3_MARK, PS5_7_FN2, PTT7_FN),
893 PINMUX_DATA(AUDATA3_MARK, PS4_3_FN1, PTS3_FN), 1006 PINMUX_DATA(PWMX6_MARK, PS5_6_FN1, PTT6_FN),
894 PINMUX_DATA(PWX7_MARK, PS4_3_FN2, PTS3_FN), 1007 PINMUX_DATA(AUDATA2_MARK, PS5_6_FN2, PTT6_FN),
895 PINMUX_DATA(AUDATA2_MARK, PS4_2_FN1, PTS2_FN), 1008 PINMUX_DATA(PWMX5_MARK, PS5_5_FN1, PTT5_FN),
896 PINMUX_DATA(PWX6_MARK, PS4_2_FN2, PTS2_FN), 1009 PINMUX_DATA(AUDATA1_MARK, PS5_5_FN2, PTT5_FN),
897 PINMUX_DATA(AUDATA1_MARK, PS4_1_FN1, PTS1_FN), 1010 PINMUX_DATA(PWMX4_MARK, PS5_4_FN1, PTT4_FN),
898 PINMUX_DATA(PWX5_MARK, PS4_1_FN2, PTS1_FN), 1011 PINMUX_DATA(AUDATA0_MARK, PS5_4_FN2, PTT4_FN),
899 PINMUX_DATA(AUDATA0_MARK, PS4_0_FN1, PTS0_FN), 1012 PINMUX_DATA(PWMX3_MARK, PS5_3_FN1, PTT3_FN),
900 PINMUX_DATA(PWX4_MARK, PS4_0_FN2, PTS0_FN), 1013 PINMUX_DATA(STATUS1_MARK, PS5_3_FN2, PTT3_FN),
1014 PINMUX_DATA(PWMX2_MARK, PS5_2_FN1, PTT2_FN),
1015 PINMUX_DATA(STATUS0_MARK, PS5_2_FN2, PTT2_FN),
1016 PINMUX_DATA(PWMX1_MARK, PTT1_FN),
1017 PINMUX_DATA(PWMX0_MARK, PTT0_FN),
901 1018
902 /* PTU FN */ 1019 /* PTU FN */
903 PINMUX_DATA(CS6_MARK, PTU7_FN), 1020 PINMUX_DATA(LGPIO7_MARK, PS6_15_FN1, PTU7_FN),
904 PINMUX_DATA(CS5_MARK, PTU6_FN), 1021 PINMUX_DATA(APMONCTL_O_MARK, PS6_15_FN2, PTU7_FN),
905 PINMUX_DATA(CS4_MARK, PTU5_FN), 1022 PINMUX_DATA(LGPIO6_MARK, PS6_14_FN1, PTU6_FN),
906 PINMUX_DATA(CS0_MARK, PTU4_FN), 1023 PINMUX_DATA(APMPWBTOUT_O_MARK, PS6_14_FN2, PTU6_FN),
907 PINMUX_DATA(RD_MARK, PTU3_FN), 1024 PINMUX_DATA(LGPIO5_MARK, PS6_13_FN1, PTU5_FN),
908 PINMUX_DATA(WE0_MARK, PTU2_FN), 1025 PINMUX_DATA(APMSCI_O_MARK, PS6_13_FN2, PTU5_FN),
909 PINMUX_DATA(A25_MARK, PS5_9_FN1, PTU1_FN), 1026 PINMUX_DATA(LGPIO4_MARK, PS6_12_FN1, PTU4_FN),
910 PINMUX_DATA(DREQ0_MARK, PS5_9_FN2, PTU1_FN), 1027 PINMUX_DATA(APMVDDON_MARK, PS6_12_FN2, PTU4_FN),
911 PINMUX_DATA(A24_MARK, PS5_8_FN1, PTU0_FN), 1028 PINMUX_DATA(LGPIO3_MARK, PS6_11_FN1, PTU3_FN),
912 PINMUX_DATA(DACK0_MARK, PS5_8_FN2, PTU0_FN), 1029 PINMUX_DATA(APMSLPBTN_MARK, PS6_11_FN2, PTU3_FN),
1030 PINMUX_DATA(LGPIO2_MARK, PS6_10_FN1, PTU2_FN),
1031 PINMUX_DATA(APMPWRBTN_MARK, PS6_10_FN2, PTU2_FN),
1032 PINMUX_DATA(LGPIO1_MARK, PS6_9_FN1, PTU1_FN),
1033 PINMUX_DATA(APMS5N_MARK, PS6_9_FN2, PTU1_FN),
1034 PINMUX_DATA(LGPIO0_MARK, PS6_8_FN1, PTU0_FN),
1035 PINMUX_DATA(APMS3N_MARK, PS6_8_FN2, PTU0_FN),
913 1036
914 /* PTV FN */ 1037 /* PTV FN */
915 PINMUX_DATA(A23_MARK, PS5_7_FN1, PTV7_FN), 1038 PINMUX_DATA(A23_MARK, PS6_7_FN1, PTV7_FN),
916 PINMUX_DATA(TEND0_MARK, PS5_7_FN2, PTV7_FN), 1039 PINMUX_DATA(COM2_RI_MARK, PS6_7_FN2, PTV7_FN),
917 PINMUX_DATA(A22_MARK, PS5_6_FN1, PTV6_FN), 1040 PINMUX_DATA(A22_MARK, PS6_6_FN1, PTV6_FN),
918 PINMUX_DATA(DREQ1_MARK, PS5_6_FN2, PTV6_FN), 1041 PINMUX_DATA(R_SPI_MOSI_MARK, PS6_6_FN2, PTV6_FN),
919 PINMUX_DATA(A21_MARK, PS5_5_FN1, PTV5_FN), 1042 PINMUX_DATA(A21_MARK, PS6_5_FN1, PTV5_FN),
920 PINMUX_DATA(DACK1_MARK, PS5_5_FN2, PTV5_FN), 1043 PINMUX_DATA(R_SPI_MISO_MARK, PS6_5_FN2, PTV5_FN),
921 PINMUX_DATA(A20_MARK, PS5_4_FN1, PTV4_FN), 1044 PINMUX_DATA(A20_MARK, PS6_4_FN1, PTV4_FN),
922 PINMUX_DATA(TEND1_MARK, PS5_4_FN2, PTV4_FN), 1045 PINMUX_DATA(R_SPI_RSPCK_MARK, PS6_4_FN2, PTV4_FN),
923 PINMUX_DATA(A19_MARK, PTV3_FN), 1046 PINMUX_DATA(A19_MARK, PS6_3_FN1, PTV3_FN),
924 PINMUX_DATA(A18_MARK, PTV2_FN), 1047 PINMUX_DATA(R_SPI_SSL0_MARK, PS6_3_FN2, PTV3_FN),
925 PINMUX_DATA(A17_MARK, PTV1_FN), 1048 PINMUX_DATA(A18_MARK, PS6_2_FN1, PTV2_FN),
926 PINMUX_DATA(A16_MARK, PTV0_FN), 1049 PINMUX_DATA(R_SPI_SSL1_MARK, PS6_2_FN2, PTV2_FN),
1050 PINMUX_DATA(A17_MARK, PS6_1_FN1, PTV1_FN),
1051 PINMUX_DATA(EVENT7_MARK, PS6_1_FN2, PTV1_FN),
1052 PINMUX_DATA(A16_MARK, PS6_0_FN1, PTV0_FN),
1053 PINMUX_DATA(EVENT6_MARK, PS6_0_FN1, PTV0_FN),
927 1054
928 /* PTW FN */ 1055 /* PTW FN */
929 PINMUX_DATA(A15_MARK, PTW7_FN), 1056 PINMUX_DATA(A15_MARK, PS7_15_FN1, PTW7_FN),
930 PINMUX_DATA(A14_MARK, PTW6_FN), 1057 PINMUX_DATA(EVENT5_MARK, PS7_15_FN2, PTW7_FN),
931 PINMUX_DATA(A13_MARK, PTW5_FN), 1058 PINMUX_DATA(A14_MARK, PS7_14_FN1, PTW6_FN),
932 PINMUX_DATA(A12_MARK, PTW4_FN), 1059 PINMUX_DATA(EVENT4_MARK, PS7_14_FN2, PTW6_FN),
933 PINMUX_DATA(A11_MARK, PTW3_FN), 1060 PINMUX_DATA(A13_MARK, PS7_13_FN1, PTW5_FN),
934 PINMUX_DATA(A10_MARK, PTW2_FN), 1061 PINMUX_DATA(EVENT3_MARK, PS7_13_FN2, PTW5_FN),
935 PINMUX_DATA(A9_MARK, PTW1_FN), 1062 PINMUX_DATA(A12_MARK, PS7_12_FN1, PTW4_FN),
936 PINMUX_DATA(A8_MARK, PTW0_FN), 1063 PINMUX_DATA(EVENT2_MARK, PS7_12_FN2, PTW4_FN),
1064 PINMUX_DATA(A11_MARK, PS7_11_FN1, PTW3_FN),
1065 PINMUX_DATA(EVENT1_MARK, PS7_11_FN2, PTW3_FN),
1066 PINMUX_DATA(A10_MARK, PS7_10_FN1, PTW2_FN),
1067 PINMUX_DATA(EVENT0_MARK, PS7_10_FN2, PTW2_FN),
1068 PINMUX_DATA(A9_MARK, PS7_9_FN1, PTW1_FN),
1069 PINMUX_DATA(CTS4_MARK, PS7_9_FN2, PTW1_FN),
1070 PINMUX_DATA(A8_MARK, PS7_8_FN1, PTW0_FN),
1071 PINMUX_DATA(CTS2_MARK, PS7_8_FN2, PTW0_FN),
937 1072
938 /* PTX FN */ 1073 /* PTX FN */
939 PINMUX_DATA(A7_MARK, PTX7_FN), 1074 PINMUX_DATA(A7_MARK, PS7_7_FN1, PTX7_FN),
940 PINMUX_DATA(A6_MARK, PTX6_FN), 1075 PINMUX_DATA(RTS2_MARK, PS7_7_FN2, PTX7_FN),
941 PINMUX_DATA(A5_MARK, PTX5_FN), 1076 PINMUX_DATA(A6_MARK, PS7_6_FN1, PTX6_FN),
942 PINMUX_DATA(A4_MARK, PTX4_FN), 1077 PINMUX_DATA(SIM_D_MARK, PS7_6_FN2, PTX6_FN),
1078 PINMUX_DATA(A5_MARK, PS7_5_FN1, PTX5_FN),
1079 PINMUX_DATA(SIM_CLK_MARK, PS7_5_FN2, PTX5_FN),
1080 PINMUX_DATA(A4_MARK, PS7_4_FN1, PTX4_FN),
1081 PINMUX_DATA(SIM_RST_MARK, PS7_4_FN2, PTX4_FN),
943 PINMUX_DATA(A3_MARK, PTX3_FN), 1082 PINMUX_DATA(A3_MARK, PTX3_FN),
944 PINMUX_DATA(A2_MARK, PTX2_FN), 1083 PINMUX_DATA(A2_MARK, PTX2_FN),
945 PINMUX_DATA(A1_MARK, PTX1_FN), 1084 PINMUX_DATA(A1_MARK, PTX1_FN),
@@ -954,6 +1093,24 @@ static pinmux_enum_t pinmux_data[] = {
954 PINMUX_DATA(D2_MARK, PTY2_FN), 1093 PINMUX_DATA(D2_MARK, PTY2_FN),
955 PINMUX_DATA(D1_MARK, PTY1_FN), 1094 PINMUX_DATA(D1_MARK, PTY1_FN),
956 PINMUX_DATA(D0_MARK, PTY0_FN), 1095 PINMUX_DATA(D0_MARK, PTY0_FN),
1096
1097 /* PTZ FN */
1098 PINMUX_DATA(MMCDAT7_MARK, PS8_15_FN1, PTZ7_FN),
1099 PINMUX_DATA(ON_DQ7_MARK, PS8_15_FN2, PTZ7_FN),
1100 PINMUX_DATA(MMCDAT6_MARK, PS8_14_FN1, PTZ6_FN),
1101 PINMUX_DATA(ON_DQ6_MARK, PS8_14_FN2, PTZ6_FN),
1102 PINMUX_DATA(MMCDAT5_MARK, PS8_13_FN1, PTZ5_FN),
1103 PINMUX_DATA(ON_DQ5_MARK, PS8_13_FN2, PTZ5_FN),
1104 PINMUX_DATA(MMCDAT4_MARK, PS8_12_FN1, PTZ4_FN),
1105 PINMUX_DATA(ON_DQ4_MARK, PS8_12_FN2, PTZ4_FN),
1106 PINMUX_DATA(MMCDAT3_MARK, PS8_11_FN1, PTZ3_FN),
1107 PINMUX_DATA(ON_DQ3_MARK, PS8_11_FN2, PTZ3_FN),
1108 PINMUX_DATA(MMCDAT2_MARK, PS8_10_FN1, PTZ2_FN),
1109 PINMUX_DATA(ON_DQ2_MARK, PS8_10_FN2, PTZ2_FN),
1110 PINMUX_DATA(MMCDAT1_MARK, PS8_9_FN1, PTZ1_FN),
1111 PINMUX_DATA(ON_DQ1_MARK, PS8_9_FN2, PTZ1_FN),
1112 PINMUX_DATA(MMCDAT0_MARK, PS8_8_FN1, PTZ0_FN),
1113 PINMUX_DATA(ON_DQ0_MARK, PS8_8_FN2, PTZ0_FN),
957}; 1114};
958 1115
959static struct pinmux_gpio pinmux_gpios[] = { 1116static struct pinmux_gpio pinmux_gpios[] = {
@@ -1048,7 +1205,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1048 PINMUX_GPIO(GPIO_PTI0, PTI0_DATA), 1205 PINMUX_GPIO(GPIO_PTI0, PTI0_DATA),
1049 1206
1050 /* PTJ */ 1207 /* PTJ */
1051 PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
1052 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA), 1208 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
1053 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA), 1209 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
1054 PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA), 1210 PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
@@ -1068,7 +1224,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1068 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA), 1224 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
1069 1225
1070 /* PTL */ 1226 /* PTL */
1071 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
1072 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA), 1227 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
1073 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA), 1228 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
1074 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA), 1229 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
@@ -1078,6 +1233,7 @@ static struct pinmux_gpio pinmux_gpios[] = {
1078 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA), 1233 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
1079 1234
1080 /* PTM */ 1235 /* PTM */
1236 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
1081 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA), 1237 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
1082 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA), 1238 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
1083 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA), 1239 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
@@ -1087,7 +1243,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1087 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA), 1243 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
1088 1244
1089 /* PTN */ 1245 /* PTN */
1090 PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
1091 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA), 1246 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
1092 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA), 1247 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
1093 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA), 1248 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
@@ -1107,6 +1262,7 @@ static struct pinmux_gpio pinmux_gpios[] = {
1107 PINMUX_GPIO(GPIO_PTO0, PTO0_DATA), 1262 PINMUX_GPIO(GPIO_PTO0, PTO0_DATA),
1108 1263
1109 /* PTP */ 1264 /* PTP */
1265 PINMUX_GPIO(GPIO_PTP7, PTP7_DATA),
1110 PINMUX_GPIO(GPIO_PTP6, PTP6_DATA), 1266 PINMUX_GPIO(GPIO_PTP6, PTP6_DATA),
1111 PINMUX_GPIO(GPIO_PTP5, PTP5_DATA), 1267 PINMUX_GPIO(GPIO_PTP5, PTP5_DATA),
1112 PINMUX_GPIO(GPIO_PTP4, PTP4_DATA), 1268 PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
@@ -1145,6 +1301,8 @@ static struct pinmux_gpio pinmux_gpios[] = {
1145 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA), 1301 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
1146 1302
1147 /* PTT */ 1303 /* PTT */
1304 PINMUX_GPIO(GPIO_PTT7, PTT7_DATA),
1305 PINMUX_GPIO(GPIO_PTT6, PTT6_DATA),
1148 PINMUX_GPIO(GPIO_PTT5, PTT5_DATA), 1306 PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
1149 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA), 1307 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
1150 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA), 1308 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
@@ -1212,54 +1370,35 @@ static struct pinmux_gpio pinmux_gpios[] = {
1212 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA), 1370 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
1213 PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA), 1371 PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
1214 1372
1215 /* PTA (mobule: LBSC, CPG, LPC) */ 1373 /* PTA (mobule: LBSC, RGMII) */
1216 PINMUX_GPIO(GPIO_FN_BS, BS_MARK), 1374 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1217 PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK), 1375 PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
1218 PINMUX_GPIO(GPIO_FN_WE1, WE1_MARK), 1376 PINMUX_GPIO(GPIO_FN_WE1, WE1_MARK),
1219 PINMUX_GPIO(GPIO_FN_RDY, RDY_MARK), 1377 PINMUX_GPIO(GPIO_FN_RDY, RDY_MARK),
1220 PINMUX_GPIO(GPIO_FN_MD10, MD10_MARK),
1221 PINMUX_GPIO(GPIO_FN_MD9, MD9_MARK),
1222 PINMUX_GPIO(GPIO_FN_MD8, MD8_MARK),
1223 PINMUX_GPIO(GPIO_FN_LGPIO7, LGPIO7_MARK),
1224 PINMUX_GPIO(GPIO_FN_LGPIO6, LGPIO6_MARK),
1225 PINMUX_GPIO(GPIO_FN_LGPIO5, LGPIO5_MARK),
1226 PINMUX_GPIO(GPIO_FN_LGPIO4, LGPIO4_MARK),
1227 PINMUX_GPIO(GPIO_FN_LGPIO3, LGPIO3_MARK),
1228 PINMUX_GPIO(GPIO_FN_LGPIO2, LGPIO2_MARK),
1229 PINMUX_GPIO(GPIO_FN_LGPIO1, LGPIO1_MARK),
1230 PINMUX_GPIO(GPIO_FN_LGPIO0, LGPIO0_MARK),
1231
1232 /* PTB (mobule: LBSC, EtherC, SIM, LPC) */
1233 PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
1234 PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
1235 PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
1236 PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
1237 PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
1238 PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
1239 PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
1240 PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
1241 PINMUX_GPIO(GPIO_FN_ET0_MDC, ET0_MDC_MARK), 1378 PINMUX_GPIO(GPIO_FN_ET0_MDC, ET0_MDC_MARK),
1242 PINMUX_GPIO(GPIO_FN_ET0_MDIO, ET0_MDIO_MARK), 1379 PINMUX_GPIO(GPIO_FN_ET0_MDIO, ET0_MDC_MARK),
1243 PINMUX_GPIO(GPIO_FN_ET1_MDC, ET1_MDC_MARK), 1380 PINMUX_GPIO(GPIO_FN_ET1_MDC, ET1_MDC_MARK),
1244 PINMUX_GPIO(GPIO_FN_ET1_MDIO, ET1_MDIO_MARK), 1381 PINMUX_GPIO(GPIO_FN_ET1_MDIO, ET1_MDC_MARK),
1245 PINMUX_GPIO(GPIO_FN_WPSZ1, WPSZ1_MARK),
1246 PINMUX_GPIO(GPIO_FN_WPSZ0, WPSZ0_MARK),
1247 PINMUX_GPIO(GPIO_FN_FWID, FWID_MARK),
1248 PINMUX_GPIO(GPIO_FN_FLSHSZ, FLSHSZ_MARK),
1249 PINMUX_GPIO(GPIO_FN_LPC_SPIEN, LPC_SPIEN_MARK),
1250 PINMUX_GPIO(GPIO_FN_BASEL, BASEL_MARK),
1251
1252 /* PTC (mobule: SD) */
1253 PINMUX_GPIO(GPIO_FN_SD_WP, SD_WP_MARK),
1254 PINMUX_GPIO(GPIO_FN_SD_CD, SD_CD_MARK),
1255 PINMUX_GPIO(GPIO_FN_SD_CLK, SD_CLK_MARK),
1256 PINMUX_GPIO(GPIO_FN_SD_CMD, SD_CMD_MARK),
1257 PINMUX_GPIO(GPIO_FN_SD_D3, SD_D3_MARK),
1258 PINMUX_GPIO(GPIO_FN_SD_D2, SD_D2_MARK),
1259 PINMUX_GPIO(GPIO_FN_SD_D1, SD_D1_MARK),
1260 PINMUX_GPIO(GPIO_FN_SD_D0, SD_D0_MARK),
1261 1382
1262 /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */ 1383 /* PTB (mobule: INTC, ONFI, TMU) */
1384 PINMUX_GPIO(GPIO_FN_IRQ15, IRQ15_MARK),
1385 PINMUX_GPIO(GPIO_FN_IRQ14, IRQ14_MARK),
1386 PINMUX_GPIO(GPIO_FN_IRQ13, IRQ13_MARK),
1387 PINMUX_GPIO(GPIO_FN_IRQ12, IRQ12_MARK),
1388 PINMUX_GPIO(GPIO_FN_IRQ11, IRQ11_MARK),
1389 PINMUX_GPIO(GPIO_FN_IRQ10, IRQ10_MARK),
1390 PINMUX_GPIO(GPIO_FN_IRQ9, IRQ9_MARK),
1391 PINMUX_GPIO(GPIO_FN_IRQ8, IRQ8_MARK),
1392 PINMUX_GPIO(GPIO_FN_ON_NRE, ON_NRE_MARK),
1393 PINMUX_GPIO(GPIO_FN_ON_NWE, ON_NWE_MARK),
1394 PINMUX_GPIO(GPIO_FN_ON_NWP, ON_NWP_MARK),
1395 PINMUX_GPIO(GPIO_FN_ON_NCE0, ON_NCE0_MARK),
1396 PINMUX_GPIO(GPIO_FN_ON_R_B0, ON_R_B0_MARK),
1397 PINMUX_GPIO(GPIO_FN_ON_ALE, ON_ALE_MARK),
1398 PINMUX_GPIO(GPIO_FN_ON_CLE, ON_CLE_MARK),
1399 PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
1400
1401 /* PTC (mobule: IRQ, PWMU) */
1263 PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK), 1402 PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK),
1264 PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK), 1403 PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK),
1265 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK), 1404 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
@@ -1268,80 +1407,102 @@ static struct pinmux_gpio pinmux_gpios[] = {
1268 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK), 1407 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
1269 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK), 1408 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
1270 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK), 1409 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
1271 PINMUX_GPIO(GPIO_FN_MD6, MD6_MARK), 1410 PINMUX_GPIO(GPIO_FN_PWMU0, PWMU0_MARK),
1272 PINMUX_GPIO(GPIO_FN_MD5, MD5_MARK), 1411 PINMUX_GPIO(GPIO_FN_PWMU1, PWMU1_MARK),
1273 PINMUX_GPIO(GPIO_FN_MD3, MD3_MARK), 1412 PINMUX_GPIO(GPIO_FN_PWMU2, PWMU2_MARK),
1274 PINMUX_GPIO(GPIO_FN_MD2, MD2_MARK), 1413 PINMUX_GPIO(GPIO_FN_PWMU3, PWMU3_MARK),
1275 PINMUX_GPIO(GPIO_FN_MD1, MD1_MARK), 1414 PINMUX_GPIO(GPIO_FN_PWMU4, PWMU4_MARK),
1276 PINMUX_GPIO(GPIO_FN_MD0, MD0_MARK), 1415 PINMUX_GPIO(GPIO_FN_PWMU5, PWMU5_MARK),
1277 PINMUX_GPIO(GPIO_FN_ADTRG1, ADTRG1_MARK), 1416
1278 PINMUX_GPIO(GPIO_FN_ADTRG0, ADTRG0_MARK), 1417 /* PTD (mobule: SPI0, DMAC) */
1418 PINMUX_GPIO(GPIO_FN_SP0_MOSI, SP0_MOSI_MARK),
1419 PINMUX_GPIO(GPIO_FN_SP0_MISO, SP0_MISO_MARK),
1420 PINMUX_GPIO(GPIO_FN_SP0_SCK, SP0_SCK_MARK),
1421 PINMUX_GPIO(GPIO_FN_SP0_SCK_FB, SP0_SCK_FB_MARK),
1422 PINMUX_GPIO(GPIO_FN_SP0_SS0, SP0_SS0_MARK),
1423 PINMUX_GPIO(GPIO_FN_SP0_SS1, SP0_SS1_MARK),
1424 PINMUX_GPIO(GPIO_FN_SP0_SS2, SP0_SS2_MARK),
1425 PINMUX_GPIO(GPIO_FN_SP0_SS3, SP0_SS3_MARK),
1426 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1427 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
1428 PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
1279 1429
1280 /* PTE (mobule: EtherC) */ 1430 /* PTE (mobule: RMII) */
1281 PINMUX_GPIO(GPIO_FN_ET0_CRS_DV, ET0_CRS_DV_MARK), 1431 PINMUX_GPIO(GPIO_FN_RMII0_CRS_DV, RMII0_CRS_DV_MARK),
1282 PINMUX_GPIO(GPIO_FN_ET0_TXD1, ET0_TXD1_MARK), 1432 PINMUX_GPIO(GPIO_FN_RMII0_TXD1, RMII0_TXD1_MARK),
1283 PINMUX_GPIO(GPIO_FN_ET0_TXD0, ET0_TXD0_MARK), 1433 PINMUX_GPIO(GPIO_FN_RMII0_TXD0, RMII0_TXD0_MARK),
1284 PINMUX_GPIO(GPIO_FN_ET0_TX_EN, ET0_TX_EN_MARK), 1434 PINMUX_GPIO(GPIO_FN_RMII0_TXEN, RMII0_TXEN_MARK),
1285 PINMUX_GPIO(GPIO_FN_ET0_REF_CLK, ET0_REF_CLK_MARK), 1435 PINMUX_GPIO(GPIO_FN_RMII0_REFCLK, RMII0_REFCLK_MARK),
1286 PINMUX_GPIO(GPIO_FN_ET0_RXD1, ET0_RXD1_MARK), 1436 PINMUX_GPIO(GPIO_FN_RMII0_RXD1, RMII0_RXD1_MARK),
1287 PINMUX_GPIO(GPIO_FN_ET0_RXD0, ET0_RXD0_MARK), 1437 PINMUX_GPIO(GPIO_FN_RMII0_RXD0, RMII0_RXD0_MARK),
1288 PINMUX_GPIO(GPIO_FN_ET0_RX_ER, ET0_RX_ER_MARK), 1438 PINMUX_GPIO(GPIO_FN_RMII0_RX_ER, RMII0_RX_ER_MARK),
1289 1439
1290 /* PTF (mobule: EtherC) */ 1440 /* PTF (mobule: RMII, SerMux) */
1291 PINMUX_GPIO(GPIO_FN_ET1_CRS_DV, ET1_CRS_DV_MARK), 1441 PINMUX_GPIO(GPIO_FN_RMII1_CRS_DV, RMII1_CRS_DV_MARK),
1292 PINMUX_GPIO(GPIO_FN_ET1_TXD1, ET1_TXD1_MARK), 1442 PINMUX_GPIO(GPIO_FN_RMII1_TXD1, RMII1_TXD1_MARK),
1293 PINMUX_GPIO(GPIO_FN_ET1_TXD0, ET1_TXD0_MARK), 1443 PINMUX_GPIO(GPIO_FN_RMII1_TXD0, RMII1_TXD0_MARK),
1294 PINMUX_GPIO(GPIO_FN_ET1_TX_EN, ET1_TX_EN_MARK), 1444 PINMUX_GPIO(GPIO_FN_RMII1_TXEN, RMII1_TXEN_MARK),
1295 PINMUX_GPIO(GPIO_FN_ET1_REF_CLK, ET1_REF_CLK_MARK), 1445 PINMUX_GPIO(GPIO_FN_RMII1_REFCLK, RMII1_REFCLK_MARK),
1296 PINMUX_GPIO(GPIO_FN_ET1_RXD1, ET1_RXD1_MARK), 1446 PINMUX_GPIO(GPIO_FN_RMII1_RXD1, RMII1_RXD1_MARK),
1297 PINMUX_GPIO(GPIO_FN_ET1_RXD0, ET1_RXD0_MARK), 1447 PINMUX_GPIO(GPIO_FN_RMII1_RXD0, RMII1_RXD0_MARK),
1298 PINMUX_GPIO(GPIO_FN_ET1_RX_ER, ET1_RX_ER_MARK), 1448 PINMUX_GPIO(GPIO_FN_RMII1_RX_ER, RMII1_RX_ER_MARK),
1299 1449 PINMUX_GPIO(GPIO_FN_RAC_RI, RAC_RI_MARK),
1300 /* PTG (mobule: SYSTEM, PWMX, LPC) */ 1450
1301 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK), 1451 /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */
1302 PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK), 1452 PINMUX_GPIO(GPIO_FN_BOOTFMS, BOOTFMS_MARK),
1303 PINMUX_GPIO(GPIO_FN_PWX0, PWX0_MARK), 1453 PINMUX_GPIO(GPIO_FN_BOOTWP, BOOTWP_MARK),
1304 PINMUX_GPIO(GPIO_FN_PWX1, PWX1_MARK), 1454 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1305 PINMUX_GPIO(GPIO_FN_PWX2, PWX2_MARK), 1455 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1306 PINMUX_GPIO(GPIO_FN_PWX3, PWX3_MARK),
1307 PINMUX_GPIO(GPIO_FN_SERIRQ, SERIRQ_MARK), 1456 PINMUX_GPIO(GPIO_FN_SERIRQ, SERIRQ_MARK),
1308 PINMUX_GPIO(GPIO_FN_CLKRUN, CLKRUN_MARK), 1457 PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
1309 PINMUX_GPIO(GPIO_FN_LPCPD, LPCPD_MARK), 1458 PINMUX_GPIO(GPIO_FN_LPCPD, LPCPD_MARK),
1310 PINMUX_GPIO(GPIO_FN_LDRQ, LDRQ_MARK), 1459 PINMUX_GPIO(GPIO_FN_LDRQ, LDRQ_MARK),
1460 PINMUX_GPIO(GPIO_FN_MMCCLK, MMCCLK_MARK),
1461 PINMUX_GPIO(GPIO_FN_MMCCMD, MMCCMD_MARK),
1311 1462
1312 /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */ 1463 /* PTH (mobule: SPI1, LPC, DMAC, ADC) */
1313 PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
1314 PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
1315 PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
1316 PINMUX_GPIO(GPIO_FN_SP1_MOSI, SP1_MOSI_MARK), 1464 PINMUX_GPIO(GPIO_FN_SP1_MOSI, SP1_MOSI_MARK),
1317 PINMUX_GPIO(GPIO_FN_SP1_MISO, SP1_MISO_MARK), 1465 PINMUX_GPIO(GPIO_FN_SP1_MISO, SP1_MISO_MARK),
1318 PINMUX_GPIO(GPIO_FN_SP1_SCK, SP1_SCK_MARK), 1466 PINMUX_GPIO(GPIO_FN_SP1_SCK, SP1_SCK_MARK),
1319 PINMUX_GPIO(GPIO_FN_SP1_SCK_FB, SP1_SCK_FB_MARK), 1467 PINMUX_GPIO(GPIO_FN_SP1_SCK_FB, SP1_SCK_FB_MARK),
1320 PINMUX_GPIO(GPIO_FN_SP1_SS0, SP1_SS0_MARK), 1468 PINMUX_GPIO(GPIO_FN_SP1_SS0, SP1_SS0_MARK),
1321 PINMUX_GPIO(GPIO_FN_SP1_SS1, SP1_SS1_MARK), 1469 PINMUX_GPIO(GPIO_FN_SP1_SS1, SP1_SS1_MARK),
1322 PINMUX_GPIO(GPIO_FN_SP0_SS1, SP0_SS1_MARK), 1470 PINMUX_GPIO(GPIO_FN_WP, WP_MARK),
1471 PINMUX_GPIO(GPIO_FN_FMS0, FMS0_MARK),
1472 PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
1473 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
1474 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
1475 PINMUX_GPIO(GPIO_FN_ADTRG1, ADTRG1_MARK),
1476 PINMUX_GPIO(GPIO_FN_ADTRG0, ADTRG0_MARK),
1323 1477
1324 /* PTI (mobule: INTC) */ 1478 /* PTI (mobule: LBSC, SDHI) */
1325 PINMUX_GPIO(GPIO_FN_IRQ15, IRQ15_MARK), 1479 PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
1326 PINMUX_GPIO(GPIO_FN_IRQ14, IRQ14_MARK), 1480 PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
1327 PINMUX_GPIO(GPIO_FN_IRQ13, IRQ13_MARK), 1481 PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
1328 PINMUX_GPIO(GPIO_FN_IRQ12, IRQ12_MARK), 1482 PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
1329 PINMUX_GPIO(GPIO_FN_IRQ11, IRQ11_MARK), 1483 PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
1330 PINMUX_GPIO(GPIO_FN_IRQ10, IRQ10_MARK), 1484 PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
1331 PINMUX_GPIO(GPIO_FN_IRQ9, IRQ9_MARK), 1485 PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
1332 PINMUX_GPIO(GPIO_FN_IRQ8, IRQ8_MARK), 1486 PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
1487 PINMUX_GPIO(GPIO_FN_SD_WP, SD_WP_MARK),
1488 PINMUX_GPIO(GPIO_FN_SD_CD, SD_CD_MARK),
1489 PINMUX_GPIO(GPIO_FN_SD_CLK, SD_CLK_MARK),
1490 PINMUX_GPIO(GPIO_FN_SD_CMD, SD_CMD_MARK),
1491 PINMUX_GPIO(GPIO_FN_SD_D3, SD_D3_MARK),
1492 PINMUX_GPIO(GPIO_FN_SD_D2, SD_D2_MARK),
1493 PINMUX_GPIO(GPIO_FN_SD_D1, SD_D1_MARK),
1494 PINMUX_GPIO(GPIO_FN_SD_D0, SD_D0_MARK),
1333 1495
1334 /* PTJ (mobule: SCIF234, SERMUX) */ 1496 /* PTJ (mobule: SCIF234, SERMUX) */
1335 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK), 1497 PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
1498 PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
1336 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK), 1499 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
1337 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK), 1500 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
1338 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK), 1501 PINMUX_GPIO(GPIO_FN_RTS4, RTS4_MARK),
1339 PINMUX_GPIO(GPIO_FN_COM1_TXD, COM1_TXD_MARK), 1502 PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
1340 PINMUX_GPIO(GPIO_FN_COM1_RXD, COM1_RXD_MARK), 1503 PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
1341 PINMUX_GPIO(GPIO_FN_COM1_RTS, COM1_RTS_MARK),
1342 PINMUX_GPIO(GPIO_FN_COM1_CTS, COM1_CTS_MARK),
1343 1504
1344 /* PTK (mobule: SERMUX) */ 1505 /* PTK (mobule: SERMUX, LBSC, SCIF) */
1345 PINMUX_GPIO(GPIO_FN_COM2_TXD, COM2_TXD_MARK), 1506 PINMUX_GPIO(GPIO_FN_COM2_TXD, COM2_TXD_MARK),
1346 PINMUX_GPIO(GPIO_FN_COM2_RXD, COM2_RXD_MARK), 1507 PINMUX_GPIO(GPIO_FN_COM2_RXD, COM2_RXD_MARK),
1347 PINMUX_GPIO(GPIO_FN_COM2_RTS, COM2_RTS_MARK), 1508 PINMUX_GPIO(GPIO_FN_COM2_RTS, COM2_RTS_MARK),
@@ -1349,62 +1510,65 @@ static struct pinmux_gpio pinmux_gpios[] = {
1349 PINMUX_GPIO(GPIO_FN_COM2_DTR, COM2_DTR_MARK), 1510 PINMUX_GPIO(GPIO_FN_COM2_DTR, COM2_DTR_MARK),
1350 PINMUX_GPIO(GPIO_FN_COM2_DSR, COM2_DSR_MARK), 1511 PINMUX_GPIO(GPIO_FN_COM2_DSR, COM2_DSR_MARK),
1351 PINMUX_GPIO(GPIO_FN_COM2_DCD, COM2_DCD_MARK), 1512 PINMUX_GPIO(GPIO_FN_COM2_DCD, COM2_DCD_MARK),
1352 PINMUX_GPIO(GPIO_FN_COM2_RI, COM2_RI_MARK), 1513 PINMUX_GPIO(GPIO_FN_CLKOUT, CLKOUT_MARK),
1514 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
1515 PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK),
1516 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
1353 1517
1354 /* PTL (mobule: SERMUX) */ 1518 /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */
1355 PINMUX_GPIO(GPIO_FN_RAC_TXD, RAC_TXD_MARK),
1356 PINMUX_GPIO(GPIO_FN_RAC_RXD, RAC_RXD_MARK), 1519 PINMUX_GPIO(GPIO_FN_RAC_RXD, RAC_RXD_MARK),
1357 PINMUX_GPIO(GPIO_FN_RAC_RTS, RAC_RTS_MARK), 1520 PINMUX_GPIO(GPIO_FN_RAC_RTS, RAC_RTS_MARK),
1358 PINMUX_GPIO(GPIO_FN_RAC_CTS, RAC_CTS_MARK), 1521 PINMUX_GPIO(GPIO_FN_RAC_CTS, RAC_CTS_MARK),
1359 PINMUX_GPIO(GPIO_FN_RAC_DTR, RAC_DTR_MARK), 1522 PINMUX_GPIO(GPIO_FN_RAC_DTR, RAC_DTR_MARK),
1360 PINMUX_GPIO(GPIO_FN_RAC_DSR, RAC_DSR_MARK), 1523 PINMUX_GPIO(GPIO_FN_RAC_DSR, RAC_DSR_MARK),
1361 PINMUX_GPIO(GPIO_FN_RAC_DCD, RAC_DCD_MARK), 1524 PINMUX_GPIO(GPIO_FN_RAC_DCD, RAC_DCD_MARK),
1362 PINMUX_GPIO(GPIO_FN_RAC_RI, RAC_RI_MARK), 1525 PINMUX_GPIO(GPIO_FN_RAC_TXD, RAC_TXD_MARK),
1526 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
1527 PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK),
1528 PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK),
1529 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
1530 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
1531 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
1363 1532
1364 /* PTM (mobule: IIC, LPC) */ 1533 /* PTM (mobule: LBSC, IIC) */
1534 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
1535 PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
1536 PINMUX_GPIO(GPIO_FN_WE0, WE0_MARK),
1537 PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
1365 PINMUX_GPIO(GPIO_FN_SDA6, SDA6_MARK), 1538 PINMUX_GPIO(GPIO_FN_SDA6, SDA6_MARK),
1366 PINMUX_GPIO(GPIO_FN_SCL6, SCL6_MARK), 1539 PINMUX_GPIO(GPIO_FN_SCL6, SCL6_MARK),
1367 PINMUX_GPIO(GPIO_FN_SDA7, SDA7_MARK), 1540 PINMUX_GPIO(GPIO_FN_SDA7, SDA7_MARK),
1368 PINMUX_GPIO(GPIO_FN_SCL7, SCL7_MARK), 1541 PINMUX_GPIO(GPIO_FN_SCL7, SCL7_MARK),
1369 PINMUX_GPIO(GPIO_FN_WP, WP_MARK),
1370 PINMUX_GPIO(GPIO_FN_FMS0, FMS0_MARK),
1371 PINMUX_GPIO(GPIO_FN_FMS1, FMS1_MARK),
1372 1542
1373 /* PTN (mobule: SCIF234, EVC) */ 1543 /* PTN (mobule: USB, JMC, SGPIO, WDT) */
1374 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK), 1544 PINMUX_GPIO(GPIO_FN_VBUS_EN, VBUS_EN_MARK),
1375 PINMUX_GPIO(GPIO_FN_RTS4, RTS4_MARK), 1545 PINMUX_GPIO(GPIO_FN_VBUS_OC, VBUS_OC_MARK),
1376 PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK), 1546 PINMUX_GPIO(GPIO_FN_JMCTCK, JMCTCK_MARK),
1377 PINMUX_GPIO(GPIO_FN_RTS2, RTS2_MARK), 1547 PINMUX_GPIO(GPIO_FN_JMCTMS, JMCTMS_MARK),
1378 PINMUX_GPIO(GPIO_FN_CTS4, CTS4_MARK), 1548 PINMUX_GPIO(GPIO_FN_JMCTDO, JMCTDO_MARK),
1379 PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK), 1549 PINMUX_GPIO(GPIO_FN_JMCTDI, JMCTDI_MARK),
1380 PINMUX_GPIO(GPIO_FN_CTS2, CTS2_MARK), 1550 PINMUX_GPIO(GPIO_FN_JMCTRST, JMCTRST_MARK),
1381 PINMUX_GPIO(GPIO_FN_EVENT7, EVENT7_MARK), 1551 PINMUX_GPIO(GPIO_FN_SGPIO1_CLK, SGPIO1_CLK_MARK),
1382 PINMUX_GPIO(GPIO_FN_EVENT6, EVENT6_MARK), 1552 PINMUX_GPIO(GPIO_FN_SGPIO1_LOAD, SGPIO1_LOAD_MARK),
1383 PINMUX_GPIO(GPIO_FN_EVENT5, EVENT5_MARK), 1553 PINMUX_GPIO(GPIO_FN_SGPIO1_DI, SGPIO1_DI_MARK),
1384 PINMUX_GPIO(GPIO_FN_EVENT4, EVENT4_MARK), 1554 PINMUX_GPIO(GPIO_FN_SGPIO1_DO, SGPIO1_DO_MARK),
1385 PINMUX_GPIO(GPIO_FN_EVENT3, EVENT3_MARK), 1555 PINMUX_GPIO(GPIO_FN_SUB_CLKIN, SUB_CLKIN_MARK),
1386 PINMUX_GPIO(GPIO_FN_EVENT2, EVENT2_MARK),
1387 PINMUX_GPIO(GPIO_FN_EVENT1, EVENT1_MARK),
1388 PINMUX_GPIO(GPIO_FN_EVENT0, EVENT0_MARK),
1389 1556
1390 /* PTO (mobule: SGPIO) */ 1557 /* PTO (mobule: SGPIO, SerMux) */
1391 PINMUX_GPIO(GPIO_FN_SGPIO0_CLK, SGPIO0_CLK_MARK), 1558 PINMUX_GPIO(GPIO_FN_SGPIO0_CLK, SGPIO0_CLK_MARK),
1392 PINMUX_GPIO(GPIO_FN_SGPIO0_LOAD, SGPIO0_LOAD_MARK), 1559 PINMUX_GPIO(GPIO_FN_SGPIO0_LOAD, SGPIO0_LOAD_MARK),
1393 PINMUX_GPIO(GPIO_FN_SGPIO0_DI, SGPIO0_DI_MARK), 1560 PINMUX_GPIO(GPIO_FN_SGPIO0_DI, SGPIO0_DI_MARK),
1394 PINMUX_GPIO(GPIO_FN_SGPIO0_DO, SGPIO0_DO_MARK), 1561 PINMUX_GPIO(GPIO_FN_SGPIO0_DO, SGPIO0_DO_MARK),
1395 PINMUX_GPIO(GPIO_FN_SGPIO1_CLK, SGPIO1_CLK_MARK), 1562 PINMUX_GPIO(GPIO_FN_SGPIO2_CLK, SGPIO2_CLK_MARK),
1396 PINMUX_GPIO(GPIO_FN_SGPIO1_LOAD, SGPIO1_LOAD_MARK), 1563 PINMUX_GPIO(GPIO_FN_SGPIO2_LOAD, SGPIO2_LOAD_MARK),
1397 PINMUX_GPIO(GPIO_FN_SGPIO1_DI, SGPIO1_DI_MARK), 1564 PINMUX_GPIO(GPIO_FN_SGPIO2_DI, SGPIO2_DI_MARK),
1398 PINMUX_GPIO(GPIO_FN_SGPIO1_DO, SGPIO1_DO_MARK), 1565 PINMUX_GPIO(GPIO_FN_SGPIO2_DO, SGPIO2_DO_MARK),
1566 PINMUX_GPIO(GPIO_FN_COM1_TXD, COM1_TXD_MARK),
1567 PINMUX_GPIO(GPIO_FN_COM1_RXD, COM1_RXD_MARK),
1568 PINMUX_GPIO(GPIO_FN_COM1_RTS, COM1_RTS_MARK),
1569 PINMUX_GPIO(GPIO_FN_COM1_CTS, COM1_CTS_MARK),
1399 1570
1400 /* PTP (mobule: JMC, SCIF234) */ 1571 /* PTP (mobule: EVC, ADC) */
1401 PINMUX_GPIO(GPIO_FN_JMCTCK, JMCTCK_MARK),
1402 PINMUX_GPIO(GPIO_FN_JMCTMS, JMCTMS_MARK),
1403 PINMUX_GPIO(GPIO_FN_JMCTDO, JMCTDO_MARK),
1404 PINMUX_GPIO(GPIO_FN_JMCTDI, JMCTDI_MARK),
1405 PINMUX_GPIO(GPIO_FN_JMCRST, JMCRST_MARK),
1406 PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK),
1407 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
1408 1572
1409 /* PTQ (mobule: LPC) */ 1573 /* PTQ (mobule: LPC) */
1410 PINMUX_GPIO(GPIO_FN_LAD3, LAD3_MARK), 1574 PINMUX_GPIO(GPIO_FN_LAD3, LAD3_MARK),
@@ -1439,31 +1603,41 @@ static struct pinmux_gpio pinmux_gpios[] = {
1439 PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK), 1603 PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK),
1440 PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK), 1604 PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK),
1441 1605
1442 /* PTT (mobule: SYSTEM, PWMX) */ 1606 /* PTT (mobule: PWMX, AUD) */
1443 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK), 1607 PINMUX_GPIO(GPIO_FN_PWMX7, PWMX7_MARK),
1444 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK), 1608 PINMUX_GPIO(GPIO_FN_PWMX6, PWMX6_MARK),
1609 PINMUX_GPIO(GPIO_FN_PWMX5, PWMX5_MARK),
1610 PINMUX_GPIO(GPIO_FN_PWMX4, PWMX4_MARK),
1611 PINMUX_GPIO(GPIO_FN_PWMX3, PWMX3_MARK),
1612 PINMUX_GPIO(GPIO_FN_PWMX2, PWMX2_MARK),
1613 PINMUX_GPIO(GPIO_FN_PWMX1, PWMX1_MARK),
1614 PINMUX_GPIO(GPIO_FN_PWMX0, PWMX0_MARK),
1445 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK), 1615 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
1446 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK), 1616 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
1447 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK), 1617 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
1448 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK), 1618 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
1449 PINMUX_GPIO(GPIO_FN_PWX7, PWX7_MARK), 1619 PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
1450 PINMUX_GPIO(GPIO_FN_PWX6, PWX6_MARK), 1620 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
1451 PINMUX_GPIO(GPIO_FN_PWX5, PWX5_MARK),
1452 PINMUX_GPIO(GPIO_FN_PWX4, PWX4_MARK),
1453
1454 /* PTU (mobule: LBSC, DMAC) */
1455 PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK),
1456 PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK),
1457 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
1458 PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
1459 PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
1460 PINMUX_GPIO(GPIO_FN_WE0, WE0_MARK),
1461 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1462 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1463 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1464 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
1465 1621
1466 /* PTV (mobule: LBSC, DMAC) */ 1622 /* PTU (mobule: LPC, APM) */
1623 PINMUX_GPIO(GPIO_FN_LGPIO7, LGPIO7_MARK),
1624 PINMUX_GPIO(GPIO_FN_LGPIO6, LGPIO6_MARK),
1625 PINMUX_GPIO(GPIO_FN_LGPIO5, LGPIO5_MARK),
1626 PINMUX_GPIO(GPIO_FN_LGPIO4, LGPIO4_MARK),
1627 PINMUX_GPIO(GPIO_FN_LGPIO3, LGPIO3_MARK),
1628 PINMUX_GPIO(GPIO_FN_LGPIO2, LGPIO2_MARK),
1629 PINMUX_GPIO(GPIO_FN_LGPIO1, LGPIO1_MARK),
1630 PINMUX_GPIO(GPIO_FN_LGPIO0, LGPIO0_MARK),
1631 PINMUX_GPIO(GPIO_FN_APMONCTL_O, APMONCTL_O_MARK),
1632 PINMUX_GPIO(GPIO_FN_APMPWBTOUT_O, APMPWBTOUT_O_MARK),
1633 PINMUX_GPIO(GPIO_FN_APMSCI_O, APMSCI_O_MARK),
1634 PINMUX_GPIO(GPIO_FN_APMVDDON, APMVDDON_MARK),
1635 PINMUX_GPIO(GPIO_FN_APMSLPBTN, APMSLPBTN_MARK),
1636 PINMUX_GPIO(GPIO_FN_APMPWRBTN, APMPWRBTN_MARK),
1637 PINMUX_GPIO(GPIO_FN_APMS5N, APMS5N_MARK),
1638 PINMUX_GPIO(GPIO_FN_APMS3N, APMS3N_MARK),
1639
1640 /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */
1467 PINMUX_GPIO(GPIO_FN_A23, A23_MARK), 1641 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1468 PINMUX_GPIO(GPIO_FN_A22, A22_MARK), 1642 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1469 PINMUX_GPIO(GPIO_FN_A21, A21_MARK), 1643 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
@@ -1472,12 +1646,20 @@ static struct pinmux_gpio pinmux_gpios[] = {
1472 PINMUX_GPIO(GPIO_FN_A18, A18_MARK), 1646 PINMUX_GPIO(GPIO_FN_A18, A18_MARK),
1473 PINMUX_GPIO(GPIO_FN_A17, A17_MARK), 1647 PINMUX_GPIO(GPIO_FN_A17, A17_MARK),
1474 PINMUX_GPIO(GPIO_FN_A16, A16_MARK), 1648 PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
1475 PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK), 1649 PINMUX_GPIO(GPIO_FN_COM2_RI, COM2_RI_MARK),
1476 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), 1650 PINMUX_GPIO(GPIO_FN_R_SPI_MOSI, R_SPI_MOSI_MARK),
1477 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), 1651 PINMUX_GPIO(GPIO_FN_R_SPI_MISO, R_SPI_MISO_MARK),
1478 PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK), 1652 PINMUX_GPIO(GPIO_FN_R_SPI_RSPCK, R_SPI_RSPCK_MARK),
1653 PINMUX_GPIO(GPIO_FN_R_SPI_SSL0, R_SPI_SSL0_MARK),
1654 PINMUX_GPIO(GPIO_FN_R_SPI_SSL1, R_SPI_SSL1_MARK),
1655 PINMUX_GPIO(GPIO_FN_EVENT7, EVENT7_MARK),
1656 PINMUX_GPIO(GPIO_FN_EVENT6, EVENT6_MARK),
1657 PINMUX_GPIO(GPIO_FN_VBIOS_DI, VBIOS_DI_MARK),
1658 PINMUX_GPIO(GPIO_FN_VBIOS_DO, VBIOS_DO_MARK),
1659 PINMUX_GPIO(GPIO_FN_VBIOS_CLK, VBIOS_CLK_MARK),
1660 PINMUX_GPIO(GPIO_FN_VBIOS_CS, VBIOS_CS_MARK),
1479 1661
1480 /* PTW (mobule: LBSC) */ 1662 /* PTW (mobule: LBSC, EVC, SCIF) */
1481 PINMUX_GPIO(GPIO_FN_A16, A16_MARK), 1663 PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
1482 PINMUX_GPIO(GPIO_FN_A15, A15_MARK), 1664 PINMUX_GPIO(GPIO_FN_A15, A15_MARK),
1483 PINMUX_GPIO(GPIO_FN_A14, A14_MARK), 1665 PINMUX_GPIO(GPIO_FN_A14, A14_MARK),
@@ -1487,6 +1669,14 @@ static struct pinmux_gpio pinmux_gpios[] = {
1487 PINMUX_GPIO(GPIO_FN_A10, A10_MARK), 1669 PINMUX_GPIO(GPIO_FN_A10, A10_MARK),
1488 PINMUX_GPIO(GPIO_FN_A9, A9_MARK), 1670 PINMUX_GPIO(GPIO_FN_A9, A9_MARK),
1489 PINMUX_GPIO(GPIO_FN_A8, A8_MARK), 1671 PINMUX_GPIO(GPIO_FN_A8, A8_MARK),
1672 PINMUX_GPIO(GPIO_FN_EVENT5, EVENT5_MARK),
1673 PINMUX_GPIO(GPIO_FN_EVENT4, EVENT4_MARK),
1674 PINMUX_GPIO(GPIO_FN_EVENT3, EVENT3_MARK),
1675 PINMUX_GPIO(GPIO_FN_EVENT2, EVENT2_MARK),
1676 PINMUX_GPIO(GPIO_FN_EVENT1, EVENT1_MARK),
1677 PINMUX_GPIO(GPIO_FN_EVENT0, EVENT0_MARK),
1678 PINMUX_GPIO(GPIO_FN_CTS4, CTS4_MARK),
1679 PINMUX_GPIO(GPIO_FN_CTS2, CTS2_MARK),
1490 1680
1491 /* PTX (mobule: LBSC) */ 1681 /* PTX (mobule: LBSC) */
1492 PINMUX_GPIO(GPIO_FN_A7, A7_MARK), 1682 PINMUX_GPIO(GPIO_FN_A7, A7_MARK),
@@ -1497,6 +1687,10 @@ static struct pinmux_gpio pinmux_gpios[] = {
1497 PINMUX_GPIO(GPIO_FN_A2, A2_MARK), 1687 PINMUX_GPIO(GPIO_FN_A2, A2_MARK),
1498 PINMUX_GPIO(GPIO_FN_A1, A1_MARK), 1688 PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
1499 PINMUX_GPIO(GPIO_FN_A0, A0_MARK), 1689 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
1690 PINMUX_GPIO(GPIO_FN_RTS2, RTS2_MARK),
1691 PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK),
1692 PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK),
1693 PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK),
1500 1694
1501 /* PTY (mobule: LBSC) */ 1695 /* PTY (mobule: LBSC) */
1502 PINMUX_GPIO(GPIO_FN_D7, D7_MARK), 1696 PINMUX_GPIO(GPIO_FN_D7, D7_MARK),
@@ -1507,18 +1701,36 @@ static struct pinmux_gpio pinmux_gpios[] = {
1507 PINMUX_GPIO(GPIO_FN_D2, D2_MARK), 1701 PINMUX_GPIO(GPIO_FN_D2, D2_MARK),
1508 PINMUX_GPIO(GPIO_FN_D1, D1_MARK), 1702 PINMUX_GPIO(GPIO_FN_D1, D1_MARK),
1509 PINMUX_GPIO(GPIO_FN_D0, D0_MARK), 1703 PINMUX_GPIO(GPIO_FN_D0, D0_MARK),
1704
1705 /* PTZ (mobule: eMMC, ONFI) */
1706 PINMUX_GPIO(GPIO_FN_MMCDAT7, MMCDAT7_MARK),
1707 PINMUX_GPIO(GPIO_FN_MMCDAT6, MMCDAT6_MARK),
1708 PINMUX_GPIO(GPIO_FN_MMCDAT5, MMCDAT5_MARK),
1709 PINMUX_GPIO(GPIO_FN_MMCDAT4, MMCDAT4_MARK),
1710 PINMUX_GPIO(GPIO_FN_MMCDAT3, MMCDAT3_MARK),
1711 PINMUX_GPIO(GPIO_FN_MMCDAT2, MMCDAT2_MARK),
1712 PINMUX_GPIO(GPIO_FN_MMCDAT1, MMCDAT1_MARK),
1713 PINMUX_GPIO(GPIO_FN_MMCDAT0, MMCDAT0_MARK),
1714 PINMUX_GPIO(GPIO_FN_ON_DQ7, ON_DQ7_MARK),
1715 PINMUX_GPIO(GPIO_FN_ON_DQ6, ON_DQ6_MARK),
1716 PINMUX_GPIO(GPIO_FN_ON_DQ5, ON_DQ5_MARK),
1717 PINMUX_GPIO(GPIO_FN_ON_DQ4, ON_DQ4_MARK),
1718 PINMUX_GPIO(GPIO_FN_ON_DQ3, ON_DQ3_MARK),
1719 PINMUX_GPIO(GPIO_FN_ON_DQ2, ON_DQ2_MARK),
1720 PINMUX_GPIO(GPIO_FN_ON_DQ1, ON_DQ1_MARK),
1721 PINMUX_GPIO(GPIO_FN_ON_DQ0, ON_DQ0_MARK),
1510 }; 1722 };
1511 1723
1512static struct pinmux_cfg_reg pinmux_config_regs[] = { 1724static struct pinmux_cfg_reg pinmux_config_regs[] = {
1513 { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) { 1725 { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) {
1514 PTA7_FN, PTA7_OUT, PTA7_IN, 0, 1726 PTA7_FN, PTA7_OUT, PTA7_IN, PTA7_IN_PU,
1515 PTA6_FN, PTA6_OUT, PTA6_IN, 0, 1727 PTA6_FN, PTA6_OUT, PTA6_IN, PTA6_IN_PU,
1516 PTA5_FN, PTA5_OUT, PTA5_IN, 0, 1728 PTA5_FN, PTA5_OUT, PTA5_IN, PTA5_IN_PU,
1517 PTA4_FN, PTA4_OUT, PTA4_IN, 0, 1729 PTA4_FN, PTA4_OUT, PTA4_IN, PTA4_IN_PU,
1518 PTA3_FN, PTA3_OUT, PTA3_IN, 0, 1730 PTA3_FN, PTA3_OUT, PTA3_IN, PTA3_IN_PU,
1519 PTA2_FN, PTA2_OUT, PTA2_IN, 0, 1731 PTA2_FN, PTA2_OUT, PTA2_IN, PTA2_IN_PU,
1520 PTA1_FN, PTA1_OUT, PTA1_IN, 0, 1732 PTA1_FN, PTA1_OUT, PTA1_IN, PTA1_IN_PU,
1521 PTA0_FN, PTA0_OUT, PTA0_IN, 0 } 1733 PTA0_FN, PTA0_OUT, PTA0_IN, PTA0_IN_PU }
1522 }, 1734 },
1523 { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) { 1735 { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) {
1524 PTB7_FN, PTB7_OUT, PTB7_IN, 0, 1736 PTB7_FN, PTB7_OUT, PTB7_IN, 0,
@@ -1541,125 +1753,126 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1541 PTC0_FN, PTC0_OUT, PTC0_IN, 0 } 1753 PTC0_FN, PTC0_OUT, PTC0_IN, 0 }
1542 }, 1754 },
1543 { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) { 1755 { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) {
1544 PTD7_FN, PTD7_OUT, PTD7_IN, 0, 1756 PTD7_FN, PTD7_OUT, PTD7_IN, PTD7_IN_PU,
1545 PTD6_FN, PTD6_OUT, PTD6_IN, 0, 1757 PTD6_FN, PTD6_OUT, PTD6_IN, PTD6_IN_PU,
1546 PTD5_FN, PTD5_OUT, PTD5_IN, 0, 1758 PTD5_FN, PTD5_OUT, PTD5_IN, PTD5_IN_PU,
1547 PTD4_FN, PTD4_OUT, PTD4_IN, 0, 1759 PTD4_FN, PTD4_OUT, PTD4_IN, PTD4_IN_PU,
1548 PTD3_FN, PTD3_OUT, PTD3_IN, 0, 1760 PTD3_FN, PTD3_OUT, PTD3_IN, PTD3_IN_PU,
1549 PTD2_FN, PTD2_OUT, PTD2_IN, 0, 1761 PTD2_FN, PTD2_OUT, PTD2_IN, PTD2_IN_PU,
1550 PTD1_FN, PTD1_OUT, PTD1_IN, 0, 1762 PTD1_FN, PTD1_OUT, PTD1_IN, PTD1_IN_PU,
1551 PTD0_FN, PTD0_OUT, PTD0_IN, 0 } 1763 PTD0_FN, PTD0_OUT, PTD0_IN, PTD0_IN_PU }
1552 }, 1764 },
1553 { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) { 1765 { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) {
1554 PTE7_FN, PTE7_OUT, PTE7_IN, 0, 1766 PTE7_FN, PTE7_OUT, PTE7_IN, PTE7_IN_PU,
1555 PTE6_FN, PTE6_OUT, PTE6_IN, 0, 1767 PTE6_FN, PTE6_OUT, PTE6_IN, PTE6_IN_PU,
1556 PTE5_FN, PTE5_OUT, PTE5_IN, 0, 1768 PTE5_FN, PTE5_OUT, PTE5_IN, PTE5_IN_PU,
1557 PTE4_FN, PTE4_OUT, PTE4_IN, 0, 1769 PTE4_FN, PTE4_OUT, PTE4_IN, PTE4_IN_PU,
1558 PTE3_FN, PTE3_OUT, PTE3_IN, 0, 1770 PTE3_FN, PTE3_OUT, PTE3_IN, PTE3_IN_PU,
1559 PTE2_FN, PTE2_OUT, PTE2_IN, 0, 1771 PTE2_FN, PTE2_OUT, PTE2_IN, PTE2_IN_PU,
1560 PTE1_FN, PTE1_OUT, PTE1_IN, 0, 1772 PTE1_FN, PTE1_OUT, PTE1_IN, PTE1_IN_PU,
1561 PTE0_FN, PTE0_OUT, PTE0_IN, 0 } 1773 PTE0_FN, PTE0_OUT, PTE0_IN, PTE0_IN_PU }
1562 }, 1774 },
1563 { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) { 1775 { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) {
1564 PTF7_FN, PTF7_OUT, PTF7_IN, 0, 1776 PTF7_FN, PTF7_OUT, PTF7_IN, PTF7_IN_PU,
1565 PTF6_FN, PTF6_OUT, PTF6_IN, 0, 1777 PTF6_FN, PTF6_OUT, PTF6_IN, PTF6_IN_PU,
1566 PTF5_FN, PTF5_OUT, PTF5_IN, 0, 1778 PTF5_FN, PTF5_OUT, PTF5_IN, PTF5_IN_PU,
1567 PTF4_FN, PTF4_OUT, PTF4_IN, 0, 1779 PTF4_FN, PTF4_OUT, PTF4_IN, PTF4_IN_PU,
1568 PTF3_FN, PTF3_OUT, PTF3_IN, 0, 1780 PTF3_FN, PTF3_OUT, PTF3_IN, PTF3_IN_PU,
1569 PTF2_FN, PTF2_OUT, PTF2_IN, 0, 1781 PTF2_FN, PTF2_OUT, PTF2_IN, PTF2_IN_PU,
1570 PTF1_FN, PTF1_OUT, PTF1_IN, 0, 1782 PTF1_FN, PTF1_OUT, PTF1_IN, PTF1_IN_PU,
1571 PTF0_FN, PTF0_OUT, PTF0_IN, 0 } 1783 PTF0_FN, PTF0_OUT, PTF0_IN, PTF0_IN_PU }
1572 }, 1784 },
1573 { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) { 1785 { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) {
1574 PTG7_FN, PTG7_OUT, PTG7_IN, 0, 1786 PTG7_FN, PTG7_OUT, PTG7_IN, PTG7_IN_PU ,
1575 PTG6_FN, PTG6_OUT, PTG6_IN, 0, 1787 PTG6_FN, PTG6_OUT, PTG6_IN, PTG6_IN_PU ,
1576 PTG5_FN, PTG5_OUT, PTG5_IN, 0, 1788 PTG5_FN, PTG5_OUT, PTG5_IN, 0,
1577 PTG4_FN, PTG4_OUT, PTG4_IN, 0, 1789 PTG4_FN, PTG4_OUT, PTG4_IN, PTG4_IN_PU ,
1578 PTG3_FN, PTG3_OUT, PTG3_IN, 0, 1790 PTG3_FN, PTG3_OUT, PTG3_IN, 0,
1579 PTG2_FN, PTG2_OUT, PTG2_IN, 0, 1791 PTG2_FN, PTG2_OUT, PTG2_IN, 0,
1580 PTG1_FN, PTG1_OUT, PTG1_IN, 0, 1792 PTG1_FN, PTG1_OUT, PTG1_IN, 0,
1581 PTG0_FN, PTG0_OUT, PTG0_IN, 0 } 1793 PTG0_FN, PTG0_OUT, PTG0_IN, 0 }
1582 }, 1794 },
1583 { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) { 1795 { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) {
1584 PTH7_FN, PTH7_OUT, PTH7_IN, 0, 1796 PTH7_FN, PTH7_OUT, PTH7_IN, PTH7_IN_PU,
1585 PTH6_FN, PTH6_OUT, PTH6_IN, 0, 1797 PTH6_FN, PTH6_OUT, PTH6_IN, PTH6_IN_PU,
1586 PTH5_FN, PTH5_OUT, PTH5_IN, 0, 1798 PTH5_FN, PTH5_OUT, PTH5_IN, PTH5_IN_PU,
1587 PTH4_FN, PTH4_OUT, PTH4_IN, 0, 1799 PTH4_FN, PTH4_OUT, PTH4_IN, PTH4_IN_PU,
1588 PTH3_FN, PTH3_OUT, PTH3_IN, 0, 1800 PTH3_FN, PTH3_OUT, PTH3_IN, PTH3_IN_PU,
1589 PTH2_FN, PTH2_OUT, PTH2_IN, 0, 1801 PTH2_FN, PTH2_OUT, PTH2_IN, PTH2_IN_PU,
1590 PTH1_FN, PTH1_OUT, PTH1_IN, 0, 1802 PTH1_FN, PTH1_OUT, PTH1_IN, PTH1_IN_PU,
1591 PTH0_FN, PTH0_OUT, PTH0_IN, 0 } 1803 PTH0_FN, PTH0_OUT, PTH0_IN, PTH0_IN_PU }
1592 }, 1804 },
1593 { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) { 1805 { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) {
1594 PTI7_FN, PTI7_OUT, PTI7_IN, 0, 1806 PTI7_FN, PTI7_OUT, PTI7_IN, PTI7_IN_PU,
1595 PTI6_FN, PTI6_OUT, PTI6_IN, 0, 1807 PTI6_FN, PTI6_OUT, PTI6_IN, PTI6_IN_PU,
1596 PTI5_FN, PTI5_OUT, PTI5_IN, 0, 1808 PTI5_FN, PTI5_OUT, PTI5_IN, 0,
1597 PTI4_FN, PTI4_OUT, PTI4_IN, 0, 1809 PTI4_FN, PTI4_OUT, PTI4_IN, PTI4_IN_PU,
1598 PTI3_FN, PTI3_OUT, PTI3_IN, 0, 1810 PTI3_FN, PTI3_OUT, PTI3_IN, PTI3_IN_PU,
1599 PTI2_FN, PTI2_OUT, PTI2_IN, 0, 1811 PTI2_FN, PTI2_OUT, PTI2_IN, PTI2_IN_PU,
1600 PTI1_FN, PTI1_OUT, PTI1_IN, 0, 1812 PTI1_FN, PTI1_OUT, PTI1_IN, PTI1_IN_PU,
1601 PTI0_FN, PTI0_OUT, PTI0_IN, 0 } 1813 PTI0_FN, PTI0_OUT, PTI0_IN, PTI0_IN_PU }
1602 }, 1814 },
1603 { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) { 1815 { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) {
1604 PTJ7_FN, PTJ7_OUT, PTJ7_IN, 0, 1816 0, 0, 0, 0, /* reserved: always set 1 */
1605 PTJ6_FN, PTJ6_OUT, PTJ6_IN, 0, 1817 PTJ6_FN, PTJ6_OUT, PTJ6_IN, PTJ6_IN_PU,
1606 PTJ5_FN, PTJ5_OUT, PTJ5_IN, 0, 1818 PTJ5_FN, PTJ5_OUT, PTJ5_IN, PTJ5_IN_PU,
1607 PTJ4_FN, PTJ4_OUT, PTJ4_IN, 0, 1819 PTJ4_FN, PTJ4_OUT, PTJ4_IN, PTJ4_IN_PU,
1608 PTJ3_FN, PTJ3_OUT, PTJ3_IN, 0, 1820 PTJ3_FN, PTJ3_OUT, PTJ3_IN, PTJ3_IN_PU,
1609 PTJ2_FN, PTJ2_OUT, PTJ2_IN, 0, 1821 PTJ2_FN, PTJ2_OUT, PTJ2_IN, PTJ2_IN_PU,
1610 PTJ1_FN, PTJ1_OUT, PTJ1_IN, 0, 1822 PTJ1_FN, PTJ1_OUT, PTJ1_IN, PTJ1_IN_PU,
1611 PTJ0_FN, PTJ0_OUT, PTJ0_IN, 0 } 1823 PTJ0_FN, PTJ0_OUT, PTJ0_IN, PTJ0_IN_PU }
1612 }, 1824 },
1613 { PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) { 1825 { PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) {
1614 PTK7_FN, PTK7_OUT, PTK7_IN, 0, 1826 PTK7_FN, PTK7_OUT, PTK7_IN, PTK7_IN_PU,
1615 PTK6_FN, PTK6_OUT, PTK6_IN, 0, 1827 PTK6_FN, PTK6_OUT, PTK6_IN, PTK6_IN_PU,
1616 PTK5_FN, PTK5_OUT, PTK5_IN, 0, 1828 PTK5_FN, PTK5_OUT, PTK5_IN, PTK5_IN_PU,
1617 PTK4_FN, PTK4_OUT, PTK4_IN, 0, 1829 PTK4_FN, PTK4_OUT, PTK4_IN, PTK4_IN_PU,
1618 PTK3_FN, PTK3_OUT, PTK3_IN, 0, 1830 PTK3_FN, PTK3_OUT, PTK3_IN, PTK3_IN_PU,
1619 PTK2_FN, PTK2_OUT, PTK2_IN, 0, 1831 PTK2_FN, PTK2_OUT, PTK2_IN, PTK2_IN_PU,
1620 PTK1_FN, PTK1_OUT, PTK1_IN, 0, 1832 PTK1_FN, PTK1_OUT, PTK1_IN, PTK1_IN_PU,
1621 PTK0_FN, PTK0_OUT, PTK0_IN, 0 } 1833 PTK0_FN, PTK0_OUT, PTK0_IN, PTK0_IN_PU }
1622 }, 1834 },
1623 { PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) { 1835 { PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) {
1624 PTL7_FN, PTL7_OUT, PTL7_IN, 0, 1836 0, 0, 0, 0, /* reserved: always set 1 */
1625 PTL6_FN, PTL6_OUT, PTL6_IN, 0, 1837 PTL6_FN, PTL6_OUT, PTL6_IN, PTL6_IN_PU,
1626 PTL5_FN, PTL5_OUT, PTL5_IN, 0, 1838 PTL5_FN, PTL5_OUT, PTL5_IN, PTL5_IN_PU,
1627 PTL4_FN, PTL4_OUT, PTL4_IN, 0, 1839 PTL4_FN, PTL4_OUT, PTL4_IN, PTL4_IN_PU,
1628 PTL3_FN, PTL3_OUT, PTL3_IN, 0, 1840 PTL3_FN, PTL3_OUT, PTL3_IN, PTL3_IN_PU,
1629 PTL2_FN, PTL2_OUT, PTL2_IN, 0, 1841 PTL2_FN, PTL2_OUT, PTL2_IN, PTL2_IN_PU,
1630 PTL1_FN, PTL1_OUT, PTL1_IN, 0, 1842 PTL1_FN, PTL1_OUT, PTL1_IN, PTL1_IN_PU,
1631 PTL0_FN, PTL0_OUT, PTL0_IN, 0 } 1843 PTL0_FN, PTL0_OUT, PTL0_IN, PTL0_IN_PU }
1632 }, 1844 },
1633 { PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) { 1845 { PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) {
1634 0, 0, 0, 0, /* reserved: always set 1 */ 1846 PTM7_FN, PTM7_OUT, PTM7_IN, PTM7_IN_PU,
1635 PTM6_FN, PTM6_OUT, PTM6_IN, 0, 1847 PTM6_FN, PTM6_OUT, PTM6_IN, PTM6_IN_PU,
1636 PTM5_FN, PTM5_OUT, PTM5_IN, 0, 1848 PTM5_FN, PTM5_OUT, PTM5_IN, PTM5_IN_PU,
1637 PTM4_FN, PTM4_OUT, PTM4_IN, 0, 1849 PTM4_FN, PTM4_OUT, PTM4_IN, PTM4_IN_PU,
1638 PTM3_FN, PTM3_OUT, PTM3_IN, 0, 1850 PTM3_FN, PTM3_OUT, PTM3_IN, 0,
1639 PTM2_FN, PTM2_OUT, PTM2_IN, 0, 1851 PTM2_FN, PTM2_OUT, PTM2_IN, 0,
1640 PTM1_FN, PTM1_OUT, PTM1_IN, 0, 1852 PTM1_FN, PTM1_OUT, PTM1_IN, 0,
1641 PTM0_FN, PTM0_OUT, PTM0_IN, 0 } 1853 PTM0_FN, PTM0_OUT, PTM0_IN, 0 }
1642 }, 1854 },
1643 { PINMUX_CFG_REG("PNCR", 0xffec001a, 16, 2) { 1855 { PINMUX_CFG_REG("PNCR", 0xffec001a, 16, 2) {
1644 PTN7_FN, PTN7_OUT, PTN7_IN, 0, 1856 0, 0, 0, 0, /* reserved: always set 1 */
1645 PTN6_FN, PTN6_OUT, PTN6_IN, 0, 1857 PTN6_FN, PTN6_OUT, PTN6_IN, 0,
1646 PTN5_FN, PTN5_OUT, PTN5_IN, 0, 1858 PTN5_FN, PTN5_OUT, PTN5_IN, 0,
1647 PTN4_FN, PTN4_OUT, PTN4_IN, 0, 1859 PTN4_FN, PTN4_OUT, PTN4_IN, PTN4_IN_PU,
1648 PTN3_FN, PTN3_OUT, PTN3_IN, 0, 1860 PTN3_FN, PTN3_OUT, PTN3_IN, PTN3_IN_PU,
1649 PTN2_FN, PTN2_OUT, PTN2_IN, 0, 1861 PTN2_FN, PTN2_OUT, PTN2_IN, PTN2_IN_PU,
1650 PTN1_FN, PTN1_OUT, PTN1_IN, 0, 1862 PTN1_FN, PTN1_OUT, PTN1_IN, PTN1_IN_PU,
1651 PTN0_FN, PTN0_OUT, PTN0_IN, 0 } 1863 PTN0_FN, PTN0_OUT, PTN0_IN, PTN0_IN_PU }
1652 }, 1864 },
1653 { PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) { 1865 { PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) {
1654 PTO7_FN, PTO7_OUT, PTO7_IN, 0, 1866 PTO7_FN, PTO7_OUT, PTO7_IN, PTO7_IN_PU,
1655 PTO6_FN, PTO6_OUT, PTO6_IN, 0, 1867 PTO6_FN, PTO6_OUT, PTO6_IN, PTO6_IN_PU,
1656 PTO5_FN, PTO5_OUT, PTO5_IN, 0, 1868 PTO5_FN, PTO5_OUT, PTO5_IN, PTO5_IN_PU,
1657 PTO4_FN, PTO4_OUT, PTO4_IN, 0, 1869 PTO4_FN, PTO4_OUT, PTO4_IN, PTO4_IN_PU,
1658 PTO3_FN, PTO3_OUT, PTO3_IN, 0, 1870 PTO3_FN, PTO3_OUT, PTO3_IN, PTO3_IN_PU,
1659 PTO2_FN, PTO2_OUT, PTO2_IN, 0, 1871 PTO2_FN, PTO2_OUT, PTO2_IN, PTO2_IN_PU,
1660 PTO1_FN, PTO1_OUT, PTO1_IN, 0, 1872 PTO1_FN, PTO1_OUT, PTO1_IN, PTO1_IN_PU,
1661 PTO0_FN, PTO0_OUT, PTO0_IN, 0 } 1873 PTO0_FN, PTO0_OUT, PTO0_IN, PTO0_IN_PU }
1662 }, 1874 },
1875#if 0 /* FIXME: Remove it? */
1663 { PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) { 1876 { PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) {
1664 0, 0, 0, 0, /* reserved: always set 1 */ 1877 0, 0, 0, 0, /* reserved: always set 1 */
1665 PTP6_FN, PTP6_OUT, PTP6_IN, 0, 1878 PTP6_FN, PTP6_OUT, PTP6_IN, 0,
@@ -1670,6 +1883,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1670 PTP1_FN, PTP1_OUT, PTP1_IN, 0, 1883 PTP1_FN, PTP1_OUT, PTP1_IN, 0,
1671 PTP0_FN, PTP0_OUT, PTP0_IN, 0 } 1884 PTP0_FN, PTP0_OUT, PTP0_IN, 0 }
1672 }, 1885 },
1886#endif
1673 { PINMUX_CFG_REG("PQCR", 0xffec0020, 16, 2) { 1887 { PINMUX_CFG_REG("PQCR", 0xffec0020, 16, 2) {
1674 0, 0, 0, 0, /* reserved: always set 1 */ 1888 0, 0, 0, 0, /* reserved: always set 1 */
1675 PTQ6_FN, PTQ6_OUT, PTQ6_IN, 0, 1889 PTQ6_FN, PTQ6_OUT, PTQ6_IN, 0,
@@ -1701,14 +1915,14 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1701 PTS0_FN, PTS0_OUT, PTS0_IN, 0 } 1915 PTS0_FN, PTS0_OUT, PTS0_IN, 0 }
1702 }, 1916 },
1703 { PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) { 1917 { PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) {
1704 0, 0, 0, 0, /* reserved: always set 1 */ 1918 PTT7_FN, PTT7_OUT, PTT7_IN, PTO7_IN_PU,
1705 0, 0, 0, 0, /* reserved: always set 1 */ 1919 PTT6_FN, PTT6_OUT, PTT6_IN, PTO6_IN_PU,
1706 PTT5_FN, PTT5_OUT, PTT5_IN, 0, 1920 PTT5_FN, PTT5_OUT, PTT5_IN, PTO5_IN_PU,
1707 PTT4_FN, PTT4_OUT, PTT4_IN, 0, 1921 PTT4_FN, PTT4_OUT, PTT4_IN, PTO4_IN_PU,
1708 PTT3_FN, PTT3_OUT, PTT3_IN, 0, 1922 PTT3_FN, PTT3_OUT, PTT3_IN, PTO3_IN_PU,
1709 PTT2_FN, PTT2_OUT, PTT2_IN, 0, 1923 PTT2_FN, PTT2_OUT, PTT2_IN, PTO2_IN_PU,
1710 PTT1_FN, PTT1_OUT, PTT1_IN, 0, 1924 PTT1_FN, PTT1_OUT, PTT1_IN, PTO1_IN_PU,
1711 PTT0_FN, PTT0_OUT, PTT0_IN, 0 } 1925 PTT0_FN, PTT0_OUT, PTT0_IN, PTO0_IN_PU }
1712 }, 1926 },
1713 { PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) { 1927 { PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) {
1714 PTU7_FN, PTU7_OUT, PTU7_IN, PTU7_IN_PU, 1928 PTU7_FN, PTU7_OUT, PTU7_IN, PTU7_IN_PU,
@@ -1727,16 +1941,16 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1727 PTV4_FN, PTV4_OUT, PTV4_IN, PTV4_IN_PU, 1941 PTV4_FN, PTV4_OUT, PTV4_IN, PTV4_IN_PU,
1728 PTV3_FN, PTV3_OUT, PTV3_IN, PTV3_IN_PU, 1942 PTV3_FN, PTV3_OUT, PTV3_IN, PTV3_IN_PU,
1729 PTV2_FN, PTV2_OUT, PTV2_IN, PTV2_IN_PU, 1943 PTV2_FN, PTV2_OUT, PTV2_IN, PTV2_IN_PU,
1730 PTV1_FN, PTV1_OUT, PTV1_IN, PTV1_IN_PU, 1944 PTV1_FN, PTV1_OUT, PTV1_IN, 0,
1731 PTV0_FN, PTV0_OUT, PTV0_IN, PTV0_IN_PU } 1945 PTV0_FN, PTV0_OUT, PTV0_IN, 0 }
1732 }, 1946 },
1733 { PINMUX_CFG_REG("PWCR", 0xffec002c, 16, 2) { 1947 { PINMUX_CFG_REG("PWCR", 0xffec002c, 16, 2) {
1734 PTW7_FN, PTW7_OUT, PTW7_IN, PTW7_IN_PU, 1948 PTW7_FN, PTW7_OUT, PTW7_IN, 0,
1735 PTW6_FN, PTW6_OUT, PTW6_IN, PTW6_IN_PU, 1949 PTW6_FN, PTW6_OUT, PTW6_IN, 0,
1736 PTW5_FN, PTW5_OUT, PTW5_IN, PTW5_IN_PU, 1950 PTW5_FN, PTW5_OUT, PTW5_IN, 0,
1737 PTW4_FN, PTW4_OUT, PTW4_IN, PTW4_IN_PU, 1951 PTW4_FN, PTW4_OUT, PTW4_IN, 0,
1738 PTW3_FN, PTW3_OUT, PTW3_IN, PTW3_IN_PU, 1952 PTW3_FN, PTW3_OUT, PTW3_IN, 0,
1739 PTW2_FN, PTW2_OUT, PTW2_IN, PTW2_IN_PU, 1953 PTW2_FN, PTW2_OUT, PTW2_IN, 0,
1740 PTW1_FN, PTW1_OUT, PTW1_IN, PTW1_IN_PU, 1954 PTW1_FN, PTW1_OUT, PTW1_IN, PTW1_IN_PU,
1741 PTW0_FN, PTW0_OUT, PTW0_IN, PTW0_IN_PU } 1955 PTW0_FN, PTW0_OUT, PTW0_IN, PTW0_IN_PU }
1742 }, 1956 },
@@ -1761,32 +1975,32 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1761 PTY0_FN, PTY0_OUT, PTY0_IN, PTY0_IN_PU } 1975 PTY0_FN, PTY0_OUT, PTY0_IN, PTY0_IN_PU }
1762 }, 1976 },
1763 { PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) { 1977 { PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) {
1764 0, PTZ7_OUT, PTZ7_IN, 0, 1978 PTZ7_FN, PTZ7_OUT, PTZ7_IN, 0,
1765 0, PTZ6_OUT, PTZ6_IN, 0, 1979 PTZ6_FN, PTZ6_OUT, PTZ6_IN, 0,
1766 0, PTZ5_OUT, PTZ5_IN, 0, 1980 PTZ5_FN, PTZ5_OUT, PTZ5_IN, 0,
1767 0, PTZ4_OUT, PTZ4_IN, 0, 1981 PTZ4_FN, PTZ4_OUT, PTZ4_IN, 0,
1768 0, PTZ3_OUT, PTZ3_IN, 0, 1982 PTZ3_FN, PTZ3_OUT, PTZ3_IN, 0,
1769 0, PTZ2_OUT, PTZ2_IN, 0, 1983 PTZ2_FN, PTZ2_OUT, PTZ2_IN, 0,
1770 0, PTZ1_OUT, PTZ1_IN, 0, 1984 PTZ1_FN, PTZ1_OUT, PTZ1_IN, 0,
1771 0, PTZ0_OUT, PTZ0_IN, 0 } 1985 PTZ0_FN, PTZ0_OUT, PTZ0_IN, 0 }
1772 }, 1986 },
1773 1987
1774 { PINMUX_CFG_REG("PSEL0", 0xffec0070, 16, 1) { 1988 { PINMUX_CFG_REG("PSEL0", 0xffec0070, 16, 1) {
1775 PS0_15_FN3, PS0_15_FN1, 1989 PS0_15_FN1, PS0_15_FN2,
1776 PS0_14_FN3, PS0_14_FN1, 1990 PS0_14_FN1, PS0_14_FN2,
1777 PS0_13_FN3, PS0_13_FN1, 1991 PS0_13_FN1, PS0_13_FN2,
1778 PS0_12_FN3, PS0_12_FN1, 1992 PS0_12_FN1, PS0_12_FN2,
1779 0, 0, 1993 PS0_11_FN1, PS0_11_FN2,
1780 0, 0, 1994 PS0_10_FN1, PS0_10_FN2,
1995 PS0_9_FN1, PS0_9_FN2,
1996 PS0_8_FN1, PS0_8_FN2,
1997 PS0_7_FN1, PS0_7_FN2,
1998 PS0_6_FN1, PS0_6_FN2,
1999 PS0_5_FN1, PS0_5_FN2,
2000 PS0_4_FN1, PS0_4_FN2,
2001 PS0_3_FN1, PS0_3_FN2,
2002 PS0_2_FN1, PS0_2_FN2,
1781 0, 0, 2003 0, 0,
1782 0, 0,
1783 PS0_7_FN2, PS0_7_FN1,
1784 PS0_6_FN2, PS0_6_FN1,
1785 PS0_5_FN2, PS0_5_FN1,
1786 PS0_4_FN2, PS0_4_FN1,
1787 PS0_3_FN2, PS0_3_FN1,
1788 PS0_2_FN2, PS0_2_FN1,
1789 PS0_1_FN2, PS0_1_FN1,
1790 0, 0, } 2004 0, 0, }
1791 }, 2005 },
1792 { PINMUX_CFG_REG("PSEL1", 0xffec0072, 16, 1) { 2006 { PINMUX_CFG_REG("PSEL1", 0xffec0072, 16, 1) {
@@ -1795,73 +2009,136 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1795 0, 0, 2009 0, 0,
1796 0, 0, 2010 0, 0,
1797 0, 0, 2011 0, 0,
2012 PS1_10_FN1, PS1_10_FN2,
2013 PS1_9_FN1, PS1_9_FN2,
2014 PS1_8_FN1, PS1_8_FN2,
1798 0, 0, 2015 0, 0,
1799 0, 0, 2016 0, 0,
1800 0, 0, 2017 0, 0,
1801 PS1_7_FN1, PS1_7_FN3,
1802 PS1_6_FN1, PS1_6_FN3,
1803 0, 0,
1804 0, 0,
1805 0, 0, 2018 0, 0,
1806 0, 0, 2019 0, 0,
2020 PS1_2_FN1, PS1_2_FN2,
1807 0, 0, 2021 0, 0,
1808 0, 0, } 2022 0, 0, }
1809 }, 2023 },
1810 { PINMUX_CFG_REG("PSEL2", 0xffec0074, 16, 1) { 2024 { PINMUX_CFG_REG("PSEL2", 0xffec0074, 16, 1) {
1811 0, 0, 2025 0, 0,
1812 0, 0, 2026 0, 0,
1813 PS2_13_FN3, PS2_13_FN1, 2027 PS2_13_FN1, PS2_13_FN2,
1814 PS2_12_FN3, PS2_12_FN1, 2028 PS2_12_FN1, PS2_12_FN2,
1815 0, 0, 2029 0, 0,
1816 0, 0, 2030 0, 0,
1817 0, 0, 2031 0, 0,
1818 0, 0, 2032 0, 0,
2033 PS2_7_FN1, PS2_7_FN2,
2034 PS2_6_FN1, PS2_6_FN2,
2035 PS2_5_FN1, PS2_5_FN2,
2036 PS2_4_FN1, PS2_4_FN2,
1819 0, 0, 2037 0, 0,
2038 PS2_2_FN1, PS2_2_FN2,
1820 0, 0, 2039 0, 0,
2040 0, 0, }
2041 },
2042 { PINMUX_CFG_REG("PSEL3", 0xffec0076, 16, 1) {
2043 PS3_15_FN1, PS3_15_FN2,
2044 PS3_14_FN1, PS3_14_FN2,
2045 PS3_13_FN1, PS3_13_FN2,
2046 PS3_12_FN1, PS3_12_FN2,
2047 PS3_11_FN1, PS3_11_FN2,
2048 PS3_10_FN1, PS3_10_FN2,
2049 PS3_9_FN1, PS3_9_FN2,
2050 PS3_8_FN1, PS3_8_FN2,
2051 PS3_7_FN1, PS3_7_FN2,
1821 0, 0, 2052 0, 0,
1822 0, 0, 2053 0, 0,
1823 0, 0, 2054 0, 0,
1824 0, 0, 2055 0, 0,
1825 PS2_1_FN1, PS2_1_FN2, 2056 PS3_2_FN1, PS3_2_FN2,
1826 PS2_0_FN1, PS2_0_FN2, } 2057 PS3_1_FN1, PS3_1_FN2,
2058 0, 0, }
1827 }, 2059 },
2060
1828 { PINMUX_CFG_REG("PSEL4", 0xffec0078, 16, 1) { 2061 { PINMUX_CFG_REG("PSEL4", 0xffec0078, 16, 1) {
1829 PS4_15_FN2, PS4_15_FN1,
1830 PS4_14_FN2, PS4_14_FN1,
1831 PS4_13_FN2, PS4_13_FN1,
1832 PS4_12_FN2, PS4_12_FN1,
1833 PS4_11_FN2, PS4_11_FN1,
1834 PS4_10_FN2, PS4_10_FN1,
1835 PS4_9_FN2, PS4_9_FN1,
1836 0, 0, 2062 0, 0,
2063 PS4_14_FN1, PS4_14_FN2,
2064 PS4_13_FN1, PS4_13_FN2,
2065 PS4_12_FN1, PS4_12_FN2,
1837 0, 0, 2066 0, 0,
2067 PS4_10_FN1, PS4_10_FN2,
2068 PS4_9_FN1, PS4_9_FN2,
2069 PS4_8_FN1, PS4_8_FN2,
1838 0, 0, 2070 0, 0,
1839 0, 0, 2071 0, 0,
1840 0, 0, 2072 0, 0,
1841 PS4_3_FN2, PS4_3_FN1, 2073 PS4_4_FN1, PS4_4_FN2,
1842 PS4_2_FN2, PS4_2_FN1, 2074 PS4_3_FN1, PS4_3_FN2,
1843 PS4_1_FN2, PS4_1_FN1, 2075 PS4_2_FN1, PS4_2_FN2,
1844 PS4_0_FN2, PS4_0_FN1, } 2076 PS4_1_FN1, PS4_1_FN2,
2077 PS4_0_FN1, PS4_0_FN2, }
1845 }, 2078 },
1846 { PINMUX_CFG_REG("PSEL5", 0xffec007a, 16, 1) { 2079 { PINMUX_CFG_REG("PSEL5", 0xffec007a, 16, 1) {
1847 0, 0, 2080 0, 0,
1848 0, 0, 2081 0, 0,
1849 0, 0, 2082 0, 0,
1850 0, 0, 2083 0, 0,
1851 0, 0, 2084 PS5_11_FN1, PS5_11_FN2,
1852 0, 0, 2085 PS5_10_FN1, PS5_10_FN2,
1853 PS5_9_FN1, PS5_9_FN2, 2086 PS5_9_FN1, PS5_9_FN2,
1854 PS5_8_FN1, PS5_8_FN2, 2087 PS5_8_FN1, PS5_8_FN2,
1855 PS5_7_FN1, PS5_7_FN2, 2088 PS5_7_FN1, PS5_7_FN2,
1856 PS5_6_FN1, PS5_6_FN2, 2089 PS5_6_FN1, PS5_6_FN2,
1857 PS5_5_FN1, PS5_5_FN2, 2090 PS5_5_FN1, PS5_5_FN2,
2091 PS5_4_FN1, PS5_4_FN2,
2092 PS5_3_FN1, PS5_3_FN2,
2093 PS5_2_FN1, PS5_2_FN2,
2094 0, 0,
2095 0, 0, }
2096 },
2097 { PINMUX_CFG_REG("PSEL6", 0xffec007c, 16, 1) {
2098 PS6_15_FN1, PS6_15_FN2,
2099 PS6_14_FN1, PS6_14_FN2,
2100 PS6_13_FN1, PS6_13_FN2,
2101 PS6_12_FN1, PS6_12_FN2,
2102 PS6_11_FN1, PS6_11_FN2,
2103 PS6_10_FN1, PS6_10_FN2,
2104 PS6_9_FN1, PS6_9_FN2,
2105 PS6_8_FN1, PS6_8_FN2,
2106 PS6_7_FN1, PS6_7_FN2,
2107 PS6_6_FN1, PS6_6_FN2,
2108 PS6_5_FN1, PS6_5_FN2,
2109 PS6_4_FN1, PS6_4_FN2,
2110 PS6_3_FN1, PS6_3_FN2,
2111 PS6_2_FN1, PS6_2_FN2,
2112 PS6_1_FN1, PS6_1_FN2,
2113 PS6_0_FN1, PS6_0_FN2, }
2114 },
2115 { PINMUX_CFG_REG("PSEL7", 0xffec0082, 16, 1) {
2116 PS7_15_FN1, PS7_15_FN2,
2117 PS7_14_FN1, PS7_14_FN2,
2118 PS7_13_FN1, PS7_13_FN2,
2119 PS7_12_FN1, PS7_12_FN2,
2120 PS7_11_FN1, PS7_11_FN2,
2121 PS7_10_FN1, PS7_10_FN2,
2122 PS7_9_FN1, PS7_9_FN2,
2123 PS7_8_FN1, PS7_8_FN2,
2124 PS7_7_FN1, PS7_7_FN2,
2125 PS7_6_FN1, PS7_6_FN2,
2126 PS7_5_FN1, PS7_5_FN2,
1858 0, 0, 2127 0, 0,
1859 0, 0, 2128 0, 0,
1860 0, 0, 2129 0, 0,
1861 0, 0, 2130 0, 0,
1862 0, 0, } 2131 0, 0, }
1863 }, 2132 },
1864 { PINMUX_CFG_REG("PSEL6", 0xffec007c, 16, 1) { 2133 { PINMUX_CFG_REG("PSEL8", 0xffec0084, 16, 1) {
2134 PS8_15_FN1, PS8_15_FN2,
2135 PS8_14_FN1, PS8_14_FN2,
2136 PS8_13_FN1, PS8_13_FN2,
2137 PS8_12_FN1, PS8_12_FN2,
2138 PS8_11_FN1, PS8_11_FN2,
2139 PS8_10_FN1, PS8_10_FN2,
2140 PS8_9_FN1, PS8_9_FN2,
2141 PS8_8_FN1, PS8_8_FN2,
1865 0, 0, 2142 0, 0,
1866 0, 0, 2143 0, 0,
1867 0, 0, 2144 0, 0,
@@ -1869,15 +2146,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1869 0, 0, 2146 0, 0,
1870 0, 0, 2147 0, 0,
1871 0, 0, 2148 0, 0,
1872 0, 0, 2149 0, 0, }
1873 PS6_7_FN_AN, PS6_7_FN_EV,
1874 PS6_6_FN_AN, PS6_6_FN_EV,
1875 PS6_5_FN_AN, PS6_5_FN_EV,
1876 PS6_4_FN_AN, PS6_4_FN_EV,
1877 PS6_3_FN_AN, PS6_3_FN_EV,
1878 PS6_2_FN_AN, PS6_2_FN_EV,
1879 PS6_1_FN_AN, PS6_1_FN_EV,
1880 PS6_0_FN_AN, PS6_0_FN_EV, }
1881 }, 2150 },
1882 {} 2151 {}
1883}; 2152};
@@ -1920,7 +2189,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
1920 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA } 2189 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA }
1921 }, 2190 },
1922 { PINMUX_DATA_REG("PJDR", 0xffec0046, 8) { 2191 { PINMUX_DATA_REG("PJDR", 0xffec0046, 8) {
1923 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, 2192 0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
1924 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA } 2193 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
1925 }, 2194 },
1926 { PINMUX_DATA_REG("PKDR", 0xffec0048, 8) { 2195 { PINMUX_DATA_REG("PKDR", 0xffec0048, 8) {
@@ -1928,15 +2197,15 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
1928 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA } 2197 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
1929 }, 2198 },
1930 { PINMUX_DATA_REG("PLDR", 0xffec004a, 8) { 2199 { PINMUX_DATA_REG("PLDR", 0xffec004a, 8) {
1931 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, 2200 0, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1932 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA } 2201 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
1933 }, 2202 },
1934 { PINMUX_DATA_REG("PMDR", 0xffec004c, 8) { 2203 { PINMUX_DATA_REG("PMDR", 0xffec004c, 8) {
1935 0, PTM6_DATA, PTM5_DATA, PTM4_DATA, 2204 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1936 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA } 2205 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
1937 }, 2206 },
1938 { PINMUX_DATA_REG("PNDR", 0xffec004e, 8) { 2207 { PINMUX_DATA_REG("PNDR", 0xffec004e, 8) {
1939 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA, 2208 0, PTN6_DATA, PTN5_DATA, PTN4_DATA,
1940 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA } 2209 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
1941 }, 2210 },
1942 { PINMUX_DATA_REG("PODR", 0xffec0050, 8) { 2211 { PINMUX_DATA_REG("PODR", 0xffec0050, 8) {
@@ -1944,7 +2213,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
1944 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA } 2213 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA }
1945 }, 2214 },
1946 { PINMUX_DATA_REG("PPDR", 0xffec0052, 8) { 2215 { PINMUX_DATA_REG("PPDR", 0xffec0052, 8) {
1947 0, PTP6_DATA, PTP5_DATA, PTP4_DATA, 2216 PTP7_DATA, PTP6_DATA, PTP5_DATA, PTP4_DATA,
1948 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA } 2217 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
1949 }, 2218 },
1950 { PINMUX_DATA_REG("PQDR", 0xffec0054, 8) { 2219 { PINMUX_DATA_REG("PQDR", 0xffec0054, 8) {
@@ -1960,7 +2229,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
1960 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA } 2229 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
1961 }, 2230 },
1962 { PINMUX_DATA_REG("PTDR", 0xffec005a, 8) { 2231 { PINMUX_DATA_REG("PTDR", 0xffec005a, 8) {
1963 0, 0, PTT5_DATA, PTT4_DATA, 2232 PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
1964 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA } 2233 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
1965 }, 2234 },
1966 { PINMUX_DATA_REG("PUDR", 0xffec005c, 8) { 2235 { PINMUX_DATA_REG("PUDR", 0xffec005c, 8) {
@@ -2000,8 +2269,8 @@ static struct pinmux_info sh7757_pinmux_info = {
2000 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, 2269 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2001 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 2270 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2002 2271
2003 .first_gpio = GPIO_PTA7, 2272 .first_gpio = GPIO_PTA0,
2004 .last_gpio = GPIO_FN_D0, 2273 .last_gpio = GPIO_FN_ON_DQ0,
2005 2274
2006 .gpios = pinmux_gpios, 2275 .gpios = pinmux_gpios,
2007 .cfg_regs = pinmux_config_regs, 2276 .cfg_regs = pinmux_config_regs,
@@ -2015,5 +2284,4 @@ static int __init plat_pinmux_setup(void)
2015{ 2284{
2016 return register_pinmux(&sh7757_pinmux_info); 2285 return register_pinmux(&sh7757_pinmux_info);
2017} 2286}
2018
2019arch_initcall(plat_pinmux_setup); 2287arch_initcall(plat_pinmux_setup);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 05:12:26 -0500