diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c | 106 |
1 files changed, 106 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c new file mode 100644 index 000000000000..a288b5d92341 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c | |||
@@ -0,0 +1,106 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c | ||
3 | * | ||
4 | * SH7722 hardware block support | ||
5 | * | ||
6 | * Copyright (C) 2009 Magnus Damm | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/io.h> | ||
24 | #include <asm/suspend.h> | ||
25 | #include <asm/hwblk.h> | ||
26 | #include <cpu/sh7722.h> | ||
27 | |||
28 | /* SH7722 registers */ | ||
29 | #define MSTPCR0 0xa4150030 | ||
30 | #define MSTPCR1 0xa4150034 | ||
31 | #define MSTPCR2 0xa4150038 | ||
32 | |||
33 | /* SH7722 Power Domains */ | ||
34 | enum { CORE_AREA, SUB_AREA, CORE_AREA_BM }; | ||
35 | static struct hwblk_area sh7722_hwblk_area[] = { | ||
36 | [CORE_AREA] = HWBLK_AREA(0, 0), | ||
37 | [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA), | ||
38 | [SUB_AREA] = HWBLK_AREA(0, 0), | ||
39 | }; | ||
40 | |||
41 | /* Table mapping HWBLK to Module Stop Bit and Power Domain */ | ||
42 | static struct hwblk sh7722_hwblk[HWBLK_NR] = { | ||
43 | [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA), | ||
44 | [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA), | ||
45 | [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA), | ||
46 | [HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA), | ||
47 | [HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA), | ||
48 | [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA), | ||
49 | [HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM), | ||
50 | [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA), | ||
51 | [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA), | ||
52 | [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA), | ||
53 | [HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA), | ||
54 | [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA), | ||
55 | [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA), | ||
56 | [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA), | ||
57 | [HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA), | ||
58 | [HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA), | ||
59 | [HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA), | ||
60 | [HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA), | ||
61 | [HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA), | ||
62 | [HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA), | ||
63 | |||
64 | [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA), | ||
65 | [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA), | ||
66 | |||
67 | [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA), | ||
68 | [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA), | ||
69 | [HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA), | ||
70 | [HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA), | ||
71 | [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA), | ||
72 | [HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA), | ||
73 | [HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA), | ||
74 | [HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM), | ||
75 | [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA), | ||
76 | [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM), | ||
77 | [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM), | ||
78 | [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM), | ||
79 | [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM), | ||
80 | [HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM), | ||
81 | [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM), | ||
82 | [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM), | ||
83 | }; | ||
84 | |||
85 | static struct hwblk_info sh7722_hwblk_info = { | ||
86 | .areas = sh7722_hwblk_area, | ||
87 | .nr_areas = ARRAY_SIZE(sh7722_hwblk_area), | ||
88 | .hwblks = sh7722_hwblk, | ||
89 | .nr_hwblks = ARRAY_SIZE(sh7722_hwblk), | ||
90 | }; | ||
91 | |||
92 | int arch_hwblk_sleep_mode(void) | ||
93 | { | ||
94 | if (!sh7722_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE]) | ||
95 | return SUSP_SH_STANDBY | SUSP_SH_SF; | ||
96 | |||
97 | if (!sh7722_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE]) | ||
98 | return SUSP_SH_SLEEP | SUSP_SH_SF; | ||
99 | |||
100 | return SUSP_SH_SLEEP; | ||
101 | } | ||
102 | |||
103 | int __init arch_hwblk_init(void) | ||
104 | { | ||
105 | return hwblk_register(&sh7722_hwblk_info); | ||
106 | } | ||