1 files changed, 20 insertions, 27 deletions

diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index f84a9c134471..a0e8869071ac 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -36,30 +36,30 @@ static struct clk_ops sh7786_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inl(FRQMR1) & 0x000f);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7786_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f);
-        clk->rate = clk->parent->rate / bfc_divisors[idx];
+        return clk->parent->rate / bfc_divisors[idx];
 }
 
 static struct clk_ops sh7786_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003);
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops sh7786_cpu_clk_ops = {
@@ -79,10 +79,10 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
                 *ops = sh7786_clk_ops[idx];
 }
 
-static void shyway_clk_recalc(struct clk *clk)
+static unsigned long shyway_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003);
-        clk->rate = clk->parent->rate / sfc_divisors[idx];
+        return clk->parent->rate / sfc_divisors[idx];
 }
 
 static struct clk_ops sh7786_shyway_clk_ops = {
@@ -91,14 +91,14 @@ static struct clk_ops sh7786_shyway_clk_ops = {
 
 static struct clk sh7786_shyway_clk = {
         .name           = "shyway_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
+        .flags          = CLK_ENABLE_ON_INIT,
         .ops            = &sh7786_shyway_clk_ops,
 };
 
-static void ddr_clk_recalc(struct clk *clk)
+static unsigned long ddr_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003);
-        clk->rate = clk->parent->rate / mfc_divisors[idx];
+        return clk->parent->rate / mfc_divisors[idx];
 }
 
 static struct clk_ops sh7786_ddr_clk_ops = {
@@ -107,7 +107,7 @@ static struct clk_ops sh7786_ddr_clk_ops = {
 
 static struct clk sh7786_ddr_clk = {
         .name           = "ddr_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
+        .flags          = CLK_ENABLE_ON_INIT,
         .ops            = &sh7786_ddr_clk_ops,
 };
 
@@ -120,29 +120,22 @@ static struct clk *sh7786_onchip_clocks[] = {
         &sh7786_ddr_clk,
 };
 
-static int __init sh7786_clk_init(void)
+int __init arch_clk_init(void)
 {
-        struct clk *clk = clk_get(NULL, "master_clk");
-        int i;
+        struct clk *clk;
+        int i, ret = 0;
 
+        cpg_clk_init();
+
+        clk = clk_get(NULL, "master_clk");
         for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) {
                 struct clk *clkp = sh7786_onchip_clocks[i];
 
                 clkp->parent = clk;
-                clk_register(clkp);
-                clk_enable(clkp);
+                ret |= clk_register(clkp);
         }
 
-        /*
-         * Now that we have the rest of the clocks registered, we need to
-         * force the parent clock to propagate so that these clocks will
-         * automatically figure out their rate. We cheat by handing the
-         * parent clock its current rate and forcing child propagation.
-         */
-        clk_set_rate(clk, clk_get_rate(clk));
-
         clk_put(clk);
 
-        return 0;
+        return ret;
 }
-arch_initcall(sh7786_clk_init);