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Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/clock-sh7366.c')
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7366.c18
1 files changed, 15 insertions, 3 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index f99db94cf8fb..4eeeb240823e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -21,6 +21,7 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/clkdev.h>
24#include <asm/clock.h> 25#include <asm/clock.h>
25 26
26/* SH7366 registers */ 27/* SH7366 registers */
@@ -138,8 +139,10 @@ struct clk div4_clks[DIV4_NR] = {
138 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), 139 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0),
139}; 140};
140 141
141struct clk div6_clks[] = { 142enum { DIV6_V, DIV6_NR };
142 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 143
144struct clk div6_clks[DIV6_NR] = {
145 [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
143}; 146};
144 147
145#define MSTP(_str, _parent, _reg, _bit, _flags) \ 148#define MSTP(_str, _parent, _reg, _bit, _flags) \
@@ -189,6 +192,13 @@ static struct clk mstp_clks[] = {
189 MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0), 192 MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0),
190}; 193};
191 194
195#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
196
197static struct clk_lookup lookups[] = {
198 /* DIV6 clocks */
199 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
200};
201
192int __init arch_clk_init(void) 202int __init arch_clk_init(void)
193{ 203{
194 int k, ret = 0; 204 int k, ret = 0;
@@ -202,11 +212,13 @@ int __init arch_clk_init(void)
202 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) 212 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
203 ret = clk_register(main_clks[k]); 213 ret = clk_register(main_clks[k]);
204 214
215 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
216
205 if (!ret) 217 if (!ret)
206 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 218 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
207 219
208 if (!ret) 220 if (!ret)
209 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 221 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
210 222
211 if (!ret) 223 if (!ret)
212 ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); 224 ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));