diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4')
| -rw-r--r-- | arch/sh/kernel/cpu/sh4/setup-sh7780.c | 36 |
1 files changed, 19 insertions, 17 deletions
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7780.c b/arch/sh/kernel/cpu/sh4/setup-sh7780.c index 4a2b9e01b91f..9aeaa2ddaa28 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7780.c | |||
| @@ -79,25 +79,27 @@ static int __init sh7780_devices_setup(void) | |||
| 79 | __initcall(sh7780_devices_setup); | 79 | __initcall(sh7780_devices_setup); |
| 80 | 80 | ||
| 81 | static struct intc2_data intc2_irq_table[] = { | 81 | static struct intc2_data intc2_irq_table[] = { |
| 82 | { 28, 0, 24, 0, INTC_TMU0_MSK, 2 }, | 82 | { 28, 0, 24, 0, 0, 2 }, /* TMU0 */ |
| 83 | { 21, 1, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY }, | ||
| 84 | { 22, 1, 1, 0, INTC_RTC_MSK, TIMER_PRIORITY }, | ||
| 85 | { 23, 1, 2, 0, INTC_RTC_MSK, TIMER_PRIORITY }, | ||
| 86 | { SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, | ||
| 87 | { SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, | ||
| 88 | { SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, | ||
| 89 | { SCIF0_TXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, | ||
| 90 | 83 | ||
| 91 | { SCIF1_ERI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY }, | 84 | { 21, 1, 0, 0, 2, 2 }, |
| 92 | { SCIF1_RXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY }, | 85 | { 22, 1, 1, 0, 2, 2 }, |
| 93 | { SCIF1_BRI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY }, | 86 | { 23, 1, 2, 0, 2, 2 }, |
| 94 | { SCIF1_TXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY }, | ||
| 95 | 87 | ||
| 96 | { PCIC0_IRQ, 0x10, 8, 0, INTC_PCIC0_MSK, PCIC0_PRIORITY }, | 88 | { 40, 8, 24, 0, 3, 3 }, /* SCIF0 ERI */ |
| 97 | { PCIC1_IRQ, 0x10, 0, 0, INTC_PCIC1_MSK, PCIC1_PRIORITY }, | 89 | { 41, 8, 24, 0, 3, 3 }, /* SCIF0 RXI */ |
| 98 | { PCIC2_IRQ, 0x14, 24, 0, INTC_PCIC2_MSK, PCIC2_PRIORITY }, | 90 | { 42, 8, 24, 0, 3, 3 }, /* SCIF0 BRI */ |
| 99 | { PCIC3_IRQ, 0x14, 16, 0, INTC_PCIC3_MSK, PCIC3_PRIORITY }, | 91 | { 43, 8, 24, 0, 3, 3 }, /* SCIF0 TXI */ |
| 100 | { PCIC4_IRQ, 0x14, 8, 0, INTC_PCIC4_MSK, PCIC4_PRIORITY }, | 92 | |
| 93 | { 76, 8, 16, 0, 4, 3 }, /* SCIF1 ERI */ | ||
| 94 | { 77, 8, 16, 0, 4, 3 }, /* SCIF1 RXI */ | ||
| 95 | { 78, 8, 16, 0, 4, 3 }, /* SCIF1 BRI */ | ||
| 96 | { 79, 8, 16, 0, 4, 3 }, /* SCIF1 TXI */ | ||
| 97 | |||
| 98 | { 64, 0x10, 8, 0, 14, 2 }, /* PCIC0 */ | ||
| 99 | { 65, 0x10, 0, 0, 15, 2 }, /* PCIC1 */ | ||
| 100 | { 66, 0x14, 24, 0, 16, 2 }, /* PCIC2 */ | ||
| 101 | { 67, 0x14, 16, 0, 17, 2 }, /* PCIC3 */ | ||
| 102 | { 68, 0x14, 8, 0, 18, 2 }, /* PCIC4 */ | ||
| 101 | }; | 103 | }; |
| 102 | 104 | ||
| 103 | void __init init_IRQ_intc2(void) | 105 | void __init init_IRQ_intc2(void) |