diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4/fpu.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4/fpu.c | 23 |
1 files changed, 9 insertions, 14 deletions
diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c index c5a4fc77fa06..e624180b4467 100644 --- a/arch/sh/kernel/cpu/sh4/fpu.c +++ b/arch/sh/kernel/cpu/sh4/fpu.c | |||
@@ -82,8 +82,8 @@ save_fpu(struct task_struct *tsk, struct pt_regs *regs) | |||
82 | "r" (FPSCR_INIT) | 82 | "r" (FPSCR_INIT) |
83 | : "memory"); | 83 | : "memory"); |
84 | 84 | ||
85 | disable_fpu(); | 85 | disable_fpu(); |
86 | release_fpu(regs); | 86 | release_fpu(regs); |
87 | } | 87 | } |
88 | 88 | ||
89 | static void | 89 | static void |
@@ -91,7 +91,7 @@ restore_fpu(struct task_struct *tsk) | |||
91 | { | 91 | { |
92 | unsigned long dummy; | 92 | unsigned long dummy; |
93 | 93 | ||
94 | enable_fpu(); | 94 | enable_fpu(); |
95 | asm volatile("lds %2, fpscr\n\t" | 95 | asm volatile("lds %2, fpscr\n\t" |
96 | "fmov.s @%0+, fr0\n\t" | 96 | "fmov.s @%0+, fr0\n\t" |
97 | "fmov.s @%0+, fr1\n\t" | 97 | "fmov.s @%0+, fr1\n\t" |
@@ -138,7 +138,7 @@ restore_fpu(struct task_struct *tsk) | |||
138 | /* | 138 | /* |
139 | * Load the FPU with signalling NANS. This bit pattern we're using | 139 | * Load the FPU with signalling NANS. This bit pattern we're using |
140 | * has the property that no matter wether considered as single or as | 140 | * has the property that no matter wether considered as single or as |
141 | * double precision represents signaling NANS. | 141 | * double precision represents signaling NANS. |
142 | */ | 142 | */ |
143 | 143 | ||
144 | static void | 144 | static void |
@@ -184,7 +184,7 @@ fpu_init(void) | |||
184 | "lds %2, fpscr\n\t" | 184 | "lds %2, fpscr\n\t" |
185 | : /* no output */ | 185 | : /* no output */ |
186 | : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT)); | 186 | : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT)); |
187 | disable_fpu(); | 187 | disable_fpu(); |
188 | } | 188 | } |
189 | 189 | ||
190 | /** | 190 | /** |
@@ -238,7 +238,6 @@ ieee_fpe_handler (struct pt_regs *regs) | |||
238 | if (nib[0] == 0xb || | 238 | if (nib[0] == 0xb || |
239 | (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */ | 239 | (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */ |
240 | regs->pr = regs->pc + 4; | 240 | regs->pr = regs->pc + 4; |
241 | |||
242 | if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */ | 241 | if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */ |
243 | nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3); | 242 | nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3); |
244 | finsn = *(unsigned short *) (regs->pc + 2); | 243 | finsn = *(unsigned short *) (regs->pc + 2); |
@@ -293,12 +292,10 @@ ieee_fpe_handler (struct pt_regs *regs) | |||
293 | return 0; | 292 | return 0; |
294 | } | 293 | } |
295 | 294 | ||
296 | asmlinkage void | 295 | BUILD_TRAP_HANDLER(fpu_error) |
297 | do_fpu_error(unsigned long r4, unsigned long r5, unsigned long r6, | ||
298 | unsigned long r7, struct pt_regs __regs) | ||
299 | { | 296 | { |
300 | struct pt_regs *regs = RELOC_HIDE(&__regs, 0); | ||
301 | struct task_struct *tsk = current; | 297 | struct task_struct *tsk = current; |
298 | TRAP_HANDLER_DECL; | ||
302 | 299 | ||
303 | if (ieee_fpe_handler(regs)) | 300 | if (ieee_fpe_handler(regs)) |
304 | return; | 301 | return; |
@@ -308,12 +305,10 @@ do_fpu_error(unsigned long r4, unsigned long r5, unsigned long r6, | |||
308 | force_sig(SIGFPE, tsk); | 305 | force_sig(SIGFPE, tsk); |
309 | } | 306 | } |
310 | 307 | ||
311 | asmlinkage void | 308 | BUILD_TRAP_HANDLER(fpu_state_restore) |
312 | do_fpu_state_restore(unsigned long r4, unsigned long r5, unsigned long r6, | ||
313 | unsigned long r7, struct pt_regs __regs) | ||
314 | { | 309 | { |
315 | struct pt_regs *regs = RELOC_HIDE(&__regs, 0); | ||
316 | struct task_struct *tsk = current; | 310 | struct task_struct *tsk = current; |
311 | TRAP_HANDLER_DECL; | ||
317 | 312 | ||
318 | grab_fpu(regs); | 313 | grab_fpu(regs); |
319 | if (!user_mode(regs)) { | 314 | if (!user_mode(regs)) { |