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Diffstat (limited to 'arch/sh/kernel/cpu/sh3/setup-sh770x.c')
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c224
1 files changed, 224 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
new file mode 100644
index 000000000000..60b04b1f9453
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -0,0 +1,224 @@
1/*
2 * SH3 Setup code for SH7706, SH7707, SH7708, SH7709
3 *
4 * Copyright (C) 2007 Magnus Damm
5 *
6 * Based on setup-sh7709.c
7 *
8 * Copyright (C) 2006 Paul Mundt
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/irq.h>
17#include <linux/platform_device.h>
18#include <linux/serial.h>
19#include <asm/sci.h>
20
21enum {
22 UNUSED = 0,
23
24 /* interrupt sources */
25 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
26 PINT07, PINT815,
27 DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
28 SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
29 SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
30 SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI,
31 ADC_ADI,
32 LCDC, PCC0, PCC1,
33 TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
34 RTC_ATI, RTC_PRI, RTC_CUI,
35 WDT,
36 REF_RCMI, REF_ROVI,
37
38 /* interrupt groups */
39 RTC, REF, TMU2, DMAC, SCI, SCIF2, SCIF0,
40};
41
42static struct intc_vect vectors[] __initdata = {
43 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
44 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
45 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
46 INTC_VECT(RTC_CUI, 0x4c0),
47 INTC_VECT(SCI_ERI, 0x4e0), INTC_VECT(SCI_RXI, 0x500),
48 INTC_VECT(SCI_TXI, 0x520), INTC_VECT(SCI_TEI, 0x540),
49 INTC_VECT(WDT, 0x560),
50 INTC_VECT(REF_RCMI, 0x580),
51 INTC_VECT(REF_ROVI, 0x5a0),
52#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
53 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
54 defined(CONFIG_CPU_SUBTYPE_SH7709)
55 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
56 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
57 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
58 INTC_VECT(ADC_ADI, 0x980),
59 INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920),
60 INTC_VECT(SCIF2_BRI, 0x940), INTC_VECT(SCIF2_TXI, 0x960),
61#endif
62#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
63 defined(CONFIG_CPU_SUBTYPE_SH7709)
64 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
65 INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
66 INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
67#endif
68#if defined(CONFIG_CPU_SUBTYPE_SH7707)
69 INTC_VECT(LCDC, 0x9a0),
70 INTC_VECT(PCC0, 0x9c0), INTC_VECT(PCC1, 0x9e0),
71#endif
72};
73
74static struct intc_group groups[] __initdata = {
75 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
76 INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
77 INTC_GROUP(REF, REF_RCMI, REF_ROVI),
78 INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
79 INTC_GROUP(SCI, SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI),
80 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
81 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
82};
83
84static struct intc_prio priorities[] __initdata = {
85 INTC_PRIO(DMAC, 7),
86 INTC_PRIO(SCI, 3),
87 INTC_PRIO(SCIF2, 3),
88 INTC_PRIO(SCIF0, 3),
89};
90
91static struct intc_prio_reg prio_registers[] __initdata = {
92 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
93 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
94#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
95 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
96 defined(CONFIG_CPU_SUBTYPE_SH7709)
97 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
98 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
99 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, 0, SCIF2, ADC_ADI } },
100#endif
101#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
102 defined(CONFIG_CPU_SUBTYPE_SH7709)
103 { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, } },
104 { 0xa400001a, 0, 16, 4, /* IPRE */ { 0, SCIF0 } },
105#endif
106#if defined(CONFIG_CPU_SUBTYPE_SH7707)
107 { 0xa400001c, 0, 16, 4, /* IPRF */ { 0, LCDC, PCC0, PCC1, } },
108#endif
109};
110
111static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
112 priorities, NULL, prio_registers, NULL);
113
114#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
115 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
116 defined(CONFIG_CPU_SUBTYPE_SH7709)
117static struct intc_vect vectors_irq[] __initdata = {
118 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
119 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
120};
121
122static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
123 priorities, NULL, prio_registers, NULL);
124#endif
125
126static struct resource rtc_resources[] = {
127 [0] = {
128 .start = 0xfffffec0,
129 .end = 0xfffffec0 + 0x1e,
130 .flags = IORESOURCE_IO,
131 },
132 [1] = {
133 .start = 20,
134 .flags = IORESOURCE_IRQ,
135 },
136 [2] = {
137 .start = 21,
138 .flags = IORESOURCE_IRQ,
139 },
140 [3] = {
141 .start = 22,
142 .flags = IORESOURCE_IRQ,
143 },
144};
145
146static struct platform_device rtc_device = {
147 .name = "sh-rtc",
148 .id = -1,
149 .num_resources = ARRAY_SIZE(rtc_resources),
150 .resource = rtc_resources,
151};
152
153static struct plat_sci_port sci_platform_data[] = {
154 {
155 .mapbase = 0xfffffe80,
156 .flags = UPF_BOOT_AUTOCONF,
157 .type = PORT_SCI,
158 .irqs = { 23, 24, 25, 0 },
159 },
160#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
161 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
162 defined(CONFIG_CPU_SUBTYPE_SH7709)
163 {
164 .mapbase = 0xa4000150,
165 .flags = UPF_BOOT_AUTOCONF,
166 .type = PORT_SCIF,
167 .irqs = { 56, 57, 59, 58 },
168 },
169#endif
170#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
171 defined(CONFIG_CPU_SUBTYPE_SH7709)
172 {
173 .mapbase = 0xa4000140,
174 .flags = UPF_BOOT_AUTOCONF,
175 .type = PORT_IRDA,
176 .irqs = { 52, 53, 55, 54 },
177 },
178#endif
179 {
180 .flags = 0,
181 }
182};
183
184static struct platform_device sci_device = {
185 .name = "sh-sci",
186 .id = -1,
187 .dev = {
188 .platform_data = sci_platform_data,
189 },
190};
191
192static struct platform_device *sh770x_devices[] __initdata = {
193 &sci_device,
194 &rtc_device,
195};
196
197static int __init sh770x_devices_setup(void)
198{
199 return platform_add_devices(sh770x_devices,
200 ARRAY_SIZE(sh770x_devices));
201}
202__initcall(sh770x_devices_setup);
203
204#define INTC_ICR1 0xa4000010UL
205#define INTC_ICR1_IRQLVL (1<<14)
206
207void __init plat_irq_setup_pins(int mode)
208{
209 if (mode == IRQ_MODE_IRQ) {
210#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
211 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
212 defined(CONFIG_CPU_SUBTYPE_SH7709)
213 ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
214 register_intc_controller(&intc_desc_irq);
215 return;
216#endif
217 }
218 BUG();
219}
220
221void __init plat_irq_setup(void)
222{
223 register_intc_controller(&intc_desc);
224}
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-17 20:14:04 -0400