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path: root/arch/sh/kernel/cpu/irq/intc2.c
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Diffstat (limited to 'arch/sh/kernel/cpu/irq/intc2.c')
-rw-r--r--arch/sh/kernel/cpu/irq/intc2.c63
1 files changed, 32 insertions, 31 deletions
diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c
index d8e22f4ff0f0..cc5221390e09 100644
--- a/arch/sh/kernel/cpu/irq/intc2.c
+++ b/arch/sh/kernel/cpu/irq/intc2.c
@@ -13,36 +13,31 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <asm/smp.h>
16 17
17#if defined(CONFIG_CPU_SUBTYPE_SH7760) 18static inline struct intc2_desc *get_intc2_desc(unsigned int irq)
18#define INTC2_BASE 0xfe080000 19{
19#define INTC2_INTMSK (INTC2_BASE + 0x40) 20 struct irq_chip *chip = get_irq_chip(irq);
20#define INTC2_INTMSKCLR (INTC2_BASE + 0x60) 21 return (void *)((char *)chip - offsetof(struct intc2_desc, chip));
21#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 22}
22 defined(CONFIG_CPU_SUBTYPE_SH7785)
23#define INTC2_BASE 0xffd40000
24#define INTC2_INTMSK (INTC2_BASE + 0x38)
25#define INTC2_INTMSKCLR (INTC2_BASE + 0x3c)
26#endif
27 23
28static void disable_intc2_irq(unsigned int irq) 24static void disable_intc2_irq(unsigned int irq)
29{ 25{
30 struct intc2_data *p = get_irq_chip_data(irq); 26 struct intc2_data *p = get_irq_chip_data(irq);
31 ctrl_outl(1 << p->msk_shift, INTC2_INTMSK + p->msk_offset); 27 struct intc2_desc *d = get_intc2_desc(irq);
28
29 ctrl_outl(1 << p->msk_shift, d->msk_base + p->msk_offset +
30 (hard_smp_processor_id() * 4));
32} 31}
33 32
34static void enable_intc2_irq(unsigned int irq) 33static void enable_intc2_irq(unsigned int irq)
35{ 34{
36 struct intc2_data *p = get_irq_chip_data(irq); 35 struct intc2_data *p = get_irq_chip_data(irq);
37 ctrl_outl(1 << p->msk_shift, INTC2_INTMSKCLR + p->msk_offset); 36 struct intc2_desc *d = get_intc2_desc(irq);
38}
39 37
40static struct irq_chip intc2_irq_chip = { 38 ctrl_outl(1 << p->msk_shift, d->mskclr_base + p->msk_offset +
41 .name = "INTC2", 39 (hard_smp_processor_id() * 4));
42 .mask = disable_intc2_irq, 40}
43 .unmask = enable_intc2_irq,
44 .mask_ack = disable_intc2_irq,
45};
46 41
47/* 42/*
48 * Setup an INTC2 style interrupt. 43 * Setup an INTC2 style interrupt.
@@ -56,30 +51,36 @@ static struct irq_chip intc2_irq_chip = {
56 * 51 *
57 * in the intc2_data table. 52 * in the intc2_data table.
58 */ 53 */
59void make_intc2_irq(struct intc2_data *table, unsigned int nr_irqs) 54void register_intc2_controller(struct intc2_desc *desc)
60{ 55{
61 int i; 56 int i;
62 57
63 for (i = 0; i < nr_irqs; i++) { 58 desc->chip.mask = disable_intc2_irq;
59 desc->chip.unmask = enable_intc2_irq;
60 desc->chip.mask_ack = disable_intc2_irq;
61
62 for (i = 0; i < desc->nr_irqs; i++) {
64 unsigned long ipr, flags; 63 unsigned long ipr, flags;
65 struct intc2_data *p = table + i; 64 struct intc2_data *p = desc->intc2_data + i;
66 65
67 disable_irq_nosync(p->irq); 66 disable_irq_nosync(p->irq);
68 67
69 /* Set the priority level */ 68 if (desc->prio_base) {
70 local_irq_save(flags); 69 /* Set the priority level */
70 local_irq_save(flags);
71 71
72 ipr = ctrl_inl(INTC2_BASE + p->ipr_offset); 72 ipr = ctrl_inl(desc->prio_base + p->ipr_offset);
73 ipr &= ~(0xf << p->ipr_shift); 73 ipr &= ~(0xf << p->ipr_shift);
74 ipr |= p->priority << p->ipr_shift; 74 ipr |= p->priority << p->ipr_shift;
75 ctrl_outl(ipr, INTC2_BASE + p->ipr_offset); 75 ctrl_outl(ipr, desc->prio_base + p->ipr_offset);
76 76
77 local_irq_restore(flags); 77 local_irq_restore(flags);
78 }
78 79
79 set_irq_chip_and_handler_name(p->irq, &intc2_irq_chip, 80 set_irq_chip_and_handler_name(p->irq, &desc->chip,
80 handle_level_irq, "level"); 81 handle_level_irq, "level");
81 set_irq_chip_data(p->irq, p); 82 set_irq_chip_data(p->irq, p);
82 83
83 enable_intc2_irq(p->irq); 84 disable_intc2_irq(p->irq);
84 } 85 }
85} 86}