diff options
Diffstat (limited to 'arch/sh/kernel/cpu/init.c')
| -rw-r--r-- | arch/sh/kernel/cpu/init.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index 61a07dafcd46..ecf83cd158dc 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c | |||
| @@ -43,9 +43,9 @@ | |||
| 43 | * peripherals (nofpu, nodsp, and so forth). | 43 | * peripherals (nofpu, nodsp, and so forth). |
| 44 | */ | 44 | */ |
| 45 | #define onchip_setup(x) \ | 45 | #define onchip_setup(x) \ |
| 46 | static int x##_disabled __cpuinitdata = !cpu_has_##x; \ | 46 | static int x##_disabled = !cpu_has_##x; \ |
| 47 | \ | 47 | \ |
| 48 | static int __cpuinit x##_setup(char *opts) \ | 48 | static int x##_setup(char *opts) \ |
| 49 | { \ | 49 | { \ |
| 50 | x##_disabled = 1; \ | 50 | x##_disabled = 1; \ |
| 51 | return 1; \ | 51 | return 1; \ |
| @@ -59,7 +59,7 @@ onchip_setup(dsp); | |||
| 59 | #define CPUOPM 0xff2f0000 | 59 | #define CPUOPM 0xff2f0000 |
| 60 | #define CPUOPM_RABD (1 << 5) | 60 | #define CPUOPM_RABD (1 << 5) |
| 61 | 61 | ||
| 62 | static void __cpuinit speculative_execution_init(void) | 62 | static void speculative_execution_init(void) |
| 63 | { | 63 | { |
| 64 | /* Clear RABD */ | 64 | /* Clear RABD */ |
| 65 | __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM); | 65 | __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM); |
| @@ -78,7 +78,7 @@ static void __cpuinit speculative_execution_init(void) | |||
| 78 | #define EXPMASK_BRDSSLP (1 << 1) | 78 | #define EXPMASK_BRDSSLP (1 << 1) |
| 79 | #define EXPMASK_MMCAW (1 << 4) | 79 | #define EXPMASK_MMCAW (1 << 4) |
| 80 | 80 | ||
| 81 | static void __cpuinit expmask_init(void) | 81 | static void expmask_init(void) |
| 82 | { | 82 | { |
| 83 | unsigned long expmask = __raw_readl(EXPMASK); | 83 | unsigned long expmask = __raw_readl(EXPMASK); |
| 84 | 84 | ||
| @@ -217,7 +217,7 @@ static void detect_cache_shape(void) | |||
| 217 | l2_cache_shape = -1; /* No S-cache */ | 217 | l2_cache_shape = -1; /* No S-cache */ |
| 218 | } | 218 | } |
| 219 | 219 | ||
| 220 | static void __cpuinit fpu_init(void) | 220 | static void fpu_init(void) |
| 221 | { | 221 | { |
| 222 | /* Disable the FPU */ | 222 | /* Disable the FPU */ |
| 223 | if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) { | 223 | if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) { |
| @@ -230,7 +230,7 @@ static void __cpuinit fpu_init(void) | |||
| 230 | } | 230 | } |
| 231 | 231 | ||
| 232 | #ifdef CONFIG_SH_DSP | 232 | #ifdef CONFIG_SH_DSP |
| 233 | static void __cpuinit release_dsp(void) | 233 | static void release_dsp(void) |
| 234 | { | 234 | { |
| 235 | unsigned long sr; | 235 | unsigned long sr; |
| 236 | 236 | ||
| @@ -244,7 +244,7 @@ static void __cpuinit release_dsp(void) | |||
| 244 | ); | 244 | ); |
| 245 | } | 245 | } |
| 246 | 246 | ||
| 247 | static void __cpuinit dsp_init(void) | 247 | static void dsp_init(void) |
| 248 | { | 248 | { |
| 249 | unsigned long sr; | 249 | unsigned long sr; |
| 250 | 250 | ||
| @@ -276,7 +276,7 @@ static void __cpuinit dsp_init(void) | |||
| 276 | release_dsp(); | 276 | release_dsp(); |
| 277 | } | 277 | } |
| 278 | #else | 278 | #else |
| 279 | static inline void __cpuinit dsp_init(void) { } | 279 | static inline void dsp_init(void) { } |
| 280 | #endif /* CONFIG_SH_DSP */ | 280 | #endif /* CONFIG_SH_DSP */ |
| 281 | 281 | ||
| 282 | /** | 282 | /** |
| @@ -295,7 +295,7 @@ static inline void __cpuinit dsp_init(void) { } | |||
| 295 | * Each processor family is still responsible for doing its own probing | 295 | * Each processor family is still responsible for doing its own probing |
| 296 | * and cache configuration in cpu_probe(). | 296 | * and cache configuration in cpu_probe(). |
| 297 | */ | 297 | */ |
| 298 | asmlinkage void __cpuinit cpu_init(void) | 298 | asmlinkage void cpu_init(void) |
| 299 | { | 299 | { |
| 300 | current_thread_info()->cpu = hard_smp_processor_id(); | 300 | current_thread_info()->cpu = hard_smp_processor_id(); |
| 301 | 301 | ||
