diff options
Diffstat (limited to 'arch/sh/kernel/cpu/init.c')
-rw-r--r-- | arch/sh/kernel/cpu/init.c | 27 |
1 files changed, 18 insertions, 9 deletions
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index 9172e97dc26a..c217c4bf0085 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <asm/cache.h> | 22 | #include <asm/cache.h> |
23 | #include <asm/io.h> | 23 | #include <asm/io.h> |
24 | #include <asm/ubc.h> | 24 | #include <asm/ubc.h> |
25 | #include <asm/smp.h> | ||
25 | 26 | ||
26 | /* | 27 | /* |
27 | * Generic wrapper for command line arguments to disable on-chip | 28 | * Generic wrapper for command line arguments to disable on-chip |
@@ -143,12 +144,15 @@ static void __init cache_init(void) | |||
143 | flags &= ~CCR_CACHE_EMODE; | 144 | flags &= ~CCR_CACHE_EMODE; |
144 | #endif | 145 | #endif |
145 | 146 | ||
146 | #ifdef CONFIG_SH_WRITETHROUGH | 147 | #if defined(CONFIG_CACHE_WRITETHROUGH) |
147 | /* Turn on Write-through caching */ | 148 | /* Write-through */ |
148 | flags |= CCR_CACHE_WT; | 149 | flags |= CCR_CACHE_WT; |
149 | #else | 150 | #elif defined(CONFIG_CACHE_WRITEBACK) |
150 | /* .. or default to Write-back */ | 151 | /* Write-back */ |
151 | flags |= CCR_CACHE_CB; | 152 | flags |= CCR_CACHE_CB; |
153 | #else | ||
154 | /* Off */ | ||
155 | flags &= ~CCR_CACHE_ENABLE; | ||
152 | #endif | 156 | #endif |
153 | 157 | ||
154 | ctrl_outl(flags, CCR); | 158 | ctrl_outl(flags, CCR); |
@@ -213,8 +217,11 @@ static void __init dsp_init(void) | |||
213 | * Each processor family is still responsible for doing its own probing | 217 | * Each processor family is still responsible for doing its own probing |
214 | * and cache configuration in detect_cpu_and_cache_system(). | 218 | * and cache configuration in detect_cpu_and_cache_system(). |
215 | */ | 219 | */ |
216 | asmlinkage void __init sh_cpu_init(void) | 220 | |
221 | asmlinkage void __cpuinit sh_cpu_init(void) | ||
217 | { | 222 | { |
223 | current_thread_info()->cpu = hard_smp_processor_id(); | ||
224 | |||
218 | /* First, probe the CPU */ | 225 | /* First, probe the CPU */ |
219 | detect_cpu_and_cache_system(); | 226 | detect_cpu_and_cache_system(); |
220 | 227 | ||
@@ -224,9 +231,10 @@ asmlinkage void __init sh_cpu_init(void) | |||
224 | /* Init the cache */ | 231 | /* Init the cache */ |
225 | cache_init(); | 232 | cache_init(); |
226 | 233 | ||
227 | shm_align_mask = max_t(unsigned long, | 234 | if (raw_smp_processor_id() == 0) |
228 | current_cpu_data.dcache.way_size - 1, | 235 | shm_align_mask = max_t(unsigned long, |
229 | PAGE_SIZE - 1); | 236 | current_cpu_data.dcache.way_size - 1, |
237 | PAGE_SIZE - 1); | ||
230 | 238 | ||
231 | /* Disable the FPU */ | 239 | /* Disable the FPU */ |
232 | if (fpu_disabled) { | 240 | if (fpu_disabled) { |
@@ -265,6 +273,7 @@ asmlinkage void __init sh_cpu_init(void) | |||
265 | * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So .. | 273 | * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So .. |
266 | * we wake it up and hope that all is well. | 274 | * we wake it up and hope that all is well. |
267 | */ | 275 | */ |
268 | ubc_wakeup(); | 276 | if (raw_smp_processor_id() == 0) |
277 | ubc_wakeup(); | ||
269 | speculative_execution_init(); | 278 | speculative_execution_init(); |
270 | } | 279 | } |