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-rw-r--r--arch/sh/kernel/cpu/clock.c76
1 files changed, 45 insertions, 31 deletions
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 2075f90d76c7..014f318f5a05 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/sh/kernel/cpu/clock.c - SuperH clock framework 2 * arch/sh/kernel/cpu/clock.c - SuperH clock framework
3 * 3 *
4 * Copyright (C) 2005, 2006 Paul Mundt 4 * Copyright (C) 2005, 2006, 2007 Paul Mundt
5 * 5 *
6 * This clock framework is derived from the OMAP version by: 6 * This clock framework is derived from the OMAP version by:
7 * 7 *
@@ -23,6 +23,7 @@
23#include <linux/seq_file.h> 23#include <linux/seq_file.h>
24#include <linux/err.h> 24#include <linux/err.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/proc_fs.h>
26#include <asm/clock.h> 27#include <asm/clock.h>
27#include <asm/timer.h> 28#include <asm/timer.h>
28 29
@@ -108,6 +109,7 @@ int __clk_enable(struct clk *clk)
108 109
109 return 0; 110 return 0;
110} 111}
112EXPORT_SYMBOL_GPL(__clk_enable);
111 113
112int clk_enable(struct clk *clk) 114int clk_enable(struct clk *clk)
113{ 115{
@@ -120,6 +122,7 @@ int clk_enable(struct clk *clk)
120 122
121 return ret; 123 return ret;
122} 124}
125EXPORT_SYMBOL_GPL(clk_enable);
123 126
124static void clk_kref_release(struct kref *kref) 127static void clk_kref_release(struct kref *kref)
125{ 128{
@@ -138,6 +141,7 @@ void __clk_disable(struct clk *clk)
138 clk->ops->disable(clk); 141 clk->ops->disable(clk);
139 } 142 }
140} 143}
144EXPORT_SYMBOL_GPL(__clk_disable);
141 145
142void clk_disable(struct clk *clk) 146void clk_disable(struct clk *clk)
143{ 147{
@@ -147,6 +151,7 @@ void clk_disable(struct clk *clk)
147 __clk_disable(clk); 151 __clk_disable(clk);
148 spin_unlock_irqrestore(&clock_lock, flags); 152 spin_unlock_irqrestore(&clock_lock, flags);
149} 153}
154EXPORT_SYMBOL_GPL(clk_disable);
150 155
151int clk_register(struct clk *clk) 156int clk_register(struct clk *clk)
152{ 157{
@@ -168,6 +173,7 @@ int clk_register(struct clk *clk)
168 173
169 return 0; 174 return 0;
170} 175}
176EXPORT_SYMBOL_GPL(clk_register);
171 177
172void clk_unregister(struct clk *clk) 178void clk_unregister(struct clk *clk)
173{ 179{
@@ -175,16 +181,19 @@ void clk_unregister(struct clk *clk)
175 list_del(&clk->node); 181 list_del(&clk->node);
176 mutex_unlock(&clock_list_sem); 182 mutex_unlock(&clock_list_sem);
177} 183}
184EXPORT_SYMBOL_GPL(clk_unregister);
178 185
179inline unsigned long clk_get_rate(struct clk *clk) 186unsigned long clk_get_rate(struct clk *clk)
180{ 187{
181 return clk->rate; 188 return clk->rate;
182} 189}
190EXPORT_SYMBOL_GPL(clk_get_rate);
183 191
184int clk_set_rate(struct clk *clk, unsigned long rate) 192int clk_set_rate(struct clk *clk, unsigned long rate)
185{ 193{
186 return clk_set_rate_ex(clk, rate, 0); 194 return clk_set_rate_ex(clk, rate, 0);
187} 195}
196EXPORT_SYMBOL_GPL(clk_set_rate);
188 197
189int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id) 198int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
190{ 199{
@@ -203,6 +212,7 @@ int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
203 212
204 return ret; 213 return ret;
205} 214}
215EXPORT_SYMBOL_GPL(clk_set_rate_ex);
206 216
207void clk_recalc_rate(struct clk *clk) 217void clk_recalc_rate(struct clk *clk)
208{ 218{
@@ -217,6 +227,7 @@ void clk_recalc_rate(struct clk *clk)
217 if (unlikely(clk->flags & CLK_RATE_PROPAGATES)) 227 if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
218 propagate_rate(clk); 228 propagate_rate(clk);
219} 229}
230EXPORT_SYMBOL_GPL(clk_recalc_rate);
220 231
221/* 232/*
222 * Returns a clock. Note that we first try to use device id on the bus 233 * Returns a clock. Note that we first try to use device id on the bus
@@ -253,18 +264,43 @@ found:
253 264
254 return clk; 265 return clk;
255} 266}
267EXPORT_SYMBOL_GPL(clk_get);
256 268
257void clk_put(struct clk *clk) 269void clk_put(struct clk *clk)
258{ 270{
259 if (clk && !IS_ERR(clk)) 271 if (clk && !IS_ERR(clk))
260 module_put(clk->owner); 272 module_put(clk->owner);
261} 273}
274EXPORT_SYMBOL_GPL(clk_put);
262 275
263void __init __attribute__ ((weak)) 276void __init __attribute__ ((weak))
264arch_init_clk_ops(struct clk_ops **ops, int type) 277arch_init_clk_ops(struct clk_ops **ops, int type)
265{ 278{
266} 279}
267 280
281static int show_clocks(char *buf, char **start, off_t off,
282 int len, int *eof, void *data)
283{
284 struct clk *clk;
285 char *p = buf;
286
287 list_for_each_entry_reverse(clk, &clock_list, node) {
288 unsigned long rate = clk_get_rate(clk);
289
290 /*
291 * Don't bother listing dummy clocks with no ancestry
292 * that only support enable and disable ops.
293 */
294 if (unlikely(!rate && !clk->parent))
295 continue;
296
297 p += sprintf(p, "%-12s\t: %ld.%02ldMHz\n", clk->name,
298 rate / 1000000, (rate % 1000000) / 10000);
299 }
300
301 return p - buf;
302}
303
268int __init clk_init(void) 304int __init clk_init(void)
269{ 305{
270 int i, ret = 0; 306 int i, ret = 0;
@@ -285,36 +321,14 @@ int __init clk_init(void)
285 return ret; 321 return ret;
286} 322}
287 323
288int show_clocks(struct seq_file *m) 324static int __init clk_proc_init(void)
289{ 325{
290 struct clk *clk; 326 struct proc_dir_entry *p;
291 327 p = create_proc_read_entry("clocks", S_IRUSR, NULL,
292 list_for_each_entry_reverse(clk, &clock_list, node) { 328 show_clocks, NULL);
293 unsigned long rate = clk_get_rate(clk); 329 if (unlikely(!p))
294 330 return -EINVAL;
295 /*
296 * Don't bother listing dummy clocks with no ancestry
297 * that only support enable and disable ops.
298 */
299 if (unlikely(!rate && !clk->parent))
300 continue;
301
302 seq_printf(m, "%-12s\t: %ld.%02ldMHz\n", clk->name,
303 rate / 1000000, (rate % 1000000) / 10000);
304 }
305 331
306 return 0; 332 return 0;
307} 333}
308 334subsys_initcall(clk_proc_init);
309EXPORT_SYMBOL_GPL(clk_register);
310EXPORT_SYMBOL_GPL(clk_unregister);
311EXPORT_SYMBOL_GPL(clk_get);
312EXPORT_SYMBOL_GPL(clk_put);
313EXPORT_SYMBOL_GPL(clk_enable);
314EXPORT_SYMBOL_GPL(clk_disable);
315EXPORT_SYMBOL_GPL(__clk_enable);
316EXPORT_SYMBOL_GPL(__clk_disable);
317EXPORT_SYMBOL_GPL(clk_get_rate);
318EXPORT_SYMBOL_GPL(clk_set_rate);
319EXPORT_SYMBOL_GPL(clk_recalc_rate);
320EXPORT_SYMBOL_GPL(clk_set_rate_ex);