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-rw-r--r--arch/sh/include/asm/cacheflush.h2
-rw-r--r--arch/sh/include/asm/clkdev.h38
-rw-r--r--arch/sh/include/asm/io.h345
-rw-r--r--arch/sh/include/asm/io_generic.h25
-rw-r--r--arch/sh/include/asm/ioctls.h1
-rw-r--r--arch/sh/include/asm/machvec.h21
-rw-r--r--arch/sh/include/asm/processor_32.h7
-rw-r--r--arch/sh/include/asm/ptrace.h4
-rw-r--r--arch/sh/include/asm/ptrace_32.h2
-rw-r--r--arch/sh/include/asm/ptrace_64.h2
-rw-r--r--arch/sh/include/asm/unaligned-sh4a.h164
-rw-r--r--arch/sh/include/asm/unistd_32.h3
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sh7724.h3
-rw-r--r--arch/sh/include/mach-common/mach/romimage.h2
-rw-r--r--arch/sh/include/mach-ecovec24/mach/romimage.h2
-rw-r--r--arch/sh/include/mach-kfr2r09/mach/romimage.h2
-rw-r--r--arch/sh/include/mach-sdk7786/mach/fpga.h8
17 files changed, 276 insertions, 355 deletions
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h
index 1f4e562c5e8c..82e1eabeac98 100644
--- a/arch/sh/include/asm/cacheflush.h
+++ b/arch/sh/include/asm/cacheflush.h
@@ -96,7 +96,7 @@ void kmap_coherent_init(void);
96void *kmap_coherent(struct page *page, unsigned long addr); 96void *kmap_coherent(struct page *page, unsigned long addr);
97void kunmap_coherent(void *kvaddr); 97void kunmap_coherent(void *kvaddr);
98 98
99#define PG_dcache_dirty PG_arch_1 99#define PG_dcache_clean PG_arch_1
100 100
101void cpu_cache_init(void); 101void cpu_cache_init(void);
102 102
diff --git a/arch/sh/include/asm/clkdev.h b/arch/sh/include/asm/clkdev.h
index 5645f358128b..6ba91868201c 100644
--- a/arch/sh/include/asm/clkdev.h
+++ b/arch/sh/include/asm/clkdev.h
@@ -1,9 +1,5 @@
1/* 1/*
2 * arch/sh/include/asm/clkdev.h 2 * Copyright (C) 2010 Paul Mundt <lethal@linux-sh.org>
3 *
4 * Cloned from arch/arm/include/asm/clkdev.h:
5 *
6 * Copyright (C) 2008 Russell King.
7 * 3 *
8 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
@@ -11,25 +7,25 @@
11 * 7 *
12 * Helper for the clk API to assist looking up a struct clk. 8 * Helper for the clk API to assist looking up a struct clk.
13 */ 9 */
14#ifndef __ASM_CLKDEV_H
15#define __ASM_CLKDEV_H
16 10
17struct clk; 11#ifndef __CLKDEV__H_
12#define __CLKDEV__H_
18 13
19struct clk_lookup { 14#include <linux/bootmem.h>
20 struct list_head node; 15#include <linux/mm.h>
21 const char *dev_id; 16#include <linux/slab.h>
22 const char *con_id;
23 struct clk *clk;
24};
25 17
26struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id, 18#include <asm/clock.h>
27 const char *dev_fmt, ...);
28 19
29void clkdev_add(struct clk_lookup *cl); 20static inline struct clk_lookup_alloc *__clkdev_alloc(size_t size)
30void clkdev_drop(struct clk_lookup *cl); 21{
22 if (!slab_is_available())
23 return alloc_bootmem_low_pages(size);
24 else
25 return kzalloc(size, GFP_KERNEL);
26}
31 27
32void clkdev_add_table(struct clk_lookup *, size_t); 28#define __clk_put(clk)
33int clk_add_alias(const char *, const char *, char *, struct device *); 29#define __clk_get(clk) ({ 1; })
34 30
35#endif 31#endif /* __CLKDEV_H__ */
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index b237d525d592..89ab2c57a4c2 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -1,5 +1,6 @@
1#ifndef __ASM_SH_IO_H 1#ifndef __ASM_SH_IO_H
2#define __ASM_SH_IO_H 2#define __ASM_SH_IO_H
3
3/* 4/*
4 * Convention: 5 * Convention:
5 * read{b,w,l,q}/write{b,w,l,q} are for PCI, 6 * read{b,w,l,q}/write{b,w,l,q} are for PCI,
@@ -15,12 +16,6 @@
15 * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice 16 * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice
16 * these have the same semantics as the __raw variants, and as such, all 17 * these have the same semantics as the __raw variants, and as such, all
17 * new code should be using the __raw versions. 18 * new code should be using the __raw versions.
18 *
19 * All ISA I/O routines are wrapped through the machine vector. If a
20 * board does not provide overrides, a generic set that are copied in
21 * from the default machine vector are used instead. These are largely
22 * for old compat code for I/O offseting to SuperIOs, all of which are
23 * better handled through the machvec ioport mapping routines these days.
24 */ 19 */
25#include <linux/errno.h> 20#include <linux/errno.h>
26#include <asm/cache.h> 21#include <asm/cache.h>
@@ -31,39 +26,10 @@
31#include <asm-generic/iomap.h> 26#include <asm-generic/iomap.h>
32 27
33#ifdef __KERNEL__ 28#ifdef __KERNEL__
34/* 29#define __IO_PREFIX generic
35 * Depending on which platform we are running on, we need different
36 * I/O functions.
37 */
38#define __IO_PREFIX generic
39#include <asm/io_generic.h> 30#include <asm/io_generic.h>
40#include <asm/io_trapped.h> 31#include <asm/io_trapped.h>
41 32
42#ifdef CONFIG_HAS_IOPORT
43
44#define inb(p) sh_mv.mv_inb((p))
45#define inw(p) sh_mv.mv_inw((p))
46#define inl(p) sh_mv.mv_inl((p))
47#define outb(x,p) sh_mv.mv_outb((x),(p))
48#define outw(x,p) sh_mv.mv_outw((x),(p))
49#define outl(x,p) sh_mv.mv_outl((x),(p))
50
51#define inb_p(p) sh_mv.mv_inb_p((p))
52#define inw_p(p) sh_mv.mv_inw_p((p))
53#define inl_p(p) sh_mv.mv_inl_p((p))
54#define outb_p(x,p) sh_mv.mv_outb_p((x),(p))
55#define outw_p(x,p) sh_mv.mv_outw_p((x),(p))
56#define outl_p(x,p) sh_mv.mv_outl_p((x),(p))
57
58#define insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
59#define insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
60#define insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
61#define outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
62#define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
63#define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
64
65#endif
66
67#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v)) 33#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v))
68#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v)) 34#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
69#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v)) 35#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
@@ -74,68 +40,39 @@
74#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a)) 40#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a))
75#define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a)) 41#define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a))
76 42
77#define readb(a) ({ u8 r_ = __raw_readb(a); mb(); r_; }) 43#define readb_relaxed(c) ({ u8 __v = __raw_readb(c); __v; })
78#define readw(a) ({ u16 r_ = __raw_readw(a); mb(); r_; }) 44#define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \
79#define readl(a) ({ u32 r_ = __raw_readl(a); mb(); r_; }) 45 __raw_readw(c)); __v; })
80#define readq(a) ({ u64 r_ = __raw_readq(a); mb(); r_; }) 46#define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \
81 47 __raw_readl(c)); __v; })
82#define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); }) 48#define readq_relaxed(c) ({ u64 __v = le64_to_cpu((__force __le64) \
83#define writew(v,a) ({ __raw_writew((v),(a)); mb(); }) 49 __raw_readq(c)); __v; })
84#define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) 50
85#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); }) 51#define writeb_relaxed(v,c) ((void)__raw_writeb(v,c))
86 52#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \
87/* 53 cpu_to_le16(v),c))
88 * Legacy SuperH on-chip I/O functions 54#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \
89 * 55 cpu_to_le32(v),c))
90 * These are all deprecated, all new (and especially cross-platform) code 56#define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64) \
91 * should be using the __raw_xxx() routines directly. 57 cpu_to_le64(v),c))
92 */ 58
93static inline u8 __deprecated ctrl_inb(unsigned long addr) 59#define readb(a) ({ u8 r_ = readb_relaxed(a); rmb(); r_; })
94{ 60#define readw(a) ({ u16 r_ = readw_relaxed(a); rmb(); r_; })
95 return __raw_readb(addr); 61#define readl(a) ({ u32 r_ = readl_relaxed(a); rmb(); r_; })
96} 62#define readq(a) ({ u64 r_ = readq_relaxed(a); rmb(); r_; })
97 63
98static inline u16 __deprecated ctrl_inw(unsigned long addr) 64#define writeb(v,a) ({ wmb(); writeb_relaxed((v),(a)); })
99{ 65#define writew(v,a) ({ wmb(); writew_relaxed((v),(a)); })
100 return __raw_readw(addr); 66#define writel(v,a) ({ wmb(); writel_relaxed((v),(a)); })
101} 67#define writeq(v,a) ({ wmb(); writeq_relaxed((v),(a)); })
102 68
103static inline u32 __deprecated ctrl_inl(unsigned long addr) 69#define readsb(p,d,l) __raw_readsb(p,d,l)
104{ 70#define readsw(p,d,l) __raw_readsw(p,d,l)
105 return __raw_readl(addr); 71#define readsl(p,d,l) __raw_readsl(p,d,l)
106} 72
107 73#define writesb(p,d,l) __raw_writesb(p,d,l)
108static inline u64 __deprecated ctrl_inq(unsigned long addr) 74#define writesw(p,d,l) __raw_writesw(p,d,l)
109{ 75#define writesl(p,d,l) __raw_writesl(p,d,l)
110 return __raw_readq(addr);
111}
112
113static inline void __deprecated ctrl_outb(u8 v, unsigned long addr)
114{
115 __raw_writeb(v, addr);
116}
117
118static inline void __deprecated ctrl_outw(u16 v, unsigned long addr)
119{
120 __raw_writew(v, addr);
121}
122
123static inline void __deprecated ctrl_outl(u32 v, unsigned long addr)
124{
125 __raw_writel(v, addr);
126}
127
128static inline void __deprecated ctrl_outq(u64 v, unsigned long addr)
129{
130 __raw_writeq(v, addr);
131}
132
133extern unsigned long generic_io_base;
134
135static inline void ctrl_delay(void)
136{
137 __raw_readw(generic_io_base);
138}
139 76
140#define __BUILD_UNCACHED_IO(bwlq, type) \ 77#define __BUILD_UNCACHED_IO(bwlq, type) \
141static inline type read##bwlq##_uncached(unsigned long addr) \ 78static inline type read##bwlq##_uncached(unsigned long addr) \
@@ -159,10 +96,11 @@ __BUILD_UNCACHED_IO(w, u16)
159__BUILD_UNCACHED_IO(l, u32) 96__BUILD_UNCACHED_IO(l, u32)
160__BUILD_UNCACHED_IO(q, u64) 97__BUILD_UNCACHED_IO(q, u64)
161 98
162#define __BUILD_MEMORY_STRING(bwlq, type) \ 99#define __BUILD_MEMORY_STRING(pfx, bwlq, type) \
163 \ 100 \
164static inline void __raw_writes##bwlq(volatile void __iomem *mem, \ 101static inline void \
165 const void *addr, unsigned int count) \ 102pfx##writes##bwlq(volatile void __iomem *mem, const void *addr, \
103 unsigned int count) \
166{ \ 104{ \
167 const volatile type *__addr = addr; \ 105 const volatile type *__addr = addr; \
168 \ 106 \
@@ -172,8 +110,8 @@ static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
172 } \ 110 } \
173} \ 111} \
174 \ 112 \
175static inline void __raw_reads##bwlq(volatile void __iomem *mem, \ 113static inline void pfx##reads##bwlq(volatile void __iomem *mem, \
176 void *addr, unsigned int count) \ 114 void *addr, unsigned int count) \
177{ \ 115{ \
178 volatile type *__addr = addr; \ 116 volatile type *__addr = addr; \
179 \ 117 \
@@ -183,85 +121,166 @@ static inline void __raw_reads##bwlq(volatile void __iomem *mem, \
183 } \ 121 } \
184} 122}
185 123
186__BUILD_MEMORY_STRING(b, u8) 124__BUILD_MEMORY_STRING(__raw_, b, u8)
187__BUILD_MEMORY_STRING(w, u16) 125__BUILD_MEMORY_STRING(__raw_, w, u16)
188 126
189#ifdef CONFIG_SUPERH32 127#ifdef CONFIG_SUPERH32
190void __raw_writesl(void __iomem *addr, const void *data, int longlen); 128void __raw_writesl(void __iomem *addr, const void *data, int longlen);
191void __raw_readsl(const void __iomem *addr, void *data, int longlen); 129void __raw_readsl(const void __iomem *addr, void *data, int longlen);
192#else 130#else
193__BUILD_MEMORY_STRING(l, u32) 131__BUILD_MEMORY_STRING(__raw_, l, u32)
194#endif 132#endif
195 133
196__BUILD_MEMORY_STRING(q, u64) 134__BUILD_MEMORY_STRING(__raw_, q, u64)
197 135
198#define writesb __raw_writesb 136#ifdef CONFIG_HAS_IOPORT
199#define writesw __raw_writesw 137
200#define writesl __raw_writesl 138/*
201 139 * Slowdown I/O port space accesses for antique hardware.
202#define readsb __raw_readsb 140 */
203#define readsw __raw_readsw 141#undef CONF_SLOWDOWN_IO
204#define readsl __raw_readsl 142
205 143/*
206#define readb_relaxed(a) readb(a) 144 * On SuperH I/O ports are memory mapped, so we access them using normal
207#define readw_relaxed(a) readw(a) 145 * load/store instructions. sh_io_port_base is the virtual address to
208#define readl_relaxed(a) readl(a) 146 * which all ports are being mapped.
209#define readq_relaxed(a) readq(a) 147 */
210 148extern const unsigned long sh_io_port_base;
211#ifndef CONFIG_GENERIC_IOMAP 149
212/* Simple MMIO */ 150static inline void __set_io_port_base(unsigned long pbase)
213#define ioread8(a) __raw_readb(a) 151{
214#define ioread16(a) __raw_readw(a) 152 *(unsigned long *)&sh_io_port_base = pbase;
215#define ioread16be(a) be16_to_cpu(__raw_readw((a))) 153 barrier();
216#define ioread32(a) __raw_readl(a) 154}
217#define ioread32be(a) be32_to_cpu(__raw_readl((a))) 155
218 156#ifdef CONFIG_GENERIC_IOMAP
219#define iowrite8(v,a) __raw_writeb((v),(a)) 157#define __ioport_map ioport_map
220#define iowrite16(v,a) __raw_writew((v),(a)) 158#else
221#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a)) 159extern void __iomem *__ioport_map(unsigned long addr, unsigned int size);
222#define iowrite32(v,a) __raw_writel((v),(a))
223#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
224
225#define ioread8_rep(a, d, c) __raw_readsb((a), (d), (c))
226#define ioread16_rep(a, d, c) __raw_readsw((a), (d), (c))
227#define ioread32_rep(a, d, c) __raw_readsl((a), (d), (c))
228
229#define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c))
230#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c))
231#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c))
232#endif 160#endif
233 161
234#define mmio_insb(p,d,c) __raw_readsb(p,d,c) 162#ifdef CONF_SLOWDOWN_IO
235#define mmio_insw(p,d,c) __raw_readsw(p,d,c) 163#define SLOW_DOWN_IO __raw_readw(sh_io_port_base)
236#define mmio_insl(p,d,c) __raw_readsl(p,d,c) 164#else
165#define SLOW_DOWN_IO
166#endif
237 167
238#define mmio_outsb(p,s,c) __raw_writesb(p,s,c) 168#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \
239#define mmio_outsw(p,s,c) __raw_writesw(p,s,c) 169 \
240#define mmio_outsl(p,s,c) __raw_writesl(p,s,c) 170static inline void pfx##out##bwlq##p(type val, unsigned long port) \
171{ \
172 volatile type *__addr; \
173 \
174 __addr = __ioport_map(port, sizeof(type)); \
175 *__addr = val; \
176 slow; \
177} \
178 \
179static inline type pfx##in##bwlq##p(unsigned long port) \
180{ \
181 volatile type *__addr; \
182 type __val; \
183 \
184 __addr = __ioport_map(port, sizeof(type)); \
185 __val = *__addr; \
186 slow; \
187 \
188 return __val; \
189}
241 190
242/* synco on SH-4A, otherwise a nop */ 191#define __BUILD_IOPORT_PFX(bus, bwlq, type) \
243#define mmiowb() wmb() 192 __BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) \
193 __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO)
244 194
245#define IO_SPACE_LIMIT 0xffffffff 195#define BUILDIO_IOPORT(bwlq, type) \
196 __BUILD_IOPORT_PFX(, bwlq, type)
246 197
247#ifdef CONFIG_HAS_IOPORT 198BUILDIO_IOPORT(b, u8)
199BUILDIO_IOPORT(w, u16)
200BUILDIO_IOPORT(l, u32)
201BUILDIO_IOPORT(q, u64)
202
203#define __BUILD_IOPORT_STRING(bwlq, type) \
204 \
205static inline void outs##bwlq(unsigned long port, const void *addr, \
206 unsigned int count) \
207{ \
208 const volatile type *__addr = addr; \
209 \
210 while (count--) { \
211 out##bwlq(*__addr, port); \
212 __addr++; \
213 } \
214} \
215 \
216static inline void ins##bwlq(unsigned long port, void *addr, \
217 unsigned int count) \
218{ \
219 volatile type *__addr = addr; \
220 \
221 while (count--) { \
222 *__addr = in##bwlq(port); \
223 __addr++; \
224 } \
225}
226
227__BUILD_IOPORT_STRING(b, u8)
228__BUILD_IOPORT_STRING(w, u16)
229__BUILD_IOPORT_STRING(l, u32)
230__BUILD_IOPORT_STRING(q, u64)
231
232#endif
248 233
249/* 234/*
250 * This function provides a method for the generic case where a 235 * Legacy SuperH on-chip I/O functions
251 * board-specific ioport_map simply needs to return the port + some
252 * arbitrary port base.
253 * 236 *
254 * We use this at board setup time to implicitly set the port base, and 237 * These are all deprecated, all new (and especially cross-platform) code
255 * as a result, we can use the generic ioport_map. 238 * should be using the __raw_xxx() routines directly.
256 */ 239 */
257static inline void __set_io_port_base(unsigned long pbase) 240static inline u8 __deprecated ctrl_inb(unsigned long addr)
258{ 241{
259 generic_io_base = pbase; 242 return __raw_readb(addr);
260} 243}
261 244
262#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) 245static inline u16 __deprecated ctrl_inw(unsigned long addr)
246{
247 return __raw_readw(addr);
248}
263 249
264#endif 250static inline u32 __deprecated ctrl_inl(unsigned long addr)
251{
252 return __raw_readl(addr);
253}
254
255static inline u64 __deprecated ctrl_inq(unsigned long addr)
256{
257 return __raw_readq(addr);
258}
259
260static inline void __deprecated ctrl_outb(u8 v, unsigned long addr)
261{
262 __raw_writeb(v, addr);
263}
264
265static inline void __deprecated ctrl_outw(u16 v, unsigned long addr)
266{
267 __raw_writew(v, addr);
268}
269
270static inline void __deprecated ctrl_outl(u32 v, unsigned long addr)
271{
272 __raw_writel(v, addr);
273}
274
275static inline void __deprecated ctrl_outq(u64 v, unsigned long addr)
276{
277 __raw_writeq(v, addr);
278}
279
280#define IO_SPACE_LIMIT 0xffffffff
281
282/* synco on SH-4A, otherwise a nop */
283#define mmiowb() wmb()
265 284
266/* We really want to try and get these to memcpy etc */ 285/* We really want to try and get these to memcpy etc */
267void memcpy_fromio(void *, const volatile void __iomem *, unsigned long); 286void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
@@ -395,10 +414,6 @@ static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; }
395#define ioremap_nocache ioremap 414#define ioremap_nocache ioremap
396#define iounmap __iounmap 415#define iounmap __iounmap
397 416
398#define maybebadio(port) \
399 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
400 __func__, __LINE__, (port), (u32)__builtin_return_address(0))
401
402/* 417/*
403 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 418 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
404 * access 419 * access
diff --git a/arch/sh/include/asm/io_generic.h b/arch/sh/include/asm/io_generic.h
index 491df93cbf8e..b5f6956f19c8 100644
--- a/arch/sh/include/asm/io_generic.h
+++ b/arch/sh/include/asm/io_generic.h
@@ -11,31 +11,6 @@
11#error "Don't include this header without a valid system prefix" 11#error "Don't include this header without a valid system prefix"
12#endif 12#endif
13 13
14u8 IO_CONCAT(__IO_PREFIX,inb)(unsigned long);
15u16 IO_CONCAT(__IO_PREFIX,inw)(unsigned long);
16u32 IO_CONCAT(__IO_PREFIX,inl)(unsigned long);
17
18void IO_CONCAT(__IO_PREFIX,outb)(u8, unsigned long);
19void IO_CONCAT(__IO_PREFIX,outw)(u16, unsigned long);
20void IO_CONCAT(__IO_PREFIX,outl)(u32, unsigned long);
21
22u8 IO_CONCAT(__IO_PREFIX,inb_p)(unsigned long);
23u16 IO_CONCAT(__IO_PREFIX,inw_p)(unsigned long);
24u32 IO_CONCAT(__IO_PREFIX,inl_p)(unsigned long);
25void IO_CONCAT(__IO_PREFIX,outb_p)(u8, unsigned long);
26void IO_CONCAT(__IO_PREFIX,outw_p)(u16, unsigned long);
27void IO_CONCAT(__IO_PREFIX,outl_p)(u32, unsigned long);
28
29void IO_CONCAT(__IO_PREFIX,insb)(unsigned long, void *dst, unsigned long count);
30void IO_CONCAT(__IO_PREFIX,insw)(unsigned long, void *dst, unsigned long count);
31void IO_CONCAT(__IO_PREFIX,insl)(unsigned long, void *dst, unsigned long count);
32void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long count);
33void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count);
34void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count);
35
36void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size);
37void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr);
38
39void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size); 14void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size);
40void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr); 15void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr);
41void IO_CONCAT(__IO_PREFIX,mem_init)(void); 16void IO_CONCAT(__IO_PREFIX,mem_init)(void);
diff --git a/arch/sh/include/asm/ioctls.h b/arch/sh/include/asm/ioctls.h
index eb6c4c687972..84e85a792638 100644
--- a/arch/sh/include/asm/ioctls.h
+++ b/arch/sh/include/asm/ioctls.h
@@ -85,6 +85,7 @@
85#define TCSETSF2 _IOW('T', 45, struct termios2) 85#define TCSETSF2 _IOW('T', 45, struct termios2)
86#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 86#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
87#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 87#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
88#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
88#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ 89#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
89 90
90#define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */ 91#define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index a0b0cf79cf8a..dd5d6e5bf204 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -23,27 +23,6 @@ struct sh_machine_vector {
23 void (*mv_init_irq)(void); 23 void (*mv_init_irq)(void);
24 24
25#ifdef CONFIG_HAS_IOPORT 25#ifdef CONFIG_HAS_IOPORT
26 u8 (*mv_inb)(unsigned long);
27 u16 (*mv_inw)(unsigned long);
28 u32 (*mv_inl)(unsigned long);
29 void (*mv_outb)(u8, unsigned long);
30 void (*mv_outw)(u16, unsigned long);
31 void (*mv_outl)(u32, unsigned long);
32
33 u8 (*mv_inb_p)(unsigned long);
34 u16 (*mv_inw_p)(unsigned long);
35 u32 (*mv_inl_p)(unsigned long);
36 void (*mv_outb_p)(u8, unsigned long);
37 void (*mv_outw_p)(u16, unsigned long);
38 void (*mv_outl_p)(u32, unsigned long);
39
40 void (*mv_insb)(unsigned long, void *dst, unsigned long count);
41 void (*mv_insw)(unsigned long, void *dst, unsigned long count);
42 void (*mv_insl)(unsigned long, void *dst, unsigned long count);
43 void (*mv_outsb)(unsigned long, const void *src, unsigned long count);
44 void (*mv_outsw)(unsigned long, const void *src, unsigned long count);
45 void (*mv_outsl)(unsigned long, const void *src, unsigned long count);
46
47 void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); 26 void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size);
48 void (*mv_ioport_unmap)(void __iomem *); 27 void (*mv_ioport_unmap)(void __iomem *);
49#endif 28#endif
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 46d5179c9f49..e3c73cdd8c90 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -199,10 +199,13 @@ extern unsigned long get_wchan(struct task_struct *p);
199#define ARCH_HAS_PREFETCHW 199#define ARCH_HAS_PREFETCHW
200static inline void prefetch(void *x) 200static inline void prefetch(void *x)
201{ 201{
202 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); 202 __builtin_prefetch(x, 0, 3);
203} 203}
204 204
205#define prefetchw(x) prefetch(x) 205static inline void prefetchw(void *x)
206{
207 __builtin_prefetch(x, 1, 3);
208}
206#endif 209#endif
207 210
208#endif /* __KERNEL__ */ 211#endif /* __KERNEL__ */
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index f6edc10aa0d3..de167d3a1a80 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -40,8 +40,8 @@
40#include <asm/system.h> 40#include <asm/system.h>
41 41
42#define user_mode(regs) (((regs)->sr & 0x40000000)==0) 42#define user_mode(regs) (((regs)->sr & 0x40000000)==0)
43#define user_stack_pointer(regs) ((unsigned long)(regs)->regs[15]) 43#define user_stack_pointer(_regs) ((unsigned long)(_regs)->regs[15])
44#define kernel_stack_pointer(regs) ((unsigned long)(regs)->regs[15]) 44#define kernel_stack_pointer(_regs) ((unsigned long)(_regs)->regs[15])
45#define instruction_pointer(regs) ((unsigned long)(regs)->pc) 45#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
46 46
47extern void show_regs(struct pt_regs *); 47extern void show_regs(struct pt_regs *);
diff --git a/arch/sh/include/asm/ptrace_32.h b/arch/sh/include/asm/ptrace_32.h
index 35d9e257558c..6c2239cca1a2 100644
--- a/arch/sh/include/asm/ptrace_32.h
+++ b/arch/sh/include/asm/ptrace_32.h
@@ -76,7 +76,7 @@ struct pt_dspregs {
76#ifdef __KERNEL__ 76#ifdef __KERNEL__
77 77
78#define MAX_REG_OFFSET offsetof(struct pt_regs, tra) 78#define MAX_REG_OFFSET offsetof(struct pt_regs, tra)
79#define regs_return_value(regs) ((regs)->regs[0]) 79#define regs_return_value(_regs) ((_regs)->regs[0])
80 80
81#endif /* __KERNEL__ */ 81#endif /* __KERNEL__ */
82 82
diff --git a/arch/sh/include/asm/ptrace_64.h b/arch/sh/include/asm/ptrace_64.h
index d43c1cb0bbe7..bf9be7764d69 100644
--- a/arch/sh/include/asm/ptrace_64.h
+++ b/arch/sh/include/asm/ptrace_64.h
@@ -13,7 +13,7 @@ struct pt_regs {
13#ifdef __KERNEL__ 13#ifdef __KERNEL__
14 14
15#define MAX_REG_OFFSET offsetof(struct pt_regs, tregs[7]) 15#define MAX_REG_OFFSET offsetof(struct pt_regs, tregs[7])
16#define regs_return_value(regs) ((regs)->regs[3]) 16#define regs_return_value(_regs) ((_regs)->regs[3])
17 17
18#endif /* __KERNEL__ */ 18#endif /* __KERNEL__ */
19 19
diff --git a/arch/sh/include/asm/unaligned-sh4a.h b/arch/sh/include/asm/unaligned-sh4a.h
index 9f4dd252c981..c48a9c3420da 100644
--- a/arch/sh/include/asm/unaligned-sh4a.h
+++ b/arch/sh/include/asm/unaligned-sh4a.h
@@ -18,10 +18,20 @@
18 * of spill registers and blowing up when building at low optimization 18 * of spill registers and blowing up when building at low optimization
19 * levels. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34777. 19 * levels. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34777.
20 */ 20 */
21#include <linux/unaligned/packed_struct.h>
21#include <linux/types.h> 22#include <linux/types.h>
22#include <asm/byteorder.h> 23#include <asm/byteorder.h>
23 24
24static __always_inline u32 __get_unaligned_cpu32(const u8 *p) 25static inline u16 sh4a_get_unaligned_cpu16(const u8 *p)
26{
27#ifdef __LITTLE_ENDIAN
28 return p[0] | p[1] << 8;
29#else
30 return p[0] << 8 | p[1];
31#endif
32}
33
34static __always_inline u32 sh4a_get_unaligned_cpu32(const u8 *p)
25{ 35{
26 unsigned long unaligned; 36 unsigned long unaligned;
27 37
@@ -34,218 +44,148 @@ static __always_inline u32 __get_unaligned_cpu32(const u8 *p)
34 return unaligned; 44 return unaligned;
35} 45}
36 46
37struct __una_u16 { u16 x __attribute__((packed)); };
38struct __una_u32 { u32 x __attribute__((packed)); };
39struct __una_u64 { u64 x __attribute__((packed)); };
40
41static inline u16 __get_unaligned_cpu16(const u8 *p)
42{
43#ifdef __LITTLE_ENDIAN
44 return p[0] | p[1] << 8;
45#else
46 return p[0] << 8 | p[1];
47#endif
48}
49
50/* 47/*
51 * Even though movua.l supports auto-increment on the read side, it can 48 * Even though movua.l supports auto-increment on the read side, it can
52 * only store to r0 due to instruction encoding constraints, so just let 49 * only store to r0 due to instruction encoding constraints, so just let
53 * the compiler sort it out on its own. 50 * the compiler sort it out on its own.
54 */ 51 */
55static inline u64 __get_unaligned_cpu64(const u8 *p) 52static inline u64 sh4a_get_unaligned_cpu64(const u8 *p)
56{ 53{
57#ifdef __LITTLE_ENDIAN 54#ifdef __LITTLE_ENDIAN
58 return (u64)__get_unaligned_cpu32(p + 4) << 32 | 55 return (u64)sh4a_get_unaligned_cpu32(p + 4) << 32 |
59 __get_unaligned_cpu32(p); 56 sh4a_get_unaligned_cpu32(p);
60#else 57#else
61 return (u64)__get_unaligned_cpu32(p) << 32 | 58 return (u64)sh4a_get_unaligned_cpu32(p) << 32 |
62 __get_unaligned_cpu32(p + 4); 59 sh4a_get_unaligned_cpu32(p + 4);
63#endif 60#endif
64} 61}
65 62
66static inline u16 get_unaligned_le16(const void *p) 63static inline u16 get_unaligned_le16(const void *p)
67{ 64{
68 return le16_to_cpu(__get_unaligned_cpu16(p)); 65 return le16_to_cpu(sh4a_get_unaligned_cpu16(p));
69} 66}
70 67
71static inline u32 get_unaligned_le32(const void *p) 68static inline u32 get_unaligned_le32(const void *p)
72{ 69{
73 return le32_to_cpu(__get_unaligned_cpu32(p)); 70 return le32_to_cpu(sh4a_get_unaligned_cpu32(p));
74} 71}
75 72
76static inline u64 get_unaligned_le64(const void *p) 73static inline u64 get_unaligned_le64(const void *p)
77{ 74{
78 return le64_to_cpu(__get_unaligned_cpu64(p)); 75 return le64_to_cpu(sh4a_get_unaligned_cpu64(p));
79} 76}
80 77
81static inline u16 get_unaligned_be16(const void *p) 78static inline u16 get_unaligned_be16(const void *p)
82{ 79{
83 return be16_to_cpu(__get_unaligned_cpu16(p)); 80 return be16_to_cpu(sh4a_get_unaligned_cpu16(p));
84} 81}
85 82
86static inline u32 get_unaligned_be32(const void *p) 83static inline u32 get_unaligned_be32(const void *p)
87{ 84{
88 return be32_to_cpu(__get_unaligned_cpu32(p)); 85 return be32_to_cpu(sh4a_get_unaligned_cpu32(p));
89} 86}
90 87
91static inline u64 get_unaligned_be64(const void *p) 88static inline u64 get_unaligned_be64(const void *p)
92{ 89{
93 return be64_to_cpu(__get_unaligned_cpu64(p)); 90 return be64_to_cpu(sh4a_get_unaligned_cpu64(p));
94} 91}
95 92
96static inline void __put_le16_noalign(u8 *p, u16 val) 93static inline void nonnative_put_le16(u16 val, u8 *p)
97{ 94{
98 *p++ = val; 95 *p++ = val;
99 *p++ = val >> 8; 96 *p++ = val >> 8;
100} 97}
101 98
102static inline void __put_le32_noalign(u8 *p, u32 val) 99static inline void nonnative_put_le32(u32 val, u8 *p)
103{ 100{
104 __put_le16_noalign(p, val); 101 nonnative_put_le16(val, p);
105 __put_le16_noalign(p + 2, val >> 16); 102 nonnative_put_le16(val >> 16, p + 2);
106} 103}
107 104
108static inline void __put_le64_noalign(u8 *p, u64 val) 105static inline void nonnative_put_le64(u64 val, u8 *p)
109{ 106{
110 __put_le32_noalign(p, val); 107 nonnative_put_le32(val, p);
111 __put_le32_noalign(p + 4, val >> 32); 108 nonnative_put_le32(val >> 32, p + 4);
112} 109}
113 110
114static inline void __put_be16_noalign(u8 *p, u16 val) 111static inline void nonnative_put_be16(u16 val, u8 *p)
115{ 112{
116 *p++ = val >> 8; 113 *p++ = val >> 8;
117 *p++ = val; 114 *p++ = val;
118} 115}
119 116
120static inline void __put_be32_noalign(u8 *p, u32 val) 117static inline void nonnative_put_be32(u32 val, u8 *p)
121{ 118{
122 __put_be16_noalign(p, val >> 16); 119 nonnative_put_be16(val >> 16, p);
123 __put_be16_noalign(p + 2, val); 120 nonnative_put_be16(val, p + 2);
124} 121}
125 122
126static inline void __put_be64_noalign(u8 *p, u64 val) 123static inline void nonnative_put_be64(u64 val, u8 *p)
127{ 124{
128 __put_be32_noalign(p, val >> 32); 125 nonnative_put_be32(val >> 32, p);
129 __put_be32_noalign(p + 4, val); 126 nonnative_put_be32(val, p + 4);
130} 127}
131 128
132static inline void put_unaligned_le16(u16 val, void *p) 129static inline void put_unaligned_le16(u16 val, void *p)
133{ 130{
134#ifdef __LITTLE_ENDIAN 131#ifdef __LITTLE_ENDIAN
135 ((struct __una_u16 *)p)->x = val; 132 __put_unaligned_cpu16(val, p);
136#else 133#else
137 __put_le16_noalign(p, val); 134 nonnative_put_le16(val, p);
138#endif 135#endif
139} 136}
140 137
141static inline void put_unaligned_le32(u32 val, void *p) 138static inline void put_unaligned_le32(u32 val, void *p)
142{ 139{
143#ifdef __LITTLE_ENDIAN 140#ifdef __LITTLE_ENDIAN
144 ((struct __una_u32 *)p)->x = val; 141 __put_unaligned_cpu32(val, p);
145#else 142#else
146 __put_le32_noalign(p, val); 143 nonnative_put_le32(val, p);
147#endif 144#endif
148} 145}
149 146
150static inline void put_unaligned_le64(u64 val, void *p) 147static inline void put_unaligned_le64(u64 val, void *p)
151{ 148{
152#ifdef __LITTLE_ENDIAN 149#ifdef __LITTLE_ENDIAN
153 ((struct __una_u64 *)p)->x = val; 150 __put_unaligned_cpu64(val, p);
154#else 151#else
155 __put_le64_noalign(p, val); 152 nonnative_put_le64(val, p);
156#endif 153#endif
157} 154}
158 155
159static inline void put_unaligned_be16(u16 val, void *p) 156static inline void put_unaligned_be16(u16 val, void *p)
160{ 157{
161#ifdef __BIG_ENDIAN 158#ifdef __BIG_ENDIAN
162 ((struct __una_u16 *)p)->x = val; 159 __put_unaligned_cpu16(val, p);
163#else 160#else
164 __put_be16_noalign(p, val); 161 nonnative_put_be16(val, p);
165#endif 162#endif
166} 163}
167 164
168static inline void put_unaligned_be32(u32 val, void *p) 165static inline void put_unaligned_be32(u32 val, void *p)
169{ 166{
170#ifdef __BIG_ENDIAN 167#ifdef __BIG_ENDIAN
171 ((struct __una_u32 *)p)->x = val; 168 __put_unaligned_cpu32(val, p);
172#else 169#else
173 __put_be32_noalign(p, val); 170 nonnative_put_be32(val, p);
174#endif 171#endif
175} 172}
176 173
177static inline void put_unaligned_be64(u64 val, void *p) 174static inline void put_unaligned_be64(u64 val, void *p)
178{ 175{
179#ifdef __BIG_ENDIAN 176#ifdef __BIG_ENDIAN
180 ((struct __una_u64 *)p)->x = val; 177 __put_unaligned_cpu64(val, p);
181#else 178#else
182 __put_be64_noalign(p, val); 179 nonnative_put_be64(val, p);
183#endif 180#endif
184} 181}
185 182
186/* 183/*
187 * Cause a link-time error if we try an unaligned access other than 184 * While it's a bit non-obvious, even though the generic le/be wrappers
188 * 1,2,4 or 8 bytes long 185 * use the __get/put_xxx prefixing, they actually wrap in to the
186 * non-prefixed get/put_xxx variants as provided above.
189 */ 187 */
190extern void __bad_unaligned_access_size(void); 188#include <linux/unaligned/generic.h>
191
192#define __get_unaligned_le(ptr) ((__force typeof(*(ptr)))({ \
193 __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
194 __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_le16((ptr)), \
195 __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_le32((ptr)), \
196 __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_le64((ptr)), \
197 __bad_unaligned_access_size())))); \
198 }))
199
200#define __get_unaligned_be(ptr) ((__force typeof(*(ptr)))({ \
201 __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
202 __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_be16((ptr)), \
203 __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_be32((ptr)), \
204 __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_be64((ptr)), \
205 __bad_unaligned_access_size())))); \
206 }))
207
208#define __put_unaligned_le(val, ptr) ({ \
209 void *__gu_p = (ptr); \
210 switch (sizeof(*(ptr))) { \
211 case 1: \
212 *(u8 *)__gu_p = (__force u8)(val); \
213 break; \
214 case 2: \
215 put_unaligned_le16((__force u16)(val), __gu_p); \
216 break; \
217 case 4: \
218 put_unaligned_le32((__force u32)(val), __gu_p); \
219 break; \
220 case 8: \
221 put_unaligned_le64((__force u64)(val), __gu_p); \
222 break; \
223 default: \
224 __bad_unaligned_access_size(); \
225 break; \
226 } \
227 (void)0; })
228
229#define __put_unaligned_be(val, ptr) ({ \
230 void *__gu_p = (ptr); \
231 switch (sizeof(*(ptr))) { \
232 case 1: \
233 *(u8 *)__gu_p = (__force u8)(val); \
234 break; \
235 case 2: \
236 put_unaligned_be16((__force u16)(val), __gu_p); \
237 break; \
238 case 4: \
239 put_unaligned_be32((__force u32)(val), __gu_p); \
240 break; \
241 case 8: \
242 put_unaligned_be64((__force u64)(val), __gu_p); \
243 break; \
244 default: \
245 __bad_unaligned_access_size(); \
246 break; \
247 } \
248 (void)0; })
249 189
250#ifdef __LITTLE_ENDIAN 190#ifdef __LITTLE_ENDIAN
251# define get_unaligned __get_unaligned_le 191# define get_unaligned __get_unaligned_le
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index 903cd618eb74..d6741fca89a4 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -368,8 +368,9 @@
368#define __NR_sendmsg 355 368#define __NR_sendmsg 355
369#define __NR_recvmsg 356 369#define __NR_recvmsg 356
370#define __NR_recvmmsg 357 370#define __NR_recvmmsg 357
371#define __NR_accept4 358
371 372
372#define NR_syscalls 358 373#define NR_syscalls 359
373 374
374#ifdef __KERNEL__ 375#ifdef __KERNEL__
375 376
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h
index 4c27b68789b3..7eb435999426 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7724.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h
@@ -303,4 +303,7 @@ enum {
303 SHDMA_SLAVE_SDHI1_RX, 303 SHDMA_SLAVE_SDHI1_RX,
304}; 304};
305 305
306extern struct clk sh7724_fsimcka_clk;
307extern struct clk sh7724_fsimckb_clk;
308
306#endif /* __ASM_SH7724_H__ */ 309#endif /* __ASM_SH7724_H__ */
diff --git a/arch/sh/include/mach-common/mach/romimage.h b/arch/sh/include/mach-common/mach/romimage.h
index 08fb42269ecd..3670455faaac 100644
--- a/arch/sh/include/mach-common/mach/romimage.h
+++ b/arch/sh/include/mach-common/mach/romimage.h
@@ -4,7 +4,7 @@
4 4
5#else /* __ASSEMBLY__ */ 5#else /* __ASSEMBLY__ */
6 6
7extern inline void mmcif_update_progress(int nr) 7static inline void mmcif_update_progress(int nr)
8{ 8{
9} 9}
10 10
diff --git a/arch/sh/include/mach-ecovec24/mach/romimage.h b/arch/sh/include/mach-ecovec24/mach/romimage.h
index 1dcf5e6c8d83..d63ef51ec186 100644
--- a/arch/sh/include/mach-ecovec24/mach/romimage.h
+++ b/arch/sh/include/mach-ecovec24/mach/romimage.h
@@ -35,7 +35,7 @@
35#define HIZCRA 0xa4050158 35#define HIZCRA 0xa4050158
36#define PGDR 0xa405012c 36#define PGDR 0xa405012c
37 37
38extern inline void mmcif_update_progress(int nr) 38static inline void mmcif_update_progress(int nr)
39{ 39{
40 /* disable Hi-Z for LED pins */ 40 /* disable Hi-Z for LED pins */
41 __raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA); 41 __raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA);
diff --git a/arch/sh/include/mach-kfr2r09/mach/romimage.h b/arch/sh/include/mach-kfr2r09/mach/romimage.h
index 976256a323f2..7a883167c846 100644
--- a/arch/sh/include/mach-kfr2r09/mach/romimage.h
+++ b/arch/sh/include/mach-kfr2r09/mach/romimage.h
@@ -23,7 +23,7 @@
23 23
24#else /* __ASSEMBLY__ */ 24#else /* __ASSEMBLY__ */
25 25
26extern inline void mmcif_update_progress(int nr) 26static inline void mmcif_update_progress(int nr)
27{ 27{
28} 28}
29 29
diff --git a/arch/sh/include/mach-sdk7786/mach/fpga.h b/arch/sh/include/mach-sdk7786/mach/fpga.h
index 40f0c2d3690c..a9cdac469927 100644
--- a/arch/sh/include/mach-sdk7786/mach/fpga.h
+++ b/arch/sh/include/mach-sdk7786/mach/fpga.h
@@ -14,11 +14,16 @@
14#define INTTESTR 0x040 14#define INTTESTR 0x040
15#define SYSSR 0x050 15#define SYSSR 0x050
16#define NRGPR 0x060 16#define NRGPR 0x060
17
17#define NMISR 0x070 18#define NMISR 0x070
19#define NMISR_MAN_NMI BIT(0)
20#define NMISR_AUX_NMI BIT(1)
21#define NMISR_MASK (NMISR_MAN_NMI | NMISR_AUX_NMI)
18 22
19#define NMIMR 0x080 23#define NMIMR 0x080
20#define NMIMR_MAN_NMIM BIT(0) /* Manual NMI mask */ 24#define NMIMR_MAN_NMIM BIT(0) /* Manual NMI mask */
21#define NMIMR_AUX_NMIM BIT(1) /* Auxiliary NMI mask */ 25#define NMIMR_AUX_NMIM BIT(1) /* Auxiliary NMI mask */
26#define NMIMR_MASK (NMIMR_MAN_NMIM | NMIMR_AUX_NMIM)
22 27
23#define INTBSR 0x090 28#define INTBSR 0x090
24#define INTBMR 0x0a0 29#define INTBMR 0x0a0
@@ -126,6 +131,9 @@
126extern void __iomem *sdk7786_fpga_base; 131extern void __iomem *sdk7786_fpga_base;
127extern void sdk7786_fpga_init(void); 132extern void sdk7786_fpga_init(void);
128 133
134/* arch/sh/boards/mach-sdk7786/nmi.c */
135extern void sdk7786_nmi_init(void);
136
129#define SDK7786_FPGA_REGADDR(reg) (sdk7786_fpga_base + (reg)) 137#define SDK7786_FPGA_REGADDR(reg) (sdk7786_fpga_base + (reg))
130 138
131/* 139/*
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-30 13:36:19 -0500