diff options
Diffstat (limited to 'arch/sh/include/cpu-sh4/cpu/dma.h')
-rw-r--r-- | arch/sh/include/cpu-sh4/cpu/dma.h | 35 |
1 files changed, 19 insertions, 16 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h index bcb30246e85c..114a369705bc 100644 --- a/arch/sh/include/cpu-sh4/cpu/dma.h +++ b/arch/sh/include/cpu-sh4/cpu/dma.h | |||
@@ -6,8 +6,6 @@ | |||
6 | #ifdef CONFIG_CPU_SH4A | 6 | #ifdef CONFIG_CPU_SH4A |
7 | 7 | ||
8 | #define DMAOR_INIT (DMAOR_DME) | 8 | #define DMAOR_INIT (DMAOR_DME) |
9 | #define CHCR_TS_MASK 0x18 | ||
10 | #define CHCR_TS_SHIFT 3 | ||
11 | 9 | ||
12 | #include <cpu/dma-sh4a.h> | 10 | #include <cpu/dma-sh4a.h> |
13 | #else /* CONFIG_CPU_SH4A */ | 11 | #else /* CONFIG_CPU_SH4A */ |
@@ -29,8 +27,10 @@ | |||
29 | #define TS_32 0x00000030 | 27 | #define TS_32 0x00000030 |
30 | #define TS_64 0x00000000 | 28 | #define TS_64 0x00000000 |
31 | 29 | ||
32 | #define CHCR_TS_MASK 0x70 | 30 | #define CHCR_TS_LOW_MASK 0x70 |
33 | #define CHCR_TS_SHIFT 4 | 31 | #define CHCR_TS_LOW_SHIFT 4 |
32 | #define CHCR_TS_HIGH_MASK 0 | ||
33 | #define CHCR_TS_HIGH_SHIFT 0 | ||
34 | 34 | ||
35 | #define DMAOR_COD 0x00000008 | 35 | #define DMAOR_COD 0x00000008 |
36 | 36 | ||
@@ -41,23 +41,26 @@ | |||
41 | * Defaults to a 64-bit transfer size. | 41 | * Defaults to a 64-bit transfer size. |
42 | */ | 42 | */ |
43 | enum { | 43 | enum { |
44 | XMIT_SZ_64BIT, | 44 | XMIT_SZ_8BIT = 1, |
45 | XMIT_SZ_8BIT, | 45 | XMIT_SZ_16BIT = 2, |
46 | XMIT_SZ_16BIT, | 46 | XMIT_SZ_32BIT = 3, |
47 | XMIT_SZ_32BIT, | 47 | XMIT_SZ_64BIT = 0, |
48 | XMIT_SZ_256BIT, | 48 | XMIT_SZ_256BIT = 4, |
49 | }; | 49 | }; |
50 | 50 | ||
51 | /* | 51 | /* |
52 | * The DMA count is defined as the number of bytes to transfer. | 52 | * The DMA count is defined as the number of bytes to transfer. |
53 | */ | 53 | */ |
54 | static unsigned int ts_shift[] __maybe_unused = { | 54 | #define TS_SHIFT { \ |
55 | [XMIT_SZ_64BIT] = 3, | 55 | [XMIT_SZ_8BIT] = 0, \ |
56 | [XMIT_SZ_8BIT] = 0, | 56 | [XMIT_SZ_16BIT] = 1, \ |
57 | [XMIT_SZ_16BIT] = 1, | 57 | [XMIT_SZ_32BIT] = 2, \ |
58 | [XMIT_SZ_32BIT] = 2, | 58 | [XMIT_SZ_64BIT] = 3, \ |
59 | [XMIT_SZ_256BIT] = 5, | 59 | [XMIT_SZ_256BIT] = 5, \ |
60 | }; | 60 | } |
61 | |||
62 | #define TS_INDEX2VAL(i) (((i) & 7) << CHCR_TS_LOW_SHIFT) | ||
63 | |||
61 | #endif | 64 | #endif |
62 | 65 | ||
63 | #endif /* __ASM_CPU_SH4_DMA_H */ | 66 | #endif /* __ASM_CPU_SH4_DMA_H */ |