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-rw-r--r--arch/sh/include/cpu-sh2a/cpu/cache.h40
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/dma.h1
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/freq.h16
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/rtc.h8
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/ubc.h1
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/watchdog.h1
6 files changed, 67 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh2a/cpu/cache.h b/arch/sh/include/cpu-sh2a/cpu/cache.h
new file mode 100644
index 000000000000..afe228b3f493
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/cache.h
@@ -0,0 +1,40 @@
1/*
2 * include/asm-sh/cpu-sh2a/cache.h
3 *
4 * Copyright (C) 2004 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_CPU_SH2A_CACHE_H
11#define __ASM_CPU_SH2A_CACHE_H
12
13#define L1_CACHE_SHIFT 4
14
15#define SH_CACHE_VALID 1
16#define SH_CACHE_UPDATED 2
17#define SH_CACHE_COMBINED 4
18#define SH_CACHE_ASSOC 8
19
20#define CCR 0xfffc1000 /* CCR1 */
21#define CCR2 0xfffc1004
22
23/*
24 * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not
25 * listed here are reserved.
26 */
27#define CCR_CACHE_CB 0x0000 /* Hack */
28#define CCR_CACHE_OCE 0x0001
29#define CCR_CACHE_WT 0x0002
30#define CCR_CACHE_OCI 0x0008 /* OCF */
31#define CCR_CACHE_ICE 0x0100
32#define CCR_CACHE_ICI 0x0800 /* ICF */
33
34#define CACHE_IC_ADDRESS_ARRAY 0xf0000000
35#define CACHE_OC_ADDRESS_ARRAY 0xf0800000
36
37#define CCR_CACHE_ENABLE (CCR_CACHE_OCE | CCR_CACHE_ICE)
38#define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI)
39
40#endif /* __ASM_CPU_SH2A_CACHE_H */
diff --git a/arch/sh/include/cpu-sh2a/cpu/dma.h b/arch/sh/include/cpu-sh2a/cpu/dma.h
new file mode 100644
index 000000000000..27a13ef4fdfc
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/dma.h
@@ -0,0 +1 @@
#include <cpu-sh2/cpu/dma.h>
diff --git a/arch/sh/include/cpu-sh2a/cpu/freq.h b/arch/sh/include/cpu-sh2a/cpu/freq.h
new file mode 100644
index 000000000000..830fd43b6cdc
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/freq.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-sh/cpu-sh2a/freq.h
3 *
4 * Copyright (C) 2006 Yoshinori Sato
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_CPU_SH2A_FREQ_H
11#define __ASM_CPU_SH2A_FREQ_H
12
13#define FREQCR 0xfffe0010
14
15#endif /* __ASM_CPU_SH2A_FREQ_H */
16
diff --git a/arch/sh/include/cpu-sh2a/cpu/rtc.h b/arch/sh/include/cpu-sh2a/cpu/rtc.h
new file mode 100644
index 000000000000..afb511e2bed7
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/rtc.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_SH_CPU_SH2A_RTC_H
2#define __ASM_SH_CPU_SH2A_RTC_H
3
4#define rtc_reg_size sizeof(u16)
5#define RTC_BIT_INVERTED 0
6#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
7
8#endif /* __ASM_SH_CPU_SH2A_RTC_H */
diff --git a/arch/sh/include/cpu-sh2a/cpu/ubc.h b/arch/sh/include/cpu-sh2a/cpu/ubc.h
new file mode 100644
index 000000000000..8ce2fc1cf625
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/ubc.h
@@ -0,0 +1 @@
#include <cpu-sh2/cpu/ubc.h>
diff --git a/arch/sh/include/cpu-sh2a/cpu/watchdog.h b/arch/sh/include/cpu-sh2a/cpu/watchdog.h
new file mode 100644
index 000000000000..e7e8259e468c
--- /dev/null
+++ b/arch/sh/include/cpu-sh2a/cpu/watchdog.h
@@ -0,0 +1 @@
#include <cpu-sh2/cpu/watchdog.h>