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-rw-r--r--arch/sh/include/asm/irq.h13
-rw-r--r--arch/sh/include/asm/machvec.h1
2 files changed, 8 insertions, 6 deletions
diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
index 2a62017eb275..0e4f532e4737 100644
--- a/arch/sh/include/asm/irq.h
+++ b/arch/sh/include/asm/irq.h
@@ -5,12 +5,15 @@
5#include <asm/machvec.h> 5#include <asm/machvec.h>
6 6
7/* 7/*
8 * A sane default based on a reasonable vector table size, platforms are 8 * Only legacy non-sparseirq platforms have to set a reasonably sane
9 * advised to cap this at the hard limit that they're interested in 9 * value here. sparseirq platforms allocate their irq_descs on the fly,
10 * through the machvec. 10 * so will expand automatically based on the number of registered IRQs.
11 */ 11 */
12#define NR_IRQS 512 12#ifdef CONFIG_SPARSE_IRQ
13#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */ 13# define NR_IRQS 8
14#else
15# define NR_IRQS 512
16#endif
14 17
15/* 18/*
16 * This is a special IRQ number for indicating that no IRQ has been 19 * This is a special IRQ number for indicating that no IRQ has been
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index 57c5c3d0f39f..eb9c20d971dd 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -17,7 +17,6 @@
17struct sh_machine_vector { 17struct sh_machine_vector {
18 void (*mv_setup)(char **cmdline_p); 18 void (*mv_setup)(char **cmdline_p);
19 const char *mv_name; 19 const char *mv_name;
20 int mv_nr_irqs;
21 20
22 int (*mv_irq_demux)(int irq); 21 int (*mv_irq_demux)(int irq);
23 void (*mv_init_irq)(void); 22 void (*mv_init_irq)(void);