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-rw-r--r--arch/sh/include/asm/Kbuild4
-rw-r--r--arch/sh/include/asm/addrspace.h18
-rw-r--r--arch/sh/include/asm/alignment.h21
-rw-r--r--arch/sh/include/asm/atomic-grb.h46
-rw-r--r--arch/sh/include/asm/atomic-llsc.h27
-rw-r--r--arch/sh/include/asm/atomic.h73
-rw-r--r--arch/sh/include/asm/cacheflush.h8
-rw-r--r--arch/sh/include/asm/clock.h11
-rw-r--r--arch/sh/include/asm/cmpxchg-grb.h7
-rw-r--r--arch/sh/include/asm/dma-mapping.h2
-rw-r--r--arch/sh/include/asm/dma-sh.h55
-rw-r--r--arch/sh/include/asm/dwarf.h19
-rw-r--r--arch/sh/include/asm/fixmap.h15
-rw-r--r--arch/sh/include/asm/fpu.h35
-rw-r--r--arch/sh/include/asm/hw_breakpoint.h67
-rw-r--r--arch/sh/include/asm/io.h169
-rw-r--r--arch/sh/include/asm/kdebug.h2
-rw-r--r--arch/sh/include/asm/mmu.h49
-rw-r--r--arch/sh/include/asm/mmu_context.h6
-rw-r--r--arch/sh/include/asm/mmu_context_32.h4
-rw-r--r--arch/sh/include/asm/module.h17
-rw-r--r--arch/sh/include/asm/page.h19
-rw-r--r--arch/sh/include/asm/pci.h59
-rw-r--r--arch/sh/include/asm/pgalloc.h32
-rw-r--r--arch/sh/include/asm/pgtable-2level.h23
-rw-r--r--arch/sh/include/asm/pgtable-3level.h56
-rw-r--r--arch/sh/include/asm/pgtable.h29
-rw-r--r--arch/sh/include/asm/pgtable_32.h4
-rw-r--r--arch/sh/include/asm/pgtable_64.h26
-rw-r--r--arch/sh/include/asm/processor.h21
-rw-r--r--arch/sh/include/asm/processor_32.h35
-rw-r--r--arch/sh/include/asm/processor_64.h23
-rw-r--r--arch/sh/include/asm/ptrace.h20
-rw-r--r--arch/sh/include/asm/reboot.h21
-rw-r--r--arch/sh/include/asm/setup.h1
-rw-r--r--arch/sh/include/asm/sh_bios.h15
-rw-r--r--arch/sh/include/asm/siu.h26
-rw-r--r--arch/sh/include/asm/suspend.h1
-rw-r--r--arch/sh/include/asm/syscall.h2
-rw-r--r--arch/sh/include/asm/system.h9
-rw-r--r--arch/sh/include/asm/system_32.h15
-rw-r--r--arch/sh/include/asm/system_64.h10
-rw-r--r--arch/sh/include/asm/thread_info.h10
-rw-r--r--arch/sh/include/asm/tlb.h17
-rw-r--r--arch/sh/include/asm/ubc.h64
-rw-r--r--arch/sh/include/asm/uncached.h18
-rw-r--r--arch/sh/include/asm/vmlinux.lds.h8
-rw-r--r--arch/sh/include/asm/watchdog.h18
48 files changed, 789 insertions, 448 deletions
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild
index e121c30f797d..46cb93477bcb 100644
--- a/arch/sh/include/asm/Kbuild
+++ b/arch/sh/include/asm/Kbuild
@@ -1,6 +1,8 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3header-y += cachectl.h cpu-features.h 3header-y += cachectl.h
4header-y += cpu-features.h
5header-y += hw_breakpoint.h
4 6
5unifdef-y += unistd_32.h 7unifdef-y += unistd_32.h
6unifdef-y += unistd_64.h 8unifdef-y += unistd_64.h
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h
index 99d6b3ecbe22..446b3831c214 100644
--- a/arch/sh/include/asm/addrspace.h
+++ b/arch/sh/include/asm/addrspace.h
@@ -28,7 +28,7 @@
28/* Returns the privileged segment base of a given address */ 28/* Returns the privileged segment base of a given address */
29#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) 29#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
30 30
31#if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED) 31#ifdef CONFIG_29BIT
32/* 32/*
33 * Map an address to a certain privileged segment 33 * Map an address to a certain privileged segment
34 */ 34 */
@@ -40,7 +40,15 @@
40 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) 40 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
41#define P4SEGADDR(a) \ 41#define P4SEGADDR(a) \
42 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) 42 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
43#endif /* 29BIT || PMB_FIXED */ 43#else
44/*
45 * These will never work in 32-bit, don't even bother.
46 */
47#define P1SEGADDR(a) __futile_remapping_attempt
48#define P2SEGADDR(a) __futile_remapping_attempt
49#define P3SEGADDR(a) __futile_remapping_attempt
50#define P4SEGADDR(a) __futile_remapping_attempt
51#endif
44#endif /* P1SEG */ 52#endif /* P1SEG */
45 53
46/* Check if an address can be reached in 29 bits */ 54/* Check if an address can be reached in 29 bits */
@@ -57,11 +65,5 @@
57#define P3_ADDR_MAX P4SEG 65#define P3_ADDR_MAX P4SEG
58#endif 66#endif
59 67
60#ifndef __ASSEMBLY__
61#ifdef CONFIG_PMB
62extern int __in_29bit_mode(void);
63#endif /* CONFIG_PMB */
64#endif /* __ASSEMBLY__ */
65
66#endif /* __KERNEL__ */ 68#endif /* __KERNEL__ */
67#endif /* __ASM_SH_ADDRSPACE_H */ 69#endif /* __ASM_SH_ADDRSPACE_H */
diff --git a/arch/sh/include/asm/alignment.h b/arch/sh/include/asm/alignment.h
new file mode 100644
index 000000000000..b12efecf5294
--- /dev/null
+++ b/arch/sh/include/asm/alignment.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_SH_ALIGNMENT_H
2#define __ASM_SH_ALIGNMENT_H
3
4#include <linux/types.h>
5
6extern void inc_unaligned_byte_access(void);
7extern void inc_unaligned_word_access(void);
8extern void inc_unaligned_dword_access(void);
9extern void inc_unaligned_multi_access(void);
10extern void inc_unaligned_user_access(void);
11extern void inc_unaligned_kernel_access(void);
12
13#define UM_WARN (1 << 0)
14#define UM_FIXUP (1 << 1)
15#define UM_SIGNAL (1 << 2)
16
17extern unsigned int unaligned_user_action(void);
18
19extern void unaligned_fixups_notify(struct task_struct *, insn_size_t, struct pt_regs *);
20
21#endif /* __ASM_SH_ALIGNMENT_H */
diff --git a/arch/sh/include/asm/atomic-grb.h b/arch/sh/include/asm/atomic-grb.h
index 4c5b7dbfcedb..a273c88578fc 100644
--- a/arch/sh/include/asm/atomic-grb.h
+++ b/arch/sh/include/asm/atomic-grb.h
@@ -120,50 +120,4 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
120 : "memory" , "r0", "r1"); 120 : "memory" , "r0", "r1");
121} 121}
122 122
123static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
124{
125 int ret;
126
127 __asm__ __volatile__ (
128 " .align 2 \n\t"
129 " mova 1f, r0 \n\t"
130 " nop \n\t"
131 " mov r15, r1 \n\t"
132 " mov #-8, r15 \n\t"
133 " mov.l @%1, %0 \n\t"
134 " cmp/eq %2, %0 \n\t"
135 " bf 1f \n\t"
136 " mov.l %3, @%1 \n\t"
137 "1: mov r1, r15 \n\t"
138 : "=&r" (ret)
139 : "r" (v), "r" (old), "r" (new)
140 : "memory" , "r0", "r1" , "t");
141
142 return ret;
143}
144
145static inline int atomic_add_unless(atomic_t *v, int a, int u)
146{
147 int ret;
148 unsigned long tmp;
149
150 __asm__ __volatile__ (
151 " .align 2 \n\t"
152 " mova 1f, r0 \n\t"
153 " nop \n\t"
154 " mov r15, r1 \n\t"
155 " mov #-12, r15 \n\t"
156 " mov.l @%2, %1 \n\t"
157 " mov %1, %0 \n\t"
158 " cmp/eq %4, %0 \n\t"
159 " bt/s 1f \n\t"
160 " add %3, %1 \n\t"
161 " mov.l %1, @%2 \n\t"
162 "1: mov r1, r15 \n\t"
163 : "=&r" (ret), "=&r" (tmp)
164 : "r" (v), "r" (a), "r" (u)
165 : "memory" , "r0", "r1" , "t");
166
167 return ret != u;
168}
169#endif /* __ASM_SH_ATOMIC_GRB_H */ 123#endif /* __ASM_SH_ATOMIC_GRB_H */
diff --git a/arch/sh/include/asm/atomic-llsc.h b/arch/sh/include/asm/atomic-llsc.h
index b040e1e08610..4b00b78e3f4f 100644
--- a/arch/sh/include/asm/atomic-llsc.h
+++ b/arch/sh/include/asm/atomic-llsc.h
@@ -104,31 +104,4 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
104 : "t"); 104 : "t");
105} 105}
106 106
107#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
108
109/**
110 * atomic_add_unless - add unless the number is a given value
111 * @v: pointer of type atomic_t
112 * @a: the amount to add to v...
113 * @u: ...unless v is equal to u.
114 *
115 * Atomically adds @a to @v, so long as it was not @u.
116 * Returns non-zero if @v was not @u, and zero otherwise.
117 */
118static inline int atomic_add_unless(atomic_t *v, int a, int u)
119{
120 int c, old;
121 c = atomic_read(v);
122 for (;;) {
123 if (unlikely(c == (u)))
124 break;
125 old = atomic_cmpxchg((v), c, c + (a));
126 if (likely(old == c))
127 break;
128 c = old;
129 }
130
131 return c != (u);
132}
133
134#endif /* __ASM_SH_ATOMIC_LLSC_H */ 107#endif /* __ASM_SH_ATOMIC_LLSC_H */
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index b16388d71954..275a448ae8c2 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -25,58 +25,43 @@
25#endif 25#endif
26 26
27#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) 27#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
28#define atomic_dec_return(v) atomic_sub_return(1, (v))
29#define atomic_inc_return(v) atomic_add_return(1, (v))
30#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
31#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
32#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
33#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
28 34
29#define atomic_dec_return(v) atomic_sub_return(1,(v)) 35#define atomic_inc(v) atomic_add(1, (v))
30#define atomic_inc_return(v) atomic_add_return(1,(v)) 36#define atomic_dec(v) atomic_sub(1, (v))
31 37
32/* 38#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
33 * atomic_inc_and_test - increment and test 39#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
40
41/**
42 * atomic_add_unless - add unless the number is a given value
34 * @v: pointer of type atomic_t 43 * @v: pointer of type atomic_t
44 * @a: the amount to add to v...
45 * @u: ...unless v is equal to u.
35 * 46 *
36 * Atomically increments @v by 1 47 * Atomically adds @a to @v, so long as it was not @u.
37 * and returns true if the result is zero, or false for all 48 * Returns non-zero if @v was not @u, and zero otherwise.
38 * other cases.
39 */ 49 */
40#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
41
42#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
43#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
44
45#define atomic_inc(v) atomic_add(1,(v))
46#define atomic_dec(v) atomic_sub(1,(v))
47
48#if !defined(CONFIG_GUSA_RB) && !defined(CONFIG_CPU_SH4A)
49static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
50{
51 int ret;
52 unsigned long flags;
53
54 local_irq_save(flags);
55 ret = v->counter;
56 if (likely(ret == old))
57 v->counter = new;
58 local_irq_restore(flags);
59
60 return ret;
61}
62
63static inline int atomic_add_unless(atomic_t *v, int a, int u) 50static inline int atomic_add_unless(atomic_t *v, int a, int u)
64{ 51{
65 int ret; 52 int c, old;
66 unsigned long flags; 53 c = atomic_read(v);
67 54 for (;;) {
68 local_irq_save(flags); 55 if (unlikely(c == (u)))
69 ret = v->counter; 56 break;
70 if (ret != u) 57 old = atomic_cmpxchg((v), c, c + (a));
71 v->counter += a; 58 if (likely(old == c))
72 local_irq_restore(flags); 59 break;
73 60 c = old;
74 return ret != u; 61 }
62
63 return c != (u);
75} 64}
76#endif /* !CONFIG_GUSA_RB && !CONFIG_CPU_SH4A */
77
78#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
79#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
80 65
81#define smp_mb__before_atomic_dec() smp_mb() 66#define smp_mb__before_atomic_dec() smp_mb()
82#define smp_mb__after_atomic_dec() smp_mb() 67#define smp_mb__after_atomic_dec() smp_mb()
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h
index dda96eb3e7c0..da3ebec921a7 100644
--- a/arch/sh/include/asm/cacheflush.h
+++ b/arch/sh/include/asm/cacheflush.h
@@ -63,6 +63,14 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
63 if (boot_cpu_data.dcache.n_aliases && PageAnon(page)) 63 if (boot_cpu_data.dcache.n_aliases && PageAnon(page))
64 __flush_anon_page(page, vmaddr); 64 __flush_anon_page(page, vmaddr);
65} 65}
66static inline void flush_kernel_vmap_range(void *addr, int size)
67{
68 __flush_wback_region(addr, size);
69}
70static inline void invalidate_kernel_vmap_range(void *addr, int size)
71{
72 __flush_invalidate_region(addr, size);
73}
66 74
67#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE 75#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
68static inline void flush_kernel_dcache_page(struct page *page) 76static inline void flush_kernel_dcache_page(struct page *page)
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index 9fe7d7f8af40..11da4c5beb68 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -146,8 +146,17 @@ int sh_clk_mstp32_register(struct clk *clks, int nr);
146 .flags = _flags, \ 146 .flags = _flags, \
147} 147}
148 148
149struct clk_div4_table {
150 struct clk_div_mult_table *div_mult_table;
151 void (*kick)(struct clk *clk);
152};
153
149int sh_clk_div4_register(struct clk *clks, int nr, 154int sh_clk_div4_register(struct clk *clks, int nr,
150 struct clk_div_mult_table *table); 155 struct clk_div4_table *table);
156int sh_clk_div4_enable_register(struct clk *clks, int nr,
157 struct clk_div4_table *table);
158int sh_clk_div4_reparent_register(struct clk *clks, int nr,
159 struct clk_div4_table *table);
151 160
152#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \ 161#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \
153{ \ 162{ \
diff --git a/arch/sh/include/asm/cmpxchg-grb.h b/arch/sh/include/asm/cmpxchg-grb.h
index e2681abe764f..4676bf57693a 100644
--- a/arch/sh/include/asm/cmpxchg-grb.h
+++ b/arch/sh/include/asm/cmpxchg-grb.h
@@ -57,11 +57,10 @@ static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
57 " mov.l @%1, %0 \n\t" /* load old value */ 57 " mov.l @%1, %0 \n\t" /* load old value */
58 " cmp/eq %0, %2 \n\t" 58 " cmp/eq %0, %2 \n\t"
59 " bf 1f \n\t" /* if not equal */ 59 " bf 1f \n\t" /* if not equal */
60 " mov.l %2, @%1 \n\t" /* store new value */ 60 " mov.l %3, @%1 \n\t" /* store new value */
61 "1: mov r1, r15 \n\t" /* LOGOUT */ 61 "1: mov r1, r15 \n\t" /* LOGOUT */
62 : "=&r" (retval), 62 : "=&r" (retval)
63 "+r" (m) 63 : "r" (m), "r" (old), "r" (new)
64 : "r" (new)
65 : "memory" , "r0", "r1", "t"); 64 : "memory" , "r0", "r1", "t");
66 65
67 return retval; 66 return retval;
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
index 87ced133a363..bea3337a426a 100644
--- a/arch/sh/include/asm/dma-mapping.h
+++ b/arch/sh/include/asm/dma-mapping.h
@@ -89,8 +89,6 @@ static inline void dma_free_coherent(struct device *dev, size_t size,
89{ 89{
90 struct dma_map_ops *ops = get_dma_ops(dev); 90 struct dma_map_ops *ops = get_dma_ops(dev);
91 91
92 WARN_ON(irqs_disabled()); /* for portability */
93
94 if (dma_release_from_coherent(dev, get_order(size), vaddr)) 92 if (dma_release_from_coherent(dev, get_order(size), vaddr))
95 return; 93 return;
96 94
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
index 78eed3e0bdf5..e934a2e66651 100644
--- a/arch/sh/include/asm/dma-sh.h
+++ b/arch/sh/include/asm/dma-sh.h
@@ -20,14 +20,14 @@
20 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 20 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
21 defined(CONFIG_CPU_SUBTYPE_SH7785) 21 defined(CONFIG_CPU_SUBTYPE_SH7785)
22#define dmaor_read_reg(n) \ 22#define dmaor_read_reg(n) \
23 (n ? ctrl_inw(SH_DMAC_BASE1 + DMAOR) \ 23 (n ? __raw_readw(SH_DMAC_BASE1 + DMAOR) \
24 : ctrl_inw(SH_DMAC_BASE0 + DMAOR)) 24 : __raw_readw(SH_DMAC_BASE0 + DMAOR))
25#define dmaor_write_reg(n, data) \ 25#define dmaor_write_reg(n, data) \
26 (n ? ctrl_outw(data, SH_DMAC_BASE1 + DMAOR) \ 26 (n ? __raw_writew(data, SH_DMAC_BASE1 + DMAOR) \
27 : ctrl_outw(data, SH_DMAC_BASE0 + DMAOR)) 27 : __raw_writew(data, SH_DMAC_BASE0 + DMAOR))
28#else /* Other CPU */ 28#else /* Other CPU */
29#define dmaor_read_reg(n) ctrl_inw(SH_DMAC_BASE0 + DMAOR) 29#define dmaor_read_reg(n) __raw_readw(SH_DMAC_BASE0 + DMAOR)
30#define dmaor_write_reg(n, data) ctrl_outw(data, SH_DMAC_BASE0 + DMAOR) 30#define dmaor_write_reg(n, data) __raw_writew(data, SH_DMAC_BASE0 + DMAOR)
31#endif 31#endif
32 32
33static int dmte_irq_map[] __maybe_unused = { 33static int dmte_irq_map[] __maybe_unused = {
@@ -64,8 +64,10 @@ static int dmte_irq_map[] __maybe_unused = {
64#define ACK_L 0x00010000 64#define ACK_L 0x00010000
65#define DM_INC 0x00004000 65#define DM_INC 0x00004000
66#define DM_DEC 0x00008000 66#define DM_DEC 0x00008000
67#define DM_FIX 0x0000c000
67#define SM_INC 0x00001000 68#define SM_INC 0x00001000
68#define SM_DEC 0x00002000 69#define SM_DEC 0x00002000
70#define SM_FIX 0x00003000
69#define RS_IN 0x00000200 71#define RS_IN 0x00000200
70#define RS_OUT 0x00000300 72#define RS_OUT 0x00000300
71#define TS_BLK 0x00000040 73#define TS_BLK 0x00000040
@@ -83,7 +85,7 @@ static int dmte_irq_map[] __maybe_unused = {
83 * Define the default configuration for dual address memory-memory transfer. 85 * Define the default configuration for dual address memory-memory transfer.
84 * The 0x400 value represents auto-request, external->external. 86 * The 0x400 value represents auto-request, external->external.
85 */ 87 */
86#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32) 88#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_INDEX2VAL(XMIT_SZ_32BIT))
87 89
88/* DMA base address */ 90/* DMA base address */
89static u32 dma_base_addr[] __maybe_unused = { 91static u32 dma_base_addr[] __maybe_unused = {
@@ -123,10 +125,47 @@ static u32 dma_base_addr[] __maybe_unused = {
123 */ 125 */
124#define SHDMA_MIX_IRQ (1 << 1) 126#define SHDMA_MIX_IRQ (1 << 1)
125#define SHDMA_DMAOR1 (1 << 2) 127#define SHDMA_DMAOR1 (1 << 2)
126#define SHDMA_DMAE1 (1 << 3) 128#define SHDMA_DMAE1 (1 << 3)
129
130enum sh_dmae_slave_chan_id {
131 SHDMA_SLAVE_SCIF0_TX,
132 SHDMA_SLAVE_SCIF0_RX,
133 SHDMA_SLAVE_SCIF1_TX,
134 SHDMA_SLAVE_SCIF1_RX,
135 SHDMA_SLAVE_SCIF2_TX,
136 SHDMA_SLAVE_SCIF2_RX,
137 SHDMA_SLAVE_SCIF3_TX,
138 SHDMA_SLAVE_SCIF3_RX,
139 SHDMA_SLAVE_SCIF4_TX,
140 SHDMA_SLAVE_SCIF4_RX,
141 SHDMA_SLAVE_SCIF5_TX,
142 SHDMA_SLAVE_SCIF5_RX,
143 SHDMA_SLAVE_SIUA_TX,
144 SHDMA_SLAVE_SIUA_RX,
145 SHDMA_SLAVE_SIUB_TX,
146 SHDMA_SLAVE_SIUB_RX,
147 SHDMA_SLAVE_NUMBER, /* Must stay last */
148};
149
150struct sh_dmae_slave_config {
151 enum sh_dmae_slave_chan_id slave_id;
152 dma_addr_t addr;
153 u32 chcr;
154 char mid_rid;
155};
127 156
128struct sh_dmae_pdata { 157struct sh_dmae_pdata {
129 unsigned int mode; 158 unsigned int mode;
159 struct sh_dmae_slave_config *config;
160 int config_num;
161};
162
163struct device;
164
165struct sh_dmae_slave {
166 enum sh_dmae_slave_chan_id slave_id; /* Set by the platform */
167 struct device *dma_dev; /* Set by the platform */
168 struct sh_dmae_slave_config *config; /* Set by the driver */
130}; 169};
131 170
132#endif /* __DMA_SH_H */ 171#endif /* __DMA_SH_H */
diff --git a/arch/sh/include/asm/dwarf.h b/arch/sh/include/asm/dwarf.h
index bdccbbfdc0bd..d62abd1d0c05 100644
--- a/arch/sh/include/asm/dwarf.h
+++ b/arch/sh/include/asm/dwarf.h
@@ -243,16 +243,13 @@ struct dwarf_cie {
243 243
244 unsigned long cie_pointer; 244 unsigned long cie_pointer;
245 245
246 struct list_head link;
247
248 unsigned long flags; 246 unsigned long flags;
249#define DWARF_CIE_Z_AUGMENTATION (1 << 0) 247#define DWARF_CIE_Z_AUGMENTATION (1 << 0)
250 248
251 /* 249 /* linked-list entry if this CIE is from a module */
252 * 'mod' will be non-NULL if this CIE came from a module's 250 struct list_head link;
253 * .eh_frame section. 251
254 */ 252 struct rb_node node;
255 struct module *mod;
256}; 253};
257 254
258/** 255/**
@@ -266,13 +263,11 @@ struct dwarf_fde {
266 unsigned long address_range; 263 unsigned long address_range;
267 unsigned char *instructions; 264 unsigned char *instructions;
268 unsigned char *end; 265 unsigned char *end;
266
267 /* linked-list entry if this FDE is from a module */
269 struct list_head link; 268 struct list_head link;
270 269
271 /* 270 struct rb_node node;
272 * 'mod' will be non-NULL if this FDE came from a module's
273 * .eh_frame section.
274 */
275 struct module *mod;
276}; 271};
277 272
278/** 273/**
diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h
index 5ac1e40a511c..6e7cea453895 100644
--- a/arch/sh/include/asm/fixmap.h
+++ b/arch/sh/include/asm/fixmap.h
@@ -55,16 +55,29 @@ enum fixed_addresses {
55#define FIX_N_COLOURS 8 55#define FIX_N_COLOURS 8
56 FIX_CMAP_BEGIN, 56 FIX_CMAP_BEGIN,
57 FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS) - 1, 57 FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS) - 1,
58 FIX_UNCACHED, 58
59#ifdef CONFIG_HIGHMEM 59#ifdef CONFIG_HIGHMEM
60 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ 60 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
61 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, 61 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
62#endif 62#endif
63
64#ifdef CONFIG_IOREMAP_FIXED
65 /*
66 * FIX_IOREMAP entries are useful for mapping physical address
67 * space before ioremap() is useable, e.g. really early in boot
68 * before kmalloc() is working.
69 */
70#define FIX_N_IOREMAPS 32
71 FIX_IOREMAP_BEGIN,
72 FIX_IOREMAP_END = FIX_IOREMAP_BEGIN + FIX_N_IOREMAPS,
73#endif
74
63 __end_of_fixed_addresses 75 __end_of_fixed_addresses
64}; 76};
65 77
66extern void __set_fixmap(enum fixed_addresses idx, 78extern void __set_fixmap(enum fixed_addresses idx,
67 unsigned long phys, pgprot_t flags); 79 unsigned long phys, pgprot_t flags);
80extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags);
68 81
69#define set_fixmap(idx, phys) \ 82#define set_fixmap(idx, phys) \
70 __set_fixmap(idx, phys, PAGE_KERNEL) 83 __set_fixmap(idx, phys, PAGE_KERNEL)
diff --git a/arch/sh/include/asm/fpu.h b/arch/sh/include/asm/fpu.h
index fb6bbb9b1cc8..06c4281aab65 100644
--- a/arch/sh/include/asm/fpu.h
+++ b/arch/sh/include/asm/fpu.h
@@ -2,8 +2,8 @@
2#define __ASM_SH_FPU_H 2#define __ASM_SH_FPU_H
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5#include <linux/preempt.h> 5
6#include <asm/ptrace.h> 6struct task_struct;
7 7
8#ifdef CONFIG_SH_FPU 8#ifdef CONFIG_SH_FPU
9static inline void release_fpu(struct pt_regs *regs) 9static inline void release_fpu(struct pt_regs *regs)
@@ -16,22 +16,23 @@ static inline void grab_fpu(struct pt_regs *regs)
16 regs->sr &= ~SR_FD; 16 regs->sr &= ~SR_FD;
17} 17}
18 18
19struct task_struct;
20
21extern void save_fpu(struct task_struct *__tsk); 19extern void save_fpu(struct task_struct *__tsk);
22void fpu_state_restore(struct pt_regs *regs); 20extern void restore_fpu(struct task_struct *__tsk);
21extern void fpu_state_restore(struct pt_regs *regs);
22extern void __fpu_state_restore(void);
23#else 23#else
24 24#define save_fpu(tsk) do { } while (0)
25#define save_fpu(tsk) do { } while (0) 25#define restore_fpu(tsk) do { } while (0)
26#define release_fpu(regs) do { } while (0) 26#define release_fpu(regs) do { } while (0)
27#define grab_fpu(regs) do { } while (0) 27#define grab_fpu(regs) do { } while (0)
28#define fpu_state_restore(regs) do { } while (0) 28#define fpu_state_restore(regs) do { } while (0)
29 29#define __fpu_state_restore(regs) do { } while (0)
30#endif 30#endif
31 31
32struct user_regset; 32struct user_regset;
33 33
34extern int do_fpu_inst(unsigned short, struct pt_regs *); 34extern int do_fpu_inst(unsigned short, struct pt_regs *);
35extern int init_fpu(struct task_struct *);
35 36
36extern int fpregs_get(struct task_struct *target, 37extern int fpregs_get(struct task_struct *target,
37 const struct user_regset *regset, 38 const struct user_regset *regset,
@@ -65,18 +66,6 @@ static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs)
65 preempt_enable(); 66 preempt_enable();
66} 67}
67 68
68static inline int init_fpu(struct task_struct *tsk)
69{
70 if (tsk_used_math(tsk)) {
71 if ((boot_cpu_data.flags & CPU_HAS_FPU) && tsk == current)
72 unlazy_fpu(tsk, task_pt_regs(tsk));
73 return 0;
74 }
75
76 set_stopped_child_used_math(tsk);
77 return 0;
78}
79
80#endif /* __ASSEMBLY__ */ 69#endif /* __ASSEMBLY__ */
81 70
82#endif /* __ASM_SH_FPU_H */ 71#endif /* __ASM_SH_FPU_H */
diff --git a/arch/sh/include/asm/hw_breakpoint.h b/arch/sh/include/asm/hw_breakpoint.h
new file mode 100644
index 000000000000..965dd780d51b
--- /dev/null
+++ b/arch/sh/include/asm/hw_breakpoint.h
@@ -0,0 +1,67 @@
1#ifndef __ASM_SH_HW_BREAKPOINT_H
2#define __ASM_SH_HW_BREAKPOINT_H
3
4#ifdef __KERNEL__
5#define __ARCH_HW_BREAKPOINT_H
6
7#include <linux/kdebug.h>
8#include <linux/types.h>
9
10struct arch_hw_breakpoint {
11 char *name; /* Contains name of the symbol to set bkpt */
12 unsigned long address;
13 u16 len;
14 u16 type;
15};
16
17enum {
18 SH_BREAKPOINT_READ = (1 << 1),
19 SH_BREAKPOINT_WRITE = (1 << 2),
20 SH_BREAKPOINT_RW = SH_BREAKPOINT_READ | SH_BREAKPOINT_WRITE,
21
22 SH_BREAKPOINT_LEN_1 = (1 << 12),
23 SH_BREAKPOINT_LEN_2 = (1 << 13),
24 SH_BREAKPOINT_LEN_4 = SH_BREAKPOINT_LEN_1 | SH_BREAKPOINT_LEN_2,
25 SH_BREAKPOINT_LEN_8 = (1 << 14),
26};
27
28struct sh_ubc {
29 const char *name;
30 unsigned int num_events;
31 unsigned int trap_nr;
32 void (*enable)(struct arch_hw_breakpoint *, int);
33 void (*disable)(struct arch_hw_breakpoint *, int);
34 void (*enable_all)(unsigned long);
35 void (*disable_all)(void);
36 unsigned long (*active_mask)(void);
37 unsigned long (*triggered_mask)(void);
38 void (*clear_triggered_mask)(unsigned long);
39 struct clk *clk; /* optional interface clock / MSTP bit */
40};
41
42struct perf_event;
43struct task_struct;
44struct pmu;
45
46/* Maximum number of UBC channels */
47#define HBP_NUM 2
48
49/* arch/sh/kernel/hw_breakpoint.c */
50extern int arch_check_va_in_userspace(unsigned long va, u16 hbp_len);
51extern int arch_validate_hwbkpt_settings(struct perf_event *bp,
52 struct task_struct *tsk);
53extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
54 unsigned long val, void *data);
55
56int arch_install_hw_breakpoint(struct perf_event *bp);
57void arch_uninstall_hw_breakpoint(struct perf_event *bp);
58void hw_breakpoint_pmu_read(struct perf_event *bp);
59void hw_breakpoint_pmu_unthrottle(struct perf_event *bp);
60
61extern void arch_fill_perf_breakpoint(struct perf_event *bp);
62extern int register_sh_ubc(struct sh_ubc *);
63
64extern struct pmu perf_ops_bp;
65
66#endif /* __KERNEL__ */
67#endif /* __ASM_SH_HW_BREAKPOINT_H */
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 026dd659a640..7dab7b23a5ec 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -22,6 +22,7 @@
22 * for old compat code for I/O offseting to SuperIOs, all of which are 22 * for old compat code for I/O offseting to SuperIOs, all of which are
23 * better handled through the machvec ioport mapping routines these days. 23 * better handled through the machvec ioport mapping routines these days.
24 */ 24 */
25#include <linux/errno.h>
25#include <asm/cache.h> 26#include <asm/cache.h>
26#include <asm/system.h> 27#include <asm/system.h>
27#include <asm/addrspace.h> 28#include <asm/addrspace.h>
@@ -79,16 +80,51 @@
79#define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) 80#define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
80#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); }) 81#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); })
81 82
82/* SuperH on-chip I/O functions */ 83/*
83#define ctrl_inb __raw_readb 84 * Legacy SuperH on-chip I/O functions
84#define ctrl_inw __raw_readw 85 *
85#define ctrl_inl __raw_readl 86 * These are all deprecated, all new (and especially cross-platform) code
86#define ctrl_inq __raw_readq 87 * should be using the __raw_xxx() routines directly.
88 */
89static inline u8 __deprecated ctrl_inb(unsigned long addr)
90{
91 return __raw_readb(addr);
92}
93
94static inline u16 __deprecated ctrl_inw(unsigned long addr)
95{
96 return __raw_readw(addr);
97}
98
99static inline u32 __deprecated ctrl_inl(unsigned long addr)
100{
101 return __raw_readl(addr);
102}
103
104static inline u64 __deprecated ctrl_inq(unsigned long addr)
105{
106 return __raw_readq(addr);
107}
108
109static inline void __deprecated ctrl_outb(u8 v, unsigned long addr)
110{
111 __raw_writeb(v, addr);
112}
113
114static inline void __deprecated ctrl_outw(u16 v, unsigned long addr)
115{
116 __raw_writew(v, addr);
117}
87 118
88#define ctrl_outb __raw_writeb 119static inline void __deprecated ctrl_outl(u32 v, unsigned long addr)
89#define ctrl_outw __raw_writew 120{
90#define ctrl_outl __raw_writel 121 __raw_writel(v, addr);
91#define ctrl_outq __raw_writeq 122}
123
124static inline void __deprecated ctrl_outq(u64 v, unsigned long addr)
125{
126 __raw_writeq(v, addr);
127}
92 128
93extern unsigned long generic_io_base; 129extern unsigned long generic_io_base;
94 130
@@ -97,6 +133,28 @@ static inline void ctrl_delay(void)
97 __raw_readw(generic_io_base); 133 __raw_readw(generic_io_base);
98} 134}
99 135
136#define __BUILD_UNCACHED_IO(bwlq, type) \
137static inline type read##bwlq##_uncached(unsigned long addr) \
138{ \
139 type ret; \
140 jump_to_uncached(); \
141 ret = __raw_read##bwlq(addr); \
142 back_to_cached(); \
143 return ret; \
144} \
145 \
146static inline void write##bwlq##_uncached(type v, unsigned long addr) \
147{ \
148 jump_to_uncached(); \
149 __raw_write##bwlq(v, addr); \
150 back_to_cached(); \
151}
152
153__BUILD_UNCACHED_IO(b, u8)
154__BUILD_UNCACHED_IO(w, u16)
155__BUILD_UNCACHED_IO(l, u32)
156__BUILD_UNCACHED_IO(q, u64)
157
100#define __BUILD_MEMORY_STRING(bwlq, type) \ 158#define __BUILD_MEMORY_STRING(bwlq, type) \
101 \ 159 \
102static inline void __raw_writes##bwlq(volatile void __iomem *mem, \ 160static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
@@ -234,28 +292,21 @@ unsigned long long poke_real_address_q(unsigned long long addr,
234 */ 292 */
235#ifdef CONFIG_MMU 293#ifdef CONFIG_MMU
236void __iomem *__ioremap_caller(unsigned long offset, unsigned long size, 294void __iomem *__ioremap_caller(unsigned long offset, unsigned long size,
237 unsigned long flags, void *caller); 295 pgprot_t prot, void *caller);
238void __iounmap(void __iomem *addr); 296void __iounmap(void __iomem *addr);
239 297
240static inline void __iomem * 298static inline void __iomem *
241__ioremap(unsigned long offset, unsigned long size, unsigned long flags) 299__ioremap(unsigned long offset, unsigned long size, pgprot_t prot)
242{ 300{
243 return __ioremap_caller(offset, size, flags, __builtin_return_address(0)); 301 return __ioremap_caller(offset, size, prot, __builtin_return_address(0));
244} 302}
245 303
246static inline void __iomem * 304static inline void __iomem *
247__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) 305__ioremap_29bit(unsigned long offset, unsigned long size, pgprot_t prot)
248{ 306{
249#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB) 307#ifdef CONFIG_29BIT
250 unsigned long last_addr = offset + size - 1; 308 unsigned long last_addr = offset + size - 1;
251#endif
252 void __iomem *ret;
253 309
254 ret = __ioremap_trapped(offset, size);
255 if (ret)
256 return ret;
257
258#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB)
259 /* 310 /*
260 * For P1 and P2 space this is trivial, as everything is already 311 * For P1 and P2 space this is trivial, as everything is already
261 * mapped. Uncached access for P1 addresses are done through P2. 312 * mapped. Uncached access for P1 addresses are done through P2.
@@ -263,7 +314,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
263 * mapping must be done by the PMB or by using page tables. 314 * mapping must be done by the PMB or by using page tables.
264 */ 315 */
265 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { 316 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
266 if (unlikely(flags & _PAGE_CACHABLE)) 317 if (unlikely(pgprot_val(prot) & _PAGE_CACHABLE))
267 return (void __iomem *)P1SEGADDR(offset); 318 return (void __iomem *)P1SEGADDR(offset);
268 319
269 return (void __iomem *)P2SEGADDR(offset); 320 return (void __iomem *)P2SEGADDR(offset);
@@ -274,26 +325,70 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
274 return (void __iomem *)P4SEGADDR(offset); 325 return (void __iomem *)P4SEGADDR(offset);
275#endif 326#endif
276 327
277 return __ioremap(offset, size, flags); 328 return NULL;
329}
330
331static inline void __iomem *
332__ioremap_mode(unsigned long offset, unsigned long size, pgprot_t prot)
333{
334 void __iomem *ret;
335
336 ret = __ioremap_trapped(offset, size);
337 if (ret)
338 return ret;
339
340 ret = __ioremap_29bit(offset, size, prot);
341 if (ret)
342 return ret;
343
344 return __ioremap(offset, size, prot);
278} 345}
279#else 346#else
280#define __ioremap(offset, size, flags) ((void __iomem *)(offset)) 347#define __ioremap(offset, size, prot) ((void __iomem *)(offset))
281#define __ioremap_mode(offset, size, flags) ((void __iomem *)(offset)) 348#define __ioremap_mode(offset, size, prot) ((void __iomem *)(offset))
282#define __iounmap(addr) do { } while (0) 349#define __iounmap(addr) do { } while (0)
283#endif /* CONFIG_MMU */ 350#endif /* CONFIG_MMU */
284 351
285#define ioremap(offset, size) \ 352static inline void __iomem *
286 __ioremap_mode((offset), (size), 0) 353ioremap(unsigned long offset, unsigned long size)
287#define ioremap_nocache(offset, size) \ 354{
288 __ioremap_mode((offset), (size), 0) 355 return __ioremap_mode(offset, size, PAGE_KERNEL_NOCACHE);
289#define ioremap_cache(offset, size) \ 356}
290 __ioremap_mode((offset), (size), _PAGE_CACHABLE) 357
291#define p3_ioremap(offset, size, flags) \ 358static inline void __iomem *
292 __ioremap((offset), (size), (flags)) 359ioremap_cache(unsigned long offset, unsigned long size)
293#define ioremap_prot(offset, size, flags) \ 360{
294 __ioremap_mode((offset), (size), (flags)) 361 return __ioremap_mode(offset, size, PAGE_KERNEL);
295#define iounmap(addr) \ 362}
296 __iounmap((addr)) 363
364#ifdef CONFIG_HAVE_IOREMAP_PROT
365static inline void __iomem *
366ioremap_prot(resource_size_t offset, unsigned long size, unsigned long flags)
367{
368 return __ioremap_mode(offset, size, __pgprot(flags));
369}
370#endif
371
372#ifdef CONFIG_IOREMAP_FIXED
373extern void __iomem *ioremap_fixed(resource_size_t, unsigned long,
374 unsigned long, pgprot_t);
375extern int iounmap_fixed(void __iomem *);
376extern void ioremap_fixed_init(void);
377#else
378static inline void __iomem *
379ioremap_fixed(resource_size_t phys_addr, unsigned long offset,
380 unsigned long size, pgprot_t prot)
381{
382 BUG();
383 return NULL;
384}
385
386static inline void ioremap_fixed_init(void) { }
387static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; }
388#endif
389
390#define ioremap_nocache ioremap
391#define iounmap __iounmap
297 392
298#define maybebadio(port) \ 393#define maybebadio(port) \
299 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ 394 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
diff --git a/arch/sh/include/asm/kdebug.h b/arch/sh/include/asm/kdebug.h
index 985219f9759e..5f6d2e9ccb7c 100644
--- a/arch/sh/include/asm/kdebug.h
+++ b/arch/sh/include/asm/kdebug.h
@@ -6,6 +6,8 @@ enum die_val {
6 DIE_TRAP, 6 DIE_TRAP,
7 DIE_NMI, 7 DIE_NMI,
8 DIE_OOPS, 8 DIE_OOPS,
9 DIE_BREAKPOINT,
10 DIE_SSTEP,
9}; 11};
10 12
11#endif /* __ASM_SH_KDEBUG_H */ 13#endif /* __ASM_SH_KDEBUG_H */
diff --git a/arch/sh/include/asm/mmu.h b/arch/sh/include/asm/mmu.h
index c7426ad9926e..15a05b615ba7 100644
--- a/arch/sh/include/asm/mmu.h
+++ b/arch/sh/include/asm/mmu.h
@@ -11,7 +11,9 @@
11 11
12#define PMB_ADDR 0xf6100000 12#define PMB_ADDR 0xf6100000
13#define PMB_DATA 0xf7100000 13#define PMB_DATA 0xf7100000
14#define PMB_ENTRY_MAX 16 14
15#define NR_PMB_ENTRIES 16
16
15#define PMB_E_MASK 0x0000000f 17#define PMB_E_MASK 0x0000000f
16#define PMB_E_SHIFT 8 18#define PMB_E_SHIFT 8
17 19
@@ -25,11 +27,15 @@
25#define PMB_C 0x00000008 27#define PMB_C 0x00000008
26#define PMB_WT 0x00000001 28#define PMB_WT 0x00000001
27#define PMB_UB 0x00000200 29#define PMB_UB 0x00000200
30#define PMB_CACHE_MASK (PMB_C | PMB_WT | PMB_UB)
28#define PMB_V 0x00000100 31#define PMB_V 0x00000100
29 32
30#define PMB_NO_ENTRY (-1) 33#define PMB_NO_ENTRY (-1)
31 34
32#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
36#include <linux/errno.h>
37#include <linux/threads.h>
38#include <asm/page.h>
33 39
34/* Default "unsigned long" context */ 40/* Default "unsigned long" context */
35typedef unsigned long mm_context_id_t[NR_CPUS]; 41typedef unsigned long mm_context_id_t[NR_CPUS];
@@ -47,29 +53,30 @@ typedef struct {
47#endif 53#endif
48} mm_context_t; 54} mm_context_t;
49 55
50struct pmb_entry; 56#ifdef CONFIG_PMB
51
52struct pmb_entry {
53 unsigned long vpn;
54 unsigned long ppn;
55 unsigned long flags;
56
57 /*
58 * 0 .. NR_PMB_ENTRIES for specific entry selection, or
59 * PMB_NO_ENTRY to search for a free one
60 */
61 int entry;
62
63 struct pmb_entry *next;
64 /* Adjacent entry link for contiguous multi-entry mappings */
65 struct pmb_entry *link;
66};
67
68/* arch/sh/mm/pmb.c */ 57/* arch/sh/mm/pmb.c */
69long pmb_remap(unsigned long virt, unsigned long phys, 58long pmb_remap(unsigned long virt, unsigned long phys,
70 unsigned long size, unsigned long flags); 59 unsigned long size, pgprot_t prot);
71void pmb_unmap(unsigned long addr); 60void pmb_unmap(unsigned long addr);
72int pmb_init(void); 61void pmb_init(void);
62bool __in_29bit_mode(void);
63#else
64static inline long pmb_remap(unsigned long virt, unsigned long phys,
65 unsigned long size, pgprot_t prot)
66{
67 return -EINVAL;
68}
69
70#define pmb_unmap(addr) do { } while (0)
71#define pmb_init(addr) do { } while (0)
72
73#ifdef CONFIG_29BIT
74#define __in_29bit_mode() (1)
75#else
76#define __in_29bit_mode() (0)
77#endif
78
79#endif /* CONFIG_PMB */
73#endif /* __ASSEMBLY__ */ 80#endif /* __ASSEMBLY__ */
74 81
75#endif /* __MMU_H */ 82#endif /* __MMU_H */
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index 41080b173a7a..384c7471a374 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -158,7 +158,7 @@ static inline void enable_mmu(void)
158 unsigned int cpu = smp_processor_id(); 158 unsigned int cpu = smp_processor_id();
159 159
160 /* Enable MMU */ 160 /* Enable MMU */
161 ctrl_outl(MMU_CONTROL_INIT, MMUCR); 161 __raw_writel(MMU_CONTROL_INIT, MMUCR);
162 ctrl_barrier(); 162 ctrl_barrier();
163 163
164 if (asid_cache(cpu) == NO_CONTEXT) 164 if (asid_cache(cpu) == NO_CONTEXT)
@@ -171,9 +171,9 @@ static inline void disable_mmu(void)
171{ 171{
172 unsigned long cr; 172 unsigned long cr;
173 173
174 cr = ctrl_inl(MMUCR); 174 cr = __raw_readl(MMUCR);
175 cr &= ~MMU_CONTROL_INIT; 175 cr &= ~MMU_CONTROL_INIT;
176 ctrl_outl(cr, MMUCR); 176 __raw_writel(cr, MMUCR);
177 177
178 ctrl_barrier(); 178 ctrl_barrier();
179} 179}
diff --git a/arch/sh/include/asm/mmu_context_32.h b/arch/sh/include/asm/mmu_context_32.h
index 8ef800c549ab..10e2e17210d2 100644
--- a/arch/sh/include/asm/mmu_context_32.h
+++ b/arch/sh/include/asm/mmu_context_32.h
@@ -49,11 +49,11 @@ static inline unsigned long get_asid(void)
49/* MMU_TTB is used for optimizing the fault handling. */ 49/* MMU_TTB is used for optimizing the fault handling. */
50static inline void set_TTB(pgd_t *pgd) 50static inline void set_TTB(pgd_t *pgd)
51{ 51{
52 ctrl_outl((unsigned long)pgd, MMU_TTB); 52 __raw_writel((unsigned long)pgd, MMU_TTB);
53} 53}
54 54
55static inline pgd_t *get_TTB(void) 55static inline pgd_t *get_TTB(void)
56{ 56{
57 return (pgd_t *)ctrl_inl(MMU_TTB); 57 return (pgd_t *)__raw_readl(MMU_TTB);
58} 58}
59#endif /* __ASM_SH_MMU_CONTEXT_32_H */ 59#endif /* __ASM_SH_MMU_CONTEXT_32_H */
diff --git a/arch/sh/include/asm/module.h b/arch/sh/include/asm/module.h
index 068bf1659750..b7927de86f9f 100644
--- a/arch/sh/include/asm/module.h
+++ b/arch/sh/include/asm/module.h
@@ -1,7 +1,22 @@
1#ifndef _ASM_SH_MODULE_H 1#ifndef _ASM_SH_MODULE_H
2#define _ASM_SH_MODULE_H 2#define _ASM_SH_MODULE_H
3 3
4#include <asm-generic/module.h> 4struct mod_arch_specific {
5#ifdef CONFIG_DWARF_UNWINDER
6 struct list_head fde_list;
7 struct list_head cie_list;
8#endif
9};
10
11#ifdef CONFIG_64BIT
12#define Elf_Shdr Elf64_Shdr
13#define Elf_Sym Elf64_Sym
14#define Elf_Ehdr Elf64_Ehdr
15#else
16#define Elf_Shdr Elf32_Shdr
17#define Elf_Sym Elf32_Sym
18#define Elf_Ehdr Elf32_Ehdr
19#endif
5 20
6#ifdef CONFIG_CPU_LITTLE_ENDIAN 21#ifdef CONFIG_CPU_LITTLE_ENDIAN
7# ifdef CONFIG_CPU_SH2 22# ifdef CONFIG_CPU_SH2
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index 81bffc0d6860..d71feb359304 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -45,6 +45,7 @@
45#endif 45#endif
46 46
47#ifndef __ASSEMBLY__ 47#ifndef __ASSEMBLY__
48#include <asm/uncached.h>
48 49
49extern unsigned long shm_align_mask; 50extern unsigned long shm_align_mask;
50extern unsigned long max_low_pfn, min_low_pfn; 51extern unsigned long max_low_pfn, min_low_pfn;
@@ -56,7 +57,6 @@ pages_do_alias(unsigned long addr1, unsigned long addr2)
56 return (addr1 ^ addr2) & shm_align_mask; 57 return (addr1 ^ addr2) & shm_align_mask;
57} 58}
58 59
59
60#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) 60#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
61extern void copy_page(void *to, void *from); 61extern void copy_page(void *to, void *from);
62 62
@@ -88,7 +88,7 @@ typedef struct { unsigned long pgd; } pgd_t;
88#define __pte(x) ((pte_t) { (x) } ) 88#define __pte(x) ((pte_t) { (x) } )
89#else 89#else
90typedef struct { unsigned long long pte_low; } pte_t; 90typedef struct { unsigned long long pte_low; } pte_t;
91typedef struct { unsigned long pgprot; } pgprot_t; 91typedef struct { unsigned long long pgprot; } pgprot_t;
92typedef struct { unsigned long pgd; } pgd_t; 92typedef struct { unsigned long pgd; } pgd_t;
93#define pte_val(x) ((x).pte_low) 93#define pte_val(x) ((x).pte_low)
94#define __pte(x) ((pte_t) { (x) } ) 94#define __pte(x) ((pte_t) { (x) } )
@@ -127,12 +127,7 @@ typedef struct page *pgtable_t;
127 * is not visible (it is part of the PMB mapping) and so needs to be 127 * is not visible (it is part of the PMB mapping) and so needs to be
128 * added or subtracted as required. 128 * added or subtracted as required.
129 */ 129 */
130#if defined(CONFIG_PMB_FIXED) 130#ifdef CONFIG_PMB
131/* phys = virt - PAGE_OFFSET - (__MEMORY_START & 0xe0000000) */
132#define PMB_OFFSET (PAGE_OFFSET - PXSEG(__MEMORY_START))
133#define __pa(x) ((unsigned long)(x) - PMB_OFFSET)
134#define __va(x) ((void *)((unsigned long)(x) + PMB_OFFSET))
135#elif defined(CONFIG_32BIT)
136#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START) 131#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START)
137#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START)) 132#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START))
138#else 133#else
@@ -140,6 +135,14 @@ typedef struct page *pgtable_t;
140#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) 135#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
141#endif 136#endif
142 137
138#ifdef CONFIG_UNCACHED_MAPPING
139#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + uncached_start)
140#define CAC_ADDR(addr) ((addr) - uncached_start + PAGE_OFFSET)
141#else
142#define UNCAC_ADDR(addr) ((addr))
143#define CAC_ADDR(addr) ((addr))
144#endif
145
143#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 146#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
144#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 147#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
145 148
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 67f3999b544e..1042f7f0a48b 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -15,20 +15,49 @@
15 */ 15 */
16struct pci_channel { 16struct pci_channel {
17 struct pci_channel *next; 17 struct pci_channel *next;
18 struct pci_bus *bus;
18 19
19 struct pci_ops *pci_ops; 20 struct pci_ops *pci_ops;
20 struct resource *io_resource; 21
21 struct resource *mem_resource; 22 struct resource *resources;
23 unsigned int nr_resources;
22 24
23 unsigned long io_offset; 25 unsigned long io_offset;
24 unsigned long mem_offset; 26 unsigned long mem_offset;
25 27
26 unsigned long reg_base; 28 unsigned long reg_base;
27
28 unsigned long io_map_base; 29 unsigned long io_map_base;
30
31 unsigned int index;
32 unsigned int need_domain_info;
33
34 /* Optional error handling */
35 struct timer_list err_timer, serr_timer;
36 unsigned int err_irq, serr_irq;
29}; 37};
30 38
31extern void register_pci_controller(struct pci_channel *hose); 39/* arch/sh/drivers/pci/pci.c */
40extern int register_pci_controller(struct pci_channel *hose);
41extern void pcibios_report_status(unsigned int status_mask, int warn);
42
43/* arch/sh/drivers/pci/common.c */
44extern int early_read_config_byte(struct pci_channel *hose, int top_bus,
45 int bus, int devfn, int offset, u8 *value);
46extern int early_read_config_word(struct pci_channel *hose, int top_bus,
47 int bus, int devfn, int offset, u16 *value);
48extern int early_read_config_dword(struct pci_channel *hose, int top_bus,
49 int bus, int devfn, int offset, u32 *value);
50extern int early_write_config_byte(struct pci_channel *hose, int top_bus,
51 int bus, int devfn, int offset, u8 value);
52extern int early_write_config_word(struct pci_channel *hose, int top_bus,
53 int bus, int devfn, int offset, u16 value);
54extern int early_write_config_dword(struct pci_channel *hose, int top_bus,
55 int bus, int devfn, int offset, u32 value);
56extern void pcibios_enable_timers(struct pci_channel *hose);
57extern unsigned int pcibios_handle_status_errors(unsigned long addr,
58 unsigned int status, struct pci_channel *hose);
59extern int pci_is_66mhz_capable(struct pci_channel *hose,
60 int top_bus, int current_bus);
32 61
33extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM; 62extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM;
34 63
@@ -99,20 +128,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
99} 128}
100#endif 129#endif
101 130
102#ifdef CONFIG_SUPERH32
103/*
104 * If we're on an SH7751 or SH7780 PCI controller, PCI memory is mapped
105 * at the end of the address space in a special non-translatable area.
106 */
107#define PCI_MEM_FIXED_START 0xfd000000
108#define PCI_MEM_FIXED_END (PCI_MEM_FIXED_START + 0x01000000)
109
110#define is_pci_memory_fixed_range(s, e) \
111 ((s) >= PCI_MEM_FIXED_START && (e) < PCI_MEM_FIXED_END)
112#else
113#define is_pci_memory_fixed_range(s, e) (0)
114#endif
115
116/* Board-specific fixup routines. */ 131/* Board-specific fixup routines. */
117int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); 132int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
118 133
@@ -122,6 +137,14 @@ extern void pcibios_resource_to_bus(struct pci_dev *dev,
122extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 137extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
123 struct pci_bus_region *region); 138 struct pci_bus_region *region);
124 139
140#define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index
141
142static inline int pci_proc_domain(struct pci_bus *bus)
143{
144 struct pci_channel *hose = bus->sysdata;
145 return hose->need_domain_info;
146}
147
125/* Chances are this interrupt is wired PC-style ... */ 148/* Chances are this interrupt is wired PC-style ... */
126static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 149static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
127{ 150{
diff --git a/arch/sh/include/asm/pgalloc.h b/arch/sh/include/asm/pgalloc.h
index 63ca37bd9a95..8c00785c60d5 100644
--- a/arch/sh/include/asm/pgalloc.h
+++ b/arch/sh/include/asm/pgalloc.h
@@ -4,8 +4,16 @@
4#include <linux/quicklist.h> 4#include <linux/quicklist.h>
5#include <asm/page.h> 5#include <asm/page.h>
6 6
7#define QUICK_PGD 0 /* We preserve special mappings over free */ 7#define QUICK_PT 0 /* Other page table pages that are zero on free */
8#define QUICK_PT 1 /* Other page table pages that are zero on free */ 8
9extern pgd_t *pgd_alloc(struct mm_struct *);
10extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
11
12#if PAGETABLE_LEVELS > 2
13extern void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd);
14extern pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address);
15extern void pmd_free(struct mm_struct *mm, pmd_t *pmd);
16#endif
9 17
10static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, 18static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
11 pte_t *pte) 19 pte_t *pte)
@@ -20,28 +28,9 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
20} 28}
21#define pmd_pgtable(pmd) pmd_page(pmd) 29#define pmd_pgtable(pmd) pmd_page(pmd)
22 30
23static inline void pgd_ctor(void *x)
24{
25 pgd_t *pgd = x;
26
27 memcpy(pgd + USER_PTRS_PER_PGD,
28 swapper_pg_dir + USER_PTRS_PER_PGD,
29 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
30}
31
32/* 31/*
33 * Allocate and free page tables. 32 * Allocate and free page tables.
34 */ 33 */
35static inline pgd_t *pgd_alloc(struct mm_struct *mm)
36{
37 return quicklist_alloc(QUICK_PGD, GFP_KERNEL | __GFP_REPEAT, pgd_ctor);
38}
39
40static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
41{
42 quicklist_free(QUICK_PGD, NULL, pgd);
43}
44
45static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, 34static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
46 unsigned long address) 35 unsigned long address)
47{ 36{
@@ -81,7 +70,6 @@ do { \
81 70
82static inline void check_pgt_cache(void) 71static inline void check_pgt_cache(void)
83{ 72{
84 quicklist_trim(QUICK_PGD, NULL, 25, 16);
85 quicklist_trim(QUICK_PT, NULL, 25, 16); 73 quicklist_trim(QUICK_PT, NULL, 25, 16);
86} 74}
87 75
diff --git a/arch/sh/include/asm/pgtable-2level.h b/arch/sh/include/asm/pgtable-2level.h
new file mode 100644
index 000000000000..19bd89db17e7
--- /dev/null
+++ b/arch/sh/include/asm/pgtable-2level.h
@@ -0,0 +1,23 @@
1#ifndef __ASM_SH_PGTABLE_2LEVEL_H
2#define __ASM_SH_PGTABLE_2LEVEL_H
3
4#include <asm-generic/pgtable-nopmd.h>
5
6/*
7 * traditional two-level paging structure
8 */
9#define PAGETABLE_LEVELS 2
10
11/* PTE bits */
12#define PTE_MAGNITUDE 2 /* 32-bit PTEs */
13
14#define PTE_SHIFT PAGE_SHIFT
15#define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE)
16
17/* PGD bits */
18#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS)
19
20#define PTRS_PER_PGD (PAGE_SIZE / (1 << PTE_MAGNITUDE))
21#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
22
23#endif /* __ASM_SH_PGTABLE_2LEVEL_H */
diff --git a/arch/sh/include/asm/pgtable-3level.h b/arch/sh/include/asm/pgtable-3level.h
new file mode 100644
index 000000000000..249a985d9648
--- /dev/null
+++ b/arch/sh/include/asm/pgtable-3level.h
@@ -0,0 +1,56 @@
1#ifndef __ASM_SH_PGTABLE_3LEVEL_H
2#define __ASM_SH_PGTABLE_3LEVEL_H
3
4#include <asm-generic/pgtable-nopud.h>
5
6/*
7 * Some cores need a 3-level page table layout, for example when using
8 * 64-bit PTEs and 4K pages.
9 */
10#define PAGETABLE_LEVELS 3
11
12#define PTE_MAGNITUDE 3 /* 64-bit PTEs on SH-X2 TLB */
13
14/* PGD bits */
15#define PGDIR_SHIFT 30
16
17#define PTRS_PER_PGD 4
18#define USER_PTRS_PER_PGD 2
19
20/* PMD bits */
21#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - PTE_MAGNITUDE))
22#define PMD_SIZE (1UL << PMD_SHIFT)
23#define PMD_MASK (~(PMD_SIZE-1))
24
25#define PTRS_PER_PMD ((1 << PGDIR_SHIFT) / PMD_SIZE)
26
27#define pmd_ERROR(e) \
28 printk("%s:%d: bad pmd %016llx.\n", __FILE__, __LINE__, pmd_val(e))
29
30typedef struct { unsigned long long pmd; } pmd_t;
31#define pmd_val(x) ((x).pmd)
32#define __pmd(x) ((pmd_t) { (x) } )
33
34static inline unsigned long pud_page_vaddr(pud_t pud)
35{
36 return pud_val(pud);
37}
38
39#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
40static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
41{
42 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
43}
44
45#define pud_none(x) (!pud_val(x))
46#define pud_present(x) (pud_val(x))
47#define pud_clear(xp) do { set_pud(xp, __pud(0)); } while (0)
48#define pud_bad(x) (pud_val(x) & ~PAGE_MASK)
49
50/*
51 * (puds are folded into pgds so this doesn't get actually called,
52 * but the define is needed for a generic inline function.)
53 */
54#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
55
56#endif /* __ASM_SH_PGTABLE_3LEVEL_H */
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index ba3046e4f06f..02f77450cd8f 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -12,7 +12,11 @@
12#ifndef __ASM_SH_PGTABLE_H 12#ifndef __ASM_SH_PGTABLE_H
13#define __ASM_SH_PGTABLE_H 13#define __ASM_SH_PGTABLE_H
14 14
15#include <asm-generic/pgtable-nopmd.h> 15#ifdef CONFIG_X2TLB
16#include <asm/pgtable-3level.h>
17#else
18#include <asm/pgtable-2level.h>
19#endif
16#include <asm/page.h> 20#include <asm/page.h>
17 21
18#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
@@ -51,28 +55,12 @@ static inline unsigned long long neff_sign_extend(unsigned long val)
51#define NPHYS_SIGN (1LL << (NPHYS - 1)) 55#define NPHYS_SIGN (1LL << (NPHYS - 1))
52#define NPHYS_MASK (-1LL << NPHYS) 56#define NPHYS_MASK (-1LL << NPHYS)
53 57
54/*
55 * traditional two-level paging structure
56 */
57/* PTE bits */
58#if defined(CONFIG_X2TLB) || defined(CONFIG_SUPERH64)
59# define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */
60#else
61# define PTE_MAGNITUDE 2 /* 32-bit PTEs */
62#endif
63#define PTE_SHIFT PAGE_SHIFT
64#define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE)
65
66/* PGD bits */
67#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS)
68#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 58#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
69#define PGDIR_MASK (~(PGDIR_SIZE-1)) 59#define PGDIR_MASK (~(PGDIR_SIZE-1))
70 60
71/* Entries per level */ 61/* Entries per level */
72#define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE)) 62#define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE))
73#define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
74 63
75#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
76#define FIRST_USER_ADDRESS 0 64#define FIRST_USER_ADDRESS 0
77 65
78#define PHYS_ADDR_MASK29 0x1fffffff 66#define PHYS_ADDR_MASK29 0x1fffffff
@@ -153,9 +141,9 @@ typedef pte_t *pte_addr_t;
153#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) 141#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
154 142
155/* 143/*
156 * No page table caches to initialise 144 * Initialise the page table caches
157 */ 145 */
158#define pgtable_cache_init() do { } while (0) 146extern void pgtable_cache_init(void);
159 147
160struct vm_area_struct; 148struct vm_area_struct;
161 149
@@ -165,8 +153,9 @@ extern void __update_tlb(struct vm_area_struct *vma,
165 unsigned long address, pte_t pte); 153 unsigned long address, pte_t pte);
166 154
167static inline void 155static inline void
168update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte) 156update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
169{ 157{
158 pte_t pte = *ptep;
170 __update_cache(vma, address, pte); 159 __update_cache(vma, address, pte);
171 __update_tlb(vma, address, pte); 160 __update_tlb(vma, address, pte);
172} 161}
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h
index 5003ee86f67b..e172d696e52b 100644
--- a/arch/sh/include/asm/pgtable_32.h
+++ b/arch/sh/include/asm/pgtable_32.h
@@ -71,6 +71,8 @@
71#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ 71#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */
72#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ 72#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */
73 73
74#define _PAGE_EXT_WIRED 0x4000 /* software: Wire TLB entry */
75
74/* Wrapper for extended mode pgprot twiddling */ 76/* Wrapper for extended mode pgprot twiddling */
75#define _PAGE_EXT(x) ((unsigned long long)(x) << 32) 77#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
76 78
@@ -141,12 +143,14 @@ static inline unsigned long copy_ptea_attributes(unsigned long x)
141# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) 143# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
142# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3) 144# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3)
143# endif 145# endif
146# define _PAGE_WIRED (_PAGE_EXT(_PAGE_EXT_WIRED))
144#else 147#else
145# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 148# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
146# define _PAGE_SZHUGE (_PAGE_SZ1) 149# define _PAGE_SZHUGE (_PAGE_SZ1)
147# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) 150# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
148# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) 151# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
149# endif 152# endif
153# define _PAGE_WIRED (0)
150#endif 154#endif
151 155
152/* 156/*
diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h
index 17cdbecc3adc..0ee46776dad6 100644
--- a/arch/sh/include/asm/pgtable_64.h
+++ b/arch/sh/include/asm/pgtable_64.h
@@ -43,11 +43,6 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
43} 43}
44#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 44#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
45 45
46static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
47{
48 pmd_val(*pmdp) = (unsigned long) ptep;
49}
50
51/* 46/*
52 * PGD defines. Top level. 47 * PGD defines. Top level.
53 */ 48 */
@@ -128,8 +123,21 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
128#define _PAGE_DIRTY 0x400 /* software: page accessed in write */ 123#define _PAGE_DIRTY 0x400 /* software: page accessed in write */
129#define _PAGE_ACCESSED 0x800 /* software: page referenced */ 124#define _PAGE_ACCESSED 0x800 /* software: page referenced */
130 125
126/* Wrapper for extended mode pgprot twiddling */
127#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
128
129/*
130 * We can use the sign-extended bits in the PTEL to get 32 bits of
131 * software flags. This works for now because no implementations uses
132 * anything above the PPN field.
133 */
134#define _PAGE_WIRED _PAGE_EXT(0x001) /* software: wire the tlb entry */
135
136#define _PAGE_CLEAR_FLAGS (_PAGE_PRESENT | _PAGE_FILE | _PAGE_SHARED | \
137 _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_WIRED)
138
131/* Mask which drops software flags */ 139/* Mask which drops software flags */
132#define _PAGE_FLAGS_HARDWARE_MASK 0xfffffffffffff3dbLL 140#define _PAGE_FLAGS_HARDWARE_MASK (NEFF_MASK & ~(_PAGE_CLEAR_FLAGS))
133 141
134/* 142/*
135 * HugeTLB support 143 * HugeTLB support
@@ -203,12 +211,6 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
203#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) 211#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
204 212
205/* 213/*
206 * Handling allocation failures during page table setup.
207 */
208extern void __handle_bad_pmd_kernel(pmd_t * pmd);
209#define __handle_bad_pmd(x) __handle_bad_pmd_kernel(x)
210
211/*
212 * PTE level access routines. 214 * PTE level access routines.
213 * 215 *
214 * Note1: 216 * Note1:
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 017e0c1807b2..9605e062840f 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -98,13 +98,34 @@ extern struct sh_cpuinfo cpu_data[];
98 98
99/* Forward decl */ 99/* Forward decl */
100struct seq_operations; 100struct seq_operations;
101struct task_struct;
101 102
102extern struct pt_regs fake_swapper_regs; 103extern struct pt_regs fake_swapper_regs;
103 104
105/* arch/sh/kernel/process.c */
106extern unsigned int xstate_size;
107extern void free_thread_xstate(struct task_struct *);
108extern struct kmem_cache *task_xstate_cachep;
109
110/* arch/sh/mm/alignment.c */
111extern int get_unalign_ctl(struct task_struct *, unsigned long addr);
112extern int set_unalign_ctl(struct task_struct *, unsigned int val);
113
114#define GET_UNALIGN_CTL(tsk, addr) get_unalign_ctl((tsk), (addr))
115#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
116
117/* arch/sh/mm/init.c */
118extern unsigned int mem_init_done;
119
104/* arch/sh/kernel/setup.c */ 120/* arch/sh/kernel/setup.c */
105const char *get_cpu_subtype(struct sh_cpuinfo *c); 121const char *get_cpu_subtype(struct sh_cpuinfo *c);
106extern const struct seq_operations cpuinfo_op; 122extern const struct seq_operations cpuinfo_op;
107 123
124/* thread_struct flags */
125#define SH_THREAD_UAC_NOPRINT (1 << 0)
126#define SH_THREAD_UAC_SIGBUS (1 << 1)
127#define SH_THREAD_UAC_MASK (SH_THREAD_UAC_NOPRINT | SH_THREAD_UAC_SIGBUS)
128
108/* processor boot mode configuration */ 129/* processor boot mode configuration */
109#define MODE_PIN0 (1 << 0) 130#define MODE_PIN0 (1 << 0)
110#define MODE_PIN1 (1 << 1) 131#define MODE_PIN1 (1 << 1)
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 1f3d6fab660c..572b4eb09493 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -14,6 +14,7 @@
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/types.h> 15#include <asm/types.h>
16#include <asm/ptrace.h> 16#include <asm/ptrace.h>
17#include <asm/hw_breakpoint.h>
17 18
18/* 19/*
19 * Default implementation of macro that returns current 20 * Default implementation of macro that returns current
@@ -90,9 +91,9 @@ struct sh_fpu_soft_struct {
90 unsigned long entry_pc; 91 unsigned long entry_pc;
91}; 92};
92 93
93union sh_fpu_union { 94union thread_xstate {
94 struct sh_fpu_hard_struct hard; 95 struct sh_fpu_hard_struct hardfpu;
95 struct sh_fpu_soft_struct soft; 96 struct sh_fpu_soft_struct softfpu;
96}; 97};
97 98
98struct thread_struct { 99struct thread_struct {
@@ -100,38 +101,30 @@ struct thread_struct {
100 unsigned long sp; 101 unsigned long sp;
101 unsigned long pc; 102 unsigned long pc;
102 103
103 /* Hardware debugging registers */ 104 /* Various thread flags, see SH_THREAD_xxx */
104 unsigned long ubc_pc; 105 unsigned long flags;
105 106
106 /* floating point info */ 107 /* Save middle states of ptrace breakpoints */
107 union sh_fpu_union fpu; 108 struct perf_event *ptrace_bps[HBP_NUM];
108 109
109#ifdef CONFIG_SH_DSP 110#ifdef CONFIG_SH_DSP
110 /* Dsp status information */ 111 /* Dsp status information */
111 struct sh_dsp_struct dsp_status; 112 struct sh_dsp_struct dsp_status;
112#endif 113#endif
113};
114 114
115/* Count of active tasks with UBC settings */ 115 /* Extended processor state */
116extern int ubc_usercnt; 116 union thread_xstate *xstate;
117};
117 118
118#define INIT_THREAD { \ 119#define INIT_THREAD { \
119 .sp = sizeof(init_stack) + (long) &init_stack, \ 120 .sp = sizeof(init_stack) + (long) &init_stack, \
121 .flags = 0, \
120} 122}
121 123
122/*
123 * Do necessary setup to start up a newly executed thread.
124 */
125#define start_thread(_regs, new_pc, new_sp) \
126 set_fs(USER_DS); \
127 _regs->pr = 0; \
128 _regs->sr = SR_FD; /* User mode. */ \
129 _regs->pc = new_pc; \
130 _regs->regs[15] = new_sp
131
132/* Forward declaration, a strange C thing */ 124/* Forward declaration, a strange C thing */
133struct task_struct; 125struct task_struct;
134struct mm_struct; 126
127extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp);
135 128
136/* Free all resources held by a thread. */ 129/* Free all resources held by a thread. */
137extern void release_thread(struct task_struct *); 130extern void release_thread(struct task_struct *);
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h
index 5727d31b0ccf..621bc4618c6b 100644
--- a/arch/sh/include/asm/processor_64.h
+++ b/arch/sh/include/asm/processor_64.h
@@ -87,26 +87,31 @@ struct sh_fpu_hard_struct {
87 /* long status; * software status information */ 87 /* long status; * software status information */
88}; 88};
89 89
90#if 0
91/* Dummy fpu emulator */ 90/* Dummy fpu emulator */
92struct sh_fpu_soft_struct { 91struct sh_fpu_soft_struct {
93 unsigned long long fp_regs[32]; 92 unsigned long fp_regs[64];
94 unsigned int fpscr; 93 unsigned int fpscr;
95 unsigned char lookahead; 94 unsigned char lookahead;
96 unsigned long entry_pc; 95 unsigned long entry_pc;
97}; 96};
98#endif
99 97
100union sh_fpu_union { 98union thread_xstate {
101 struct sh_fpu_hard_struct hard; 99 struct sh_fpu_hard_struct hardfpu;
102 /* 'hard' itself only produces 32 bit alignment, yet we need 100 struct sh_fpu_soft_struct softfpu;
103 to access it using 64 bit load/store as well. */ 101 /*
102 * The structure definitions only produce 32 bit alignment, yet we need
103 * to access them using 64 bit load/store as well.
104 */
104 unsigned long long alignment_dummy; 105 unsigned long long alignment_dummy;
105}; 106};
106 107
107struct thread_struct { 108struct thread_struct {
108 unsigned long sp; 109 unsigned long sp;
109 unsigned long pc; 110 unsigned long pc;
111
112 /* Various thread flags, see SH_THREAD_xxx */
113 unsigned long flags;
114
110 /* This stores the address of the pt_regs built during a context 115 /* This stores the address of the pt_regs built during a context
111 switch, or of the register save area built for a kernel mode 116 switch, or of the register save area built for a kernel mode
112 exception. It is used for backtracing the stack of a sleeping task 117 exception. It is used for backtracing the stack of a sleeping task
@@ -122,7 +127,7 @@ struct thread_struct {
122 /* Hardware debugging registers may come here */ 127 /* Hardware debugging registers may come here */
123 128
124 /* floating point info */ 129 /* floating point info */
125 union sh_fpu_union fpu; 130 union thread_xstate *xstate;
126}; 131};
127 132
128#define INIT_MMAP \ 133#define INIT_MMAP \
@@ -137,7 +142,7 @@ struct thread_struct {
137 .trap_no = 0, \ 142 .trap_no = 0, \
138 .error_code = 0, \ 143 .error_code = 0, \
139 .address = 0, \ 144 .address = 0, \
140 .fpu = { { { 0, } }, } \ 145 .flags = 0, \
141} 146}
142 147
143/* 148/*
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 1dc12cb44a2d..e11b14ea2c43 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -102,13 +102,15 @@ struct pt_dspregs {
102#define PTRACE_GETDSPREGS 55 /* DSP registers */ 102#define PTRACE_GETDSPREGS 55 /* DSP registers */
103#define PTRACE_SETDSPREGS 56 103#define PTRACE_SETDSPREGS 56
104 104
105#define PT_TEXT_END_ADDR 240 105#define PT_TEXT_END_ADDR 240
106#define PT_TEXT_ADDR 244 /* &(struct user)->start_code */ 106#define PT_TEXT_ADDR 244 /* &(struct user)->start_code */
107#define PT_DATA_ADDR 248 /* &(struct user)->start_data */ 107#define PT_DATA_ADDR 248 /* &(struct user)->start_data */
108#define PT_TEXT_LEN 252 108#define PT_TEXT_LEN 252
109 109
110#ifdef __KERNEL__ 110#ifdef __KERNEL__
111#include <asm/addrspace.h> 111#include <asm/addrspace.h>
112#include <asm/page.h>
113#include <asm/system.h>
112 114
113#define user_mode(regs) (((regs)->sr & 0x40000000)==0) 115#define user_mode(regs) (((regs)->sr & 0x40000000)==0)
114#define instruction_pointer(regs) ((unsigned long)(regs)->pc) 116#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
@@ -124,6 +126,12 @@ struct task_struct;
124extern void user_enable_single_step(struct task_struct *); 126extern void user_enable_single_step(struct task_struct *);
125extern void user_disable_single_step(struct task_struct *); 127extern void user_disable_single_step(struct task_struct *);
126 128
129struct perf_event;
130struct perf_sample_data;
131
132extern void ptrace_triggered(struct perf_event *bp, int nmi,
133 struct perf_sample_data *data, struct pt_regs *regs);
134
127#define task_pt_regs(task) \ 135#define task_pt_regs(task) \
128 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1) 136 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1)
129 137
@@ -131,10 +139,8 @@ static inline unsigned long profile_pc(struct pt_regs *regs)
131{ 139{
132 unsigned long pc = instruction_pointer(regs); 140 unsigned long pc = instruction_pointer(regs);
133 141
134#ifdef P2SEG 142 if (virt_addr_uncached(pc))
135 if (pc >= P2SEG && pc < P3SEG) 143 return CAC_ADDR(pc);
136 pc -= 0x20000000;
137#endif
138 144
139 return pc; 145 return pc;
140} 146}
diff --git a/arch/sh/include/asm/reboot.h b/arch/sh/include/asm/reboot.h
new file mode 100644
index 000000000000..b3da0c63fc3d
--- /dev/null
+++ b/arch/sh/include/asm/reboot.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_SH_REBOOT_H
2#define __ASM_SH_REBOOT_H
3
4#include <linux/kdebug.h>
5
6struct pt_regs;
7
8struct machine_ops {
9 void (*restart)(char *cmd);
10 void (*halt)(void);
11 void (*power_off)(void);
12 void (*shutdown)(void);
13 void (*crash_shutdown)(struct pt_regs *);
14};
15
16extern struct machine_ops machine_ops;
17
18/* arch/sh/kernel/machine_kexec.c */
19void native_machine_crash_shutdown(struct pt_regs *regs);
20
21#endif /* __ASM_SH_REBOOT_H */
diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h
index ce3743599b27..4758325bb24a 100644
--- a/arch/sh/include/asm/setup.h
+++ b/arch/sh/include/asm/setup.h
@@ -18,7 +18,6 @@
18/* ... */ 18/* ... */
19#define COMMAND_LINE ((char *) (PARAM+0x100)) 19#define COMMAND_LINE ((char *) (PARAM+0x100))
20 20
21int setup_early_printk(char *);
22void sh_mv_setup(void); 21void sh_mv_setup(void);
23 22
24#endif /* __KERNEL__ */ 23#endif /* __KERNEL__ */
diff --git a/arch/sh/include/asm/sh_bios.h b/arch/sh/include/asm/sh_bios.h
index d9c96d7cf6c7..95714c28422b 100644
--- a/arch/sh/include/asm/sh_bios.h
+++ b/arch/sh/include/asm/sh_bios.h
@@ -1,18 +1,27 @@
1#ifndef __ASM_SH_BIOS_H 1#ifndef __ASM_SH_BIOS_H
2#define __ASM_SH_BIOS_H 2#define __ASM_SH_BIOS_H
3 3
4#ifdef CONFIG_SH_STANDARD_BIOS
5
4/* 6/*
5 * Copyright (C) 2000 Greg Banks, Mitch Davis 7 * Copyright (C) 2000 Greg Banks, Mitch Davis
6 * C API to interface to the standard LinuxSH BIOS 8 * C API to interface to the standard LinuxSH BIOS
7 * usually from within the early stages of kernel boot. 9 * usually from within the early stages of kernel boot.
8 */ 10 */
9
10
11extern void sh_bios_console_write(const char *buf, unsigned int len); 11extern void sh_bios_console_write(const char *buf, unsigned int len);
12extern void sh_bios_char_out(char ch);
13extern void sh_bios_gdb_detach(void); 12extern void sh_bios_gdb_detach(void);
14 13
15extern void sh_bios_get_node_addr(unsigned char *node_addr); 14extern void sh_bios_get_node_addr(unsigned char *node_addr);
16extern void sh_bios_shutdown(unsigned int how); 15extern void sh_bios_shutdown(unsigned int how);
17 16
17extern void sh_bios_vbr_init(void);
18extern void sh_bios_vbr_reload(void);
19
20#else
21
22static inline void sh_bios_vbr_init(void) { }
23static inline void sh_bios_vbr_reload(void) { }
24
25#endif /* CONFIG_SH_STANDARD_BIOS */
26
18#endif /* __ASM_SH_BIOS_H */ 27#endif /* __ASM_SH_BIOS_H */
diff --git a/arch/sh/include/asm/siu.h b/arch/sh/include/asm/siu.h
new file mode 100644
index 000000000000..57565a3b551f
--- /dev/null
+++ b/arch/sh/include/asm/siu.h
@@ -0,0 +1,26 @@
1/*
2 * platform header for the SIU ASoC driver
3 *
4 * Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef ASM_SIU_H
12#define ASM_SIU_H
13
14#include <asm/dma-sh.h>
15
16struct device;
17
18struct siu_platform {
19 struct device *dma_dev;
20 enum sh_dmae_slave_chan_id dma_slave_tx_a;
21 enum sh_dmae_slave_chan_id dma_slave_rx_a;
22 enum sh_dmae_slave_chan_id dma_slave_tx_b;
23 enum sh_dmae_slave_chan_id dma_slave_rx_b;
24};
25
26#endif /* ASM_SIU_H */
diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h
index fe9c2a1ad047..64eb41a063e8 100644
--- a/arch/sh/include/asm/suspend.h
+++ b/arch/sh/include/asm/suspend.h
@@ -92,5 +92,6 @@ extern unsigned long sh_mobile_sleep_supported;
92#define SUSP_SH_USTANDBY (1 << 3) /* SH-Mobile U-standby mode */ 92#define SUSP_SH_USTANDBY (1 << 3) /* SH-Mobile U-standby mode */
93#define SUSP_SH_SF (1 << 4) /* Enable self-refresh */ 93#define SUSP_SH_SF (1 << 4) /* Enable self-refresh */
94#define SUSP_SH_MMU (1 << 5) /* Save/restore MMU and cache */ 94#define SUSP_SH_MMU (1 << 5) /* Save/restore MMU and cache */
95#define SUSP_SH_REGS (1 << 6) /* Save/restore registers */
95 96
96#endif /* _ASM_SH_SUSPEND_H */ 97#endif /* _ASM_SH_SUSPEND_H */
diff --git a/arch/sh/include/asm/syscall.h b/arch/sh/include/asm/syscall.h
index 6a381429ee9d..aa7777bdc370 100644
--- a/arch/sh/include/asm/syscall.h
+++ b/arch/sh/include/asm/syscall.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_SH_SYSCALL_H 1#ifndef __ASM_SH_SYSCALL_H
2#define __ASM_SH_SYSCALL_H 2#define __ASM_SH_SYSCALL_H
3 3
4extern const unsigned long sys_call_table[];
5
4#ifdef CONFIG_SUPERH32 6#ifdef CONFIG_SUPERH32
5# include "syscall_32.h" 7# include "syscall_32.h"
6#else 8#else
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index c15415b4b169..0bd7a17d5e1a 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -10,7 +10,6 @@
10#include <linux/compiler.h> 10#include <linux/compiler.h>
11#include <linux/linkage.h> 11#include <linux/linkage.h>
12#include <asm/types.h> 12#include <asm/types.h>
13#include <asm/ptrace.h>
14 13
15#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ 14#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
16 15
@@ -32,7 +31,7 @@
32#define mb() __asm__ __volatile__ ("synco": : :"memory") 31#define mb() __asm__ __volatile__ ("synco": : :"memory")
33#define rmb() mb() 32#define rmb() mb()
34#define wmb() __asm__ __volatile__ ("synco": : :"memory") 33#define wmb() __asm__ __volatile__ ("synco": : :"memory")
35#define ctrl_barrier() __icbi(0xa8000000) 34#define ctrl_barrier() __icbi(PAGE_OFFSET)
36#define read_barrier_depends() do { } while(0) 35#define read_barrier_depends() do { } while(0)
37#else 36#else
38#define mb() __asm__ __volatile__ ("": : :"memory") 37#define mb() __asm__ __volatile__ ("": : :"memory")
@@ -114,6 +113,8 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
114 (unsigned long)_n_, sizeof(*(ptr))); \ 113 (unsigned long)_n_, sizeof(*(ptr))); \
115 }) 114 })
116 115
116struct pt_regs;
117
117extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); 118extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
118void free_initmem(void); 119void free_initmem(void);
119void free_initrd_mem(unsigned long start, unsigned long end); 120void free_initrd_mem(unsigned long start, unsigned long end);
@@ -137,14 +138,14 @@ extern unsigned int instruction_size(unsigned int insn);
137#endif 138#endif
138 139
139extern unsigned long cached_to_uncached; 140extern unsigned long cached_to_uncached;
141extern unsigned long uncached_size;
140 142
141extern struct dentry *sh_debugfs_root; 143extern struct dentry *sh_debugfs_root;
142 144
143void per_cpu_trap_init(void); 145void per_cpu_trap_init(void);
144void default_idle(void); 146void default_idle(void);
145void cpu_idle_wait(void); 147void cpu_idle_wait(void);
146 148void stop_this_cpu(void *);
147asmlinkage void break_point_trap(void);
148 149
149#ifdef CONFIG_SUPERH32 150#ifdef CONFIG_SUPERH32
150#define BUILD_TRAP_HANDLER(name) \ 151#define BUILD_TRAP_HANDLER(name) \
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index 06814f5b59c7..51296b36770e 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -2,6 +2,7 @@
2#define __ASM_SH_SYSTEM_32_H 2#define __ASM_SH_SYSTEM_32_H
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <asm/mmu.h>
5 6
6#ifdef CONFIG_SH_DSP 7#ifdef CONFIG_SH_DSP
7 8
@@ -144,9 +145,6 @@ do { \
144 __restore_dsp(prev); \ 145 __restore_dsp(prev); \
145} while (0) 146} while (0)
146 147
147#define __uses_jump_to_uncached \
148 noinline __attribute__ ((__section__ (".uncached.text")))
149
150/* 148/*
151 * Jump to uncached area. 149 * Jump to uncached area.
152 * When handling TLB or caches, we need to do it from an uncached area. 150 * When handling TLB or caches, we need to do it from an uncached area.
@@ -216,6 +214,17 @@ static inline reg_size_t register_align(void *val)
216int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, 214int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
217 struct mem_access *ma, int); 215 struct mem_access *ma, int);
218 216
217static inline void trigger_address_error(void)
218{
219 if (__in_29bit_mode())
220 __asm__ __volatile__ (
221 "ldc %0, sr\n\t"
222 "mov.l @%1, %0"
223 :
224 : "r" (0x10000000), "r" (0x80000001)
225 );
226}
227
219asmlinkage void do_address_error(struct pt_regs *regs, 228asmlinkage void do_address_error(struct pt_regs *regs,
220 unsigned long writeaccess, 229 unsigned long writeaccess,
221 unsigned long address); 230 unsigned long address);
diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h
index ab1dd917ea87..36338646dfc8 100644
--- a/arch/sh/include/asm/system_64.h
+++ b/arch/sh/include/asm/system_64.h
@@ -18,6 +18,7 @@
18/* 18/*
19 * switch_to() should switch tasks to task nr n, first 19 * switch_to() should switch tasks to task nr n, first
20 */ 20 */
21struct thread_struct;
21struct task_struct *sh64_switch_to(struct task_struct *prev, 22struct task_struct *sh64_switch_to(struct task_struct *prev,
22 struct thread_struct *prev_thread, 23 struct thread_struct *prev_thread,
23 struct task_struct *next, 24 struct task_struct *next,
@@ -33,8 +34,6 @@ do { \
33 &next->thread); \ 34 &next->thread); \
34} while (0) 35} while (0)
35 36
36#define __uses_jump_to_uncached
37
38#define jump_to_uncached() do { } while (0) 37#define jump_to_uncached() do { } while (0)
39#define back_to_cached() do { } while (0) 38#define back_to_cached() do { } while (0)
40 39
@@ -48,6 +47,13 @@ static inline reg_size_t register_align(void *val)
48 return (unsigned long long)(signed long long)(signed long)val; 47 return (unsigned long long)(signed long long)(signed long)val;
49} 48}
50 49
50extern void phys_stext(void);
51
52static inline void trigger_address_error(void)
53{
54 phys_stext();
55}
56
51#define SR_BL_LL 0x0000000010000000LL 57#define SR_BL_LL 0x0000000010000000LL
52 58
53static inline void set_bl_bit(void) 59static inline void set_bl_bit(void)
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h
index 1f3d927e2265..55a36fef6875 100644
--- a/arch/sh/include/asm/thread_info.h
+++ b/arch/sh/include/asm/thread_info.h
@@ -93,14 +93,16 @@ static inline struct thread_info *current_thread_info(void)
93 93
94#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT) 94#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
95 95
96#else /* THREAD_SHIFT < PAGE_SHIFT */ 96#endif
97
98#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
99 97
100extern struct thread_info *alloc_thread_info(struct task_struct *tsk); 98extern struct thread_info *alloc_thread_info(struct task_struct *tsk);
101extern void free_thread_info(struct thread_info *ti); 99extern void free_thread_info(struct thread_info *ti);
100extern void arch_task_cache_init(void);
101#define arch_task_cache_init arch_task_cache_init
102extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
103extern void init_thread_xstate(void);
102 104
103#endif /* THREAD_SHIFT < PAGE_SHIFT */ 105#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
104 106
105#endif /* __ASSEMBLY__ */ 107#endif /* __ASSEMBLY__ */
106 108
diff --git a/arch/sh/include/asm/tlb.h b/arch/sh/include/asm/tlb.h
index da8fe7ab8728..75abb38dffd5 100644
--- a/arch/sh/include/asm/tlb.h
+++ b/arch/sh/include/asm/tlb.h
@@ -11,6 +11,7 @@
11#ifdef CONFIG_MMU 11#ifdef CONFIG_MMU
12#include <asm/pgalloc.h> 12#include <asm/pgalloc.h>
13#include <asm/tlbflush.h> 13#include <asm/tlbflush.h>
14#include <asm/mmu_context.h>
14 15
15/* 16/*
16 * TLB handling. This allows us to remove pages from the page 17 * TLB handling. This allows us to remove pages from the page
@@ -97,6 +98,22 @@ tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
97 98
98#define tlb_migrate_finish(mm) do { } while (0) 99#define tlb_migrate_finish(mm) do { } while (0)
99 100
101#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SUPERH64)
102extern void tlb_wire_entry(struct vm_area_struct *, unsigned long, pte_t);
103extern void tlb_unwire_entry(void);
104#else
105static inline void tlb_wire_entry(struct vm_area_struct *vma ,
106 unsigned long addr, pte_t pte)
107{
108 BUG();
109}
110
111static inline void tlb_unwire_entry(void)
112{
113 BUG();
114}
115#endif
116
100#else /* CONFIG_MMU */ 117#else /* CONFIG_MMU */
101 118
102#define tlb_start_vma(tlb, vma) do { } while (0) 119#define tlb_start_vma(tlb, vma) do { } while (0)
diff --git a/arch/sh/include/asm/ubc.h b/arch/sh/include/asm/ubc.h
deleted file mode 100644
index 9bf961684431..000000000000
--- a/arch/sh/include/asm/ubc.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * include/asm-sh/ubc.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#ifndef __ASM_SH_UBC_H
12#define __ASM_SH_UBC_H
13#ifdef __KERNEL__
14
15#include <cpu/ubc.h>
16
17/* User Break Controller */
18#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
19#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
20#else
21#define UBC_TYPE_SH7729 0
22#endif
23
24#define BAMR_ASID (1 << 2)
25#define BAMR_NONE 0
26#define BAMR_10 0x1
27#define BAMR_12 0x2
28#define BAMR_ALL 0x3
29#define BAMR_16 0x8
30#define BAMR_20 0x9
31
32#define BBR_INST (1 << 4)
33#define BBR_DATA (2 << 4)
34#define BBR_READ (1 << 2)
35#define BBR_WRITE (2 << 2)
36#define BBR_BYTE 0x1
37#define BBR_HALF 0x2
38#define BBR_LONG 0x3
39#define BBR_QUAD (1 << 6) /* SH7750 */
40#define BBR_CPU (1 << 6) /* SH7709A,SH7729 */
41#define BBR_DMA (2 << 6) /* SH7709A,SH7729 */
42
43#define BRCR_CMFA (1 << 15)
44#define BRCR_CMFB (1 << 14)
45
46#if defined CONFIG_CPU_SH2A
47#define BRCR_CMFCA (1 << 15)
48#define BRCR_CMFCB (1 << 14)
49#define BRCR_CMFDA (1 << 13)
50#define BRCR_CMFDB (1 << 12)
51#define BRCR_PCBB (1 << 6) /* 1: after execution */
52#define BRCR_PCBA (1 << 5) /* 1: after execution */
53#define BRCR_PCTE 0
54#else
55#define BRCR_PCTE (1 << 11)
56#define BRCR_PCBA (1 << 10) /* 1: after execution */
57#define BRCR_DBEB (1 << 7)
58#define BRCR_PCBB (1 << 6)
59#define BRCR_SEQ (1 << 3)
60#define BRCR_UBDE (1 << 0)
61#endif
62
63#endif /* __KERNEL__ */
64#endif /* __ASM_SH_UBC_H */
diff --git a/arch/sh/include/asm/uncached.h b/arch/sh/include/asm/uncached.h
new file mode 100644
index 000000000000..e3419f96626a
--- /dev/null
+++ b/arch/sh/include/asm/uncached.h
@@ -0,0 +1,18 @@
1#ifndef __ASM_SH_UNCACHED_H
2#define __ASM_SH_UNCACHED_H
3
4#include <linux/bug.h>
5
6#ifdef CONFIG_UNCACHED_MAPPING
7extern unsigned long uncached_start, uncached_end;
8
9extern int virt_addr_uncached(unsigned long kaddr);
10extern void uncached_init(void);
11extern void uncached_resize(unsigned long size);
12#else
13#define virt_addr_uncached(kaddr) (0)
14#define uncached_init() do { } while (0)
15#define uncached_resize(size) BUG()
16#endif
17
18#endif /* __ASM_SH_UNCACHED_H */
diff --git a/arch/sh/include/asm/vmlinux.lds.h b/arch/sh/include/asm/vmlinux.lds.h
index 244ec4ad9a79..d58ad493b3a6 100644
--- a/arch/sh/include/asm/vmlinux.lds.h
+++ b/arch/sh/include/asm/vmlinux.lds.h
@@ -14,4 +14,12 @@
14#define DWARF_EH_FRAME 14#define DWARF_EH_FRAME
15#endif 15#endif
16 16
17#ifdef CONFIG_SUPERH64
18#define EXTRA_TEXT \
19 *(.text64) \
20 *(.text..SHmedia32)
21#else
22#define EXTRA_TEXT
23#endif
24
17#endif /* __ASM_SH_VMLINUX_LDS_H */ 25#endif /* __ASM_SH_VMLINUX_LDS_H */
diff --git a/arch/sh/include/asm/watchdog.h b/arch/sh/include/asm/watchdog.h
index 19dfff5c8511..85a7aca7fb8f 100644
--- a/arch/sh/include/asm/watchdog.h
+++ b/arch/sh/include/asm/watchdog.h
@@ -70,7 +70,7 @@
70 */ 70 */
71static inline __u32 sh_wdt_read_cnt(void) 71static inline __u32 sh_wdt_read_cnt(void)
72{ 72{
73 return ctrl_inl(WTCNT_R); 73 return __raw_readl(WTCNT_R);
74} 74}
75 75
76/** 76/**
@@ -82,7 +82,7 @@ static inline __u32 sh_wdt_read_cnt(void)
82 */ 82 */
83static inline void sh_wdt_write_cnt(__u32 val) 83static inline void sh_wdt_write_cnt(__u32 val)
84{ 84{
85 ctrl_outl((WTCNT_HIGH << 24) | (__u32)val, WTCNT); 85 __raw_writel((WTCNT_HIGH << 24) | (__u32)val, WTCNT);
86} 86}
87 87
88/** 88/**
@@ -94,7 +94,7 @@ static inline void sh_wdt_write_cnt(__u32 val)
94 */ 94 */
95static inline void sh_wdt_write_bst(__u32 val) 95static inline void sh_wdt_write_bst(__u32 val)
96{ 96{
97 ctrl_outl((WTBST_HIGH << 24) | (__u32)val, WTBST); 97 __raw_writel((WTBST_HIGH << 24) | (__u32)val, WTBST);
98} 98}
99/** 99/**
100 * sh_wdt_read_csr - Read from Control/Status Register 100 * sh_wdt_read_csr - Read from Control/Status Register
@@ -103,7 +103,7 @@ static inline void sh_wdt_write_bst(__u32 val)
103 */ 103 */
104static inline __u32 sh_wdt_read_csr(void) 104static inline __u32 sh_wdt_read_csr(void)
105{ 105{
106 return ctrl_inl(WTCSR_R); 106 return __raw_readl(WTCSR_R);
107} 107}
108 108
109/** 109/**
@@ -115,7 +115,7 @@ static inline __u32 sh_wdt_read_csr(void)
115 */ 115 */
116static inline void sh_wdt_write_csr(__u32 val) 116static inline void sh_wdt_write_csr(__u32 val)
117{ 117{
118 ctrl_outl((WTCSR_HIGH << 24) | (__u32)val, WTCSR); 118 __raw_writel((WTCSR_HIGH << 24) | (__u32)val, WTCSR);
119} 119}
120#else 120#else
121/** 121/**
@@ -124,7 +124,7 @@ static inline void sh_wdt_write_csr(__u32 val)
124 */ 124 */
125static inline __u8 sh_wdt_read_cnt(void) 125static inline __u8 sh_wdt_read_cnt(void)
126{ 126{
127 return ctrl_inb(WTCNT_R); 127 return __raw_readb(WTCNT_R);
128} 128}
129 129
130/** 130/**
@@ -136,7 +136,7 @@ static inline __u8 sh_wdt_read_cnt(void)
136 */ 136 */
137static inline void sh_wdt_write_cnt(__u8 val) 137static inline void sh_wdt_write_cnt(__u8 val)
138{ 138{
139 ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, WTCNT); 139 __raw_writew((WTCNT_HIGH << 8) | (__u16)val, WTCNT);
140} 140}
141 141
142/** 142/**
@@ -146,7 +146,7 @@ static inline void sh_wdt_write_cnt(__u8 val)
146 */ 146 */
147static inline __u8 sh_wdt_read_csr(void) 147static inline __u8 sh_wdt_read_csr(void)
148{ 148{
149 return ctrl_inb(WTCSR_R); 149 return __raw_readb(WTCSR_R);
150} 150}
151 151
152/** 152/**
@@ -158,7 +158,7 @@ static inline __u8 sh_wdt_read_csr(void)
158 */ 158 */
159static inline void sh_wdt_write_csr(__u8 val) 159static inline void sh_wdt_write_csr(__u8 val)
160{ 160{
161 ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR); 161 __raw_writew((WTCSR_HIGH << 8) | (__u16)val, WTCSR);
162} 162}
163#endif /* CONFIG_CPU_SUBTYPE_SH7785 || CONFIG_CPU_SUBTYPE_SH7780 */ 163#endif /* CONFIG_CPU_SUBTYPE_SH7785 || CONFIG_CPU_SUBTYPE_SH7780 */
164#endif /* __KERNEL__ */ 164#endif /* __KERNEL__ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 11:18:11 -0500