diff options
Diffstat (limited to 'arch/sh/include/asm/pci.h')
-rw-r--r-- | arch/sh/include/asm/pci.h | 98 |
1 files changed, 51 insertions, 47 deletions
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h index df1d383e18a5..5b2e0fcdfc22 100644 --- a/arch/sh/include/asm/pci.h +++ b/arch/sh/include/asm/pci.h | |||
@@ -17,54 +17,29 @@ | |||
17 | * external) PCI controllers. | 17 | * external) PCI controllers. |
18 | */ | 18 | */ |
19 | struct pci_channel { | 19 | struct pci_channel { |
20 | struct pci_ops *pci_ops; | 20 | struct pci_channel *next; |
21 | struct resource *io_resource; | ||
22 | struct resource *mem_resource; | ||
23 | int first_devfn; | ||
24 | int last_devfn; | ||
25 | }; | ||
26 | 21 | ||
27 | /* | 22 | struct pci_ops *pci_ops; |
28 | * Each board initializes this array and terminates it with a NULL entry. | 23 | struct resource *io_resource; |
29 | */ | 24 | struct resource *mem_resource; |
30 | extern struct pci_channel board_pci_channels[]; | ||
31 | 25 | ||
32 | #define PCIBIOS_MIN_IO board_pci_channels->io_resource->start | 26 | unsigned long io_offset; |
33 | #define PCIBIOS_MIN_MEM board_pci_channels->mem_resource->start | 27 | unsigned long mem_offset; |
34 | 28 | ||
35 | /* | 29 | unsigned long reg_base; |
36 | * I/O routine helpers | ||
37 | */ | ||
38 | #if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) | ||
39 | #define PCI_IO_AREA 0xFE400000 | ||
40 | #define PCI_IO_SIZE 0x00400000 | ||
41 | #elif defined(CONFIG_CPU_SH5) | ||
42 | extern unsigned long PCI_IO_AREA; | ||
43 | #define PCI_IO_SIZE 0x00010000 | ||
44 | #else | ||
45 | #define PCI_IO_AREA 0xFE240000 | ||
46 | #define PCI_IO_SIZE 0x00040000 | ||
47 | #endif | ||
48 | 30 | ||
49 | #define PCI_MEM_SIZE 0x01000000 | 31 | unsigned long io_map_base; |
32 | }; | ||
50 | 33 | ||
51 | #define SH4_PCIIOBR_MASK 0xFFFC0000 | 34 | extern void register_pci_controller(struct pci_channel *hose); |
52 | #define pci_ioaddr(addr) (PCI_IO_AREA + (addr & ~SH4_PCIIOBR_MASK)) | ||
53 | 35 | ||
54 | #if defined(CONFIG_PCI) | 36 | extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM; |
55 | #define is_pci_ioaddr(port) \ | ||
56 | (((port) >= PCIBIOS_MIN_IO) && \ | ||
57 | ((port) < (PCIBIOS_MIN_IO + PCI_IO_SIZE))) | ||
58 | #define is_pci_memaddr(port) \ | ||
59 | (((port) >= PCIBIOS_MIN_MEM) && \ | ||
60 | ((port) < (PCIBIOS_MIN_MEM + PCI_MEM_SIZE))) | ||
61 | #else | ||
62 | #define is_pci_ioaddr(port) (0) | ||
63 | #define is_pci_memaddr(port) (0) | ||
64 | #endif | ||
65 | 37 | ||
66 | struct pci_dev; | 38 | struct pci_dev; |
67 | 39 | ||
40 | #define HAVE_PCI_MMAP | ||
41 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | ||
42 | enum pci_mmap_state mmap_state, int write_combine); | ||
68 | extern void pcibios_set_master(struct pci_dev *dev); | 43 | extern void pcibios_set_master(struct pci_dev *dev); |
69 | 44 | ||
70 | static inline void pcibios_penalize_isa_irq(int irq, int active) | 45 | static inline void pcibios_penalize_isa_irq(int irq, int active) |
@@ -123,22 +98,51 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, | |||
123 | } | 98 | } |
124 | #endif | 99 | #endif |
125 | 100 | ||
101 | #ifdef CONFIG_SUPERH32 | ||
102 | /* | ||
103 | * If we're on an SH7751 or SH7780 PCI controller, PCI memory is mapped | ||
104 | * at the end of the address space in a special non-translatable area. | ||
105 | */ | ||
106 | #define PCI_MEM_FIXED_START 0xfd000000 | ||
107 | #define PCI_MEM_FIXED_END (PCI_MEM_FIXED_START + 0x01000000) | ||
108 | |||
109 | #define is_pci_memory_fixed_range(s, e) \ | ||
110 | ((s) >= PCI_MEM_FIXED_START && (e) < PCI_MEM_FIXED_END) | ||
111 | #else | ||
112 | #define is_pci_memory_fixed_range(s, e) (0) | ||
113 | #endif | ||
114 | |||
126 | /* Board-specific fixup routines. */ | 115 | /* Board-specific fixup routines. */ |
127 | void pcibios_fixup(void); | ||
128 | int pcibios_init_platform(void); | ||
129 | int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); | 116 | int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); |
130 | 117 | ||
131 | #ifdef CONFIG_PCI_AUTO | 118 | extern void pcibios_resource_to_bus(struct pci_dev *dev, |
132 | int pciauto_assign_resources(int busno, struct pci_channel *hose); | 119 | struct pci_bus_region *region, struct resource *res); |
133 | #endif | ||
134 | 120 | ||
135 | #endif /* __KERNEL__ */ | 121 | extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, |
122 | struct pci_bus_region *region); | ||
123 | |||
124 | static inline struct resource * | ||
125 | pcibios_select_root(struct pci_dev *pdev, struct resource *res) | ||
126 | { | ||
127 | struct resource *root = NULL; | ||
136 | 128 | ||
137 | /* generic pci stuff */ | 129 | if (res->flags & IORESOURCE_IO) |
138 | #include <asm-generic/pci.h> | 130 | root = &ioport_resource; |
131 | if (res->flags & IORESOURCE_MEM) | ||
132 | root = &iomem_resource; | ||
133 | |||
134 | return root; | ||
135 | } | ||
136 | |||
137 | /* Chances are this interrupt is wired PC-style ... */ | ||
138 | static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) | ||
139 | { | ||
140 | return channel ? 15 : 14; | ||
141 | } | ||
139 | 142 | ||
140 | /* generic DMA-mapping stuff */ | 143 | /* generic DMA-mapping stuff */ |
141 | #include <asm-generic/pci-dma-compat.h> | 144 | #include <asm-generic/pci-dma-compat.h> |
142 | 145 | ||
146 | #endif /* __KERNEL__ */ | ||
143 | #endif /* __ASM_SH_PCI_H */ | 147 | #endif /* __ASM_SH_PCI_H */ |
144 | 148 | ||