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-rw-r--r--arch/sh/include/asm/io.h300
1 files changed, 116 insertions, 184 deletions
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index a4fbf0c84fb1..436c28539577 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -1,27 +1,26 @@
1#ifndef __ASM_SH_IO_H 1#ifndef __ASM_SH_IO_H
2#define __ASM_SH_IO_H 2#define __ASM_SH_IO_H
3
4/* 3/*
5 * Convention: 4 * Convention:
6 * read{b,w,l}/write{b,w,l} are for PCI, 5 * read{b,w,l,q}/write{b,w,l,q} are for PCI,
7 * while in{b,w,l}/out{b,w,l} are for ISA 6 * while in{b,w,l}/out{b,w,l} are for ISA
8 * These may (will) be platform specific function. 7 *
9 * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p 8 * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p
10 * and 'string' versions: ins{b,w,l}/outs{b,w,l} 9 * and 'string' versions: ins{b,w,l}/outs{b,w,l}
11 * For read{b,w,l} and write{b,w,l} there are also __raw versions, which
12 * do not have a memory barrier after them.
13 * 10 *
14 * In addition, we have 11 * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers
15 * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O. 12 * automatically, there are also __raw versions, which do not.
16 * which are processor specific. 13 *
17 */ 14 * Historically, we have also had ctrl_in{b,w,l,q}/ctrl_out{b,w,l,q} for
18 15 * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice
19/* 16 * these have the same semantics as the __raw variants, and as such, all
20 * We follow the Alpha convention here: 17 * new code should be using the __raw versions.
21 * __inb expands to an inline function call (which calls via the mv) 18 *
22 * _inb is a real function call (note ___raw fns are _ version of __raw) 19 * All ISA I/O routines are wrapped through the machine vector. If a
23 * inb by default expands to _inb, but the machine specific code may 20 * board does not provide overrides, a generic set that are copied in
24 * define it to __inb if it chooses. 21 * from the default machine vector are used instead. These are largely
22 * for old compat code for I/O offseting to SuperIOs, all of which are
23 * better handled through the machvec ioport mapping routines these days.
25 */ 24 */
26#include <asm/cache.h> 25#include <asm/cache.h>
27#include <asm/system.h> 26#include <asm/system.h>
@@ -31,7 +30,6 @@
31#include <asm-generic/iomap.h> 30#include <asm-generic/iomap.h>
32 31
33#ifdef __KERNEL__ 32#ifdef __KERNEL__
34
35/* 33/*
36 * Depending on which platform we are running on, we need different 34 * Depending on which platform we are running on, we need different
37 * I/O functions. 35 * I/O functions.
@@ -40,105 +38,68 @@
40#include <asm/io_generic.h> 38#include <asm/io_generic.h>
41#include <asm/io_trapped.h> 39#include <asm/io_trapped.h>
42 40
43#define maybebadio(port) \ 41#define inb(p) sh_mv.mv_inb((p))
44 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ 42#define inw(p) sh_mv.mv_inw((p))
45 __FUNCTION__, __LINE__, (port), (u32)__builtin_return_address(0)) 43#define inl(p) sh_mv.mv_inl((p))
46 44#define outb(x,p) sh_mv.mv_outb((x),(p))
47/* 45#define outw(x,p) sh_mv.mv_outw((x),(p))
48 * Since boards are able to define their own set of I/O routines through 46#define outl(x,p) sh_mv.mv_outl((x),(p))
49 * their respective machine vector, we always wrap through the mv. 47
50 * 48#define inb_p(p) sh_mv.mv_inb_p((p))
51 * Also, in the event that a board hasn't provided its own definition for 49#define inw_p(p) sh_mv.mv_inw_p((p))
52 * a given routine, it will be wrapped to generic code at run-time. 50#define inl_p(p) sh_mv.mv_inl_p((p))
53 */ 51#define outb_p(x,p) sh_mv.mv_outb_p((x),(p))
52#define outw_p(x,p) sh_mv.mv_outw_p((x),(p))
53#define outl_p(x,p) sh_mv.mv_outl_p((x),(p))
54
55#define insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
56#define insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
57#define insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
58#define outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
59#define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
60#define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
61
62#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v))
63#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
64#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
65#define __raw_writeq(v,a) (__chk_io_ptr(a), *(volatile u64 __force *)(a) = (v))
66
67#define __raw_readb(a) (__chk_io_ptr(a), *(volatile u8 __force *)(a))
68#define __raw_readw(a) (__chk_io_ptr(a), *(volatile u16 __force *)(a))
69#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a))
70#define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a))
71
72#define readb(a) ({ u8 r_ = __raw_readb(a); mb(); r_; })
73#define readw(a) ({ u16 r_ = __raw_readw(a); mb(); r_; })
74#define readl(a) ({ u32 r_ = __raw_readl(a); mb(); r_; })
75#define readq(a) ({ u64 r_ = __raw_readq(a); mb(); r_; })
76
77#define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); })
78#define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
79#define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
80#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); })
54 81
55#define __inb(p) sh_mv.mv_inb((p)) 82/* SuperH on-chip I/O functions */
56#define __inw(p) sh_mv.mv_inw((p)) 83#define ctrl_inb __raw_readb
57#define __inl(p) sh_mv.mv_inl((p)) 84#define ctrl_inw __raw_readw
58#define __outb(x,p) sh_mv.mv_outb((x),(p)) 85#define ctrl_inl __raw_readl
59#define __outw(x,p) sh_mv.mv_outw((x),(p)) 86#define ctrl_inq __raw_readq
60#define __outl(x,p) sh_mv.mv_outl((x),(p))
61
62#define __inb_p(p) sh_mv.mv_inb_p((p))
63#define __inw_p(p) sh_mv.mv_inw_p((p))
64#define __inl_p(p) sh_mv.mv_inl_p((p))
65#define __outb_p(x,p) sh_mv.mv_outb_p((x),(p))
66#define __outw_p(x,p) sh_mv.mv_outw_p((x),(p))
67#define __outl_p(x,p) sh_mv.mv_outl_p((x),(p))
68
69#define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
70#define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
71#define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
72#define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
73#define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
74#define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
75
76#define __readb(a) sh_mv.mv_readb((a))
77#define __readw(a) sh_mv.mv_readw((a))
78#define __readl(a) sh_mv.mv_readl((a))
79#define __writeb(v,a) sh_mv.mv_writeb((v),(a))
80#define __writew(v,a) sh_mv.mv_writew((v),(a))
81#define __writel(v,a) sh_mv.mv_writel((v),(a))
82
83#define inb __inb
84#define inw __inw
85#define inl __inl
86#define outb __outb
87#define outw __outw
88#define outl __outl
89
90#define inb_p __inb_p
91#define inw_p __inw_p
92#define inl_p __inl_p
93#define outb_p __outb_p
94#define outw_p __outw_p
95#define outl_p __outl_p
96
97#define insb __insb
98#define insw __insw
99#define insl __insl
100#define outsb __outsb
101#define outsw __outsw
102#define outsl __outsl
103
104#define __raw_readb(a) __readb((void __iomem *)(a))
105#define __raw_readw(a) __readw((void __iomem *)(a))
106#define __raw_readl(a) __readl((void __iomem *)(a))
107#define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a))
108#define __raw_writew(v, a) __writew(v, (void __iomem *)(a))
109#define __raw_writel(v, a) __writel(v, (void __iomem *)(a))
110
111void __raw_writesl(unsigned long addr, const void *data, int longlen);
112void __raw_readsl(unsigned long addr, void *data, int longlen);
113 87
114/* 88#define ctrl_outb __raw_writeb
115 * The platform header files may define some of these macros to use 89#define ctrl_outw __raw_writew
116 * the inlined versions where appropriate. These macros may also be 90#define ctrl_outl __raw_writel
117 * redefined by userlevel programs. 91#define ctrl_outq __raw_writeq
118 */
119#ifdef __readb
120# define readb(a) ({ unsigned int r_ = __raw_readb(a); mb(); r_; })
121#endif
122#ifdef __raw_readw
123# define readw(a) ({ unsigned int r_ = __raw_readw(a); mb(); r_; })
124#endif
125#ifdef __raw_readl
126# define readl(a) ({ unsigned int r_ = __raw_readl(a); mb(); r_; })
127#endif
128 92
129#ifdef __raw_writeb 93static inline void ctrl_delay(void)
130# define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); }) 94{
131#endif 95#ifdef P2SEG
132#ifdef __raw_writew 96 __raw_readw(P2SEG);
133# define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
134#endif
135#ifdef __raw_writel
136# define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
137#endif 97#endif
98}
138 99
139#define __BUILD_MEMORY_STRING(bwlq, type) \ 100#define __BUILD_MEMORY_STRING(bwlq, type) \
140 \ 101 \
141static inline void writes##bwlq(volatile void __iomem *mem, \ 102static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
142 const void *addr, unsigned int count) \ 103 const void *addr, unsigned int count) \
143{ \ 104{ \
144 const volatile type *__addr = addr; \ 105 const volatile type *__addr = addr; \
@@ -149,8 +110,8 @@ static inline void writes##bwlq(volatile void __iomem *mem, \
149 } \ 110 } \
150} \ 111} \
151 \ 112 \
152static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ 113static inline void __raw_reads##bwlq(volatile void __iomem *mem, \
153 unsigned int count) \ 114 void *addr, unsigned int count) \
154{ \ 115{ \
155 volatile type *__addr = addr; \ 116 volatile type *__addr = addr; \
156 \ 117 \
@@ -162,106 +123,71 @@ static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
162 123
163__BUILD_MEMORY_STRING(b, u8) 124__BUILD_MEMORY_STRING(b, u8)
164__BUILD_MEMORY_STRING(w, u16) 125__BUILD_MEMORY_STRING(w, u16)
165#define writesl __raw_writesl 126__BUILD_MEMORY_STRING(q, u64)
166#define readsl __raw_readsl 127
128void __raw_writesl(void __iomem *addr, const void *data, int longlen);
129void __raw_readsl(const void __iomem *addr, void *data, int longlen);
130
131#define writesb __raw_writesb
132#define writesw __raw_writesw
133#define writesl __raw_writesl
134
135#define readsb __raw_readsb
136#define readsw __raw_readsw
137#define readsl __raw_readsl
167 138
168#define readb_relaxed(a) readb(a) 139#define readb_relaxed(a) readb(a)
169#define readw_relaxed(a) readw(a) 140#define readw_relaxed(a) readw(a)
170#define readl_relaxed(a) readl(a) 141#define readl_relaxed(a) readl(a)
142#define readq_relaxed(a) readq(a)
171 143
172/* Simple MMIO */ 144/* Simple MMIO */
173#define ioread8(a) readb(a) 145#define ioread8(a) __raw_readb(a)
174#define ioread16(a) readw(a) 146#define ioread16(a) __raw_readw(a)
175#define ioread16be(a) be16_to_cpu(__raw_readw((a))) 147#define ioread16be(a) be16_to_cpu(__raw_readw((a)))
176#define ioread32(a) readl(a) 148#define ioread32(a) __raw_readl(a)
177#define ioread32be(a) be32_to_cpu(__raw_readl((a))) 149#define ioread32be(a) be32_to_cpu(__raw_readl((a)))
178 150
179#define iowrite8(v,a) writeb((v),(a)) 151#define iowrite8(v,a) __raw_writeb((v),(a))
180#define iowrite16(v,a) writew((v),(a)) 152#define iowrite16(v,a) __raw_writew((v),(a))
181#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a)) 153#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a))
182#define iowrite32(v,a) writel((v),(a)) 154#define iowrite32(v,a) __raw_writel((v),(a))
183#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a)) 155#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
184 156
185#define ioread8_rep(a, d, c) readsb((a), (d), (c)) 157#define ioread8_rep(a, d, c) __raw_readsb((a), (d), (c))
186#define ioread16_rep(a, d, c) readsw((a), (d), (c)) 158#define ioread16_rep(a, d, c) __raw_readsw((a), (d), (c))
187#define ioread32_rep(a, d, c) readsl((a), (d), (c)) 159#define ioread32_rep(a, d, c) __raw_readsl((a), (d), (c))
188 160
189#define iowrite8_rep(a, s, c) writesb((a), (s), (c)) 161#define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c))
190#define iowrite16_rep(a, s, c) writesw((a), (s), (c)) 162#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c))
191#define iowrite32_rep(a, s, c) writesl((a), (s), (c)) 163#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c))
192 164
193#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */ 165/* synco on SH-4A, otherwise a nop */
166#define mmiowb() wmb()
194 167
195#define IO_SPACE_LIMIT 0xffffffff 168#define IO_SPACE_LIMIT 0xffffffff
196 169
170extern unsigned long generic_io_base;
171
197/* 172/*
198 * This function provides a method for the generic case where a board-specific 173 * This function provides a method for the generic case where a
199 * ioport_map simply needs to return the port + some arbitrary port base. 174 * board-specific ioport_map simply needs to return the port + some
175 * arbitrary port base.
200 * 176 *
201 * We use this at board setup time to implicitly set the port base, and 177 * We use this at board setup time to implicitly set the port base, and
202 * as a result, we can use the generic ioport_map. 178 * as a result, we can use the generic ioport_map.
203 */ 179 */
204static inline void __set_io_port_base(unsigned long pbase) 180static inline void __set_io_port_base(unsigned long pbase)
205{ 181{
206 extern unsigned long generic_io_base;
207
208 generic_io_base = pbase; 182 generic_io_base = pbase;
209} 183}
210 184
211#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) 185#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n))
212 186
213/* We really want to try and get these to memcpy etc */ 187/* We really want to try and get these to memcpy etc */
214extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long); 188void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
215extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long); 189void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
216extern void memset_io(volatile void __iomem *, int, unsigned long); 190void memset_io(volatile void __iomem *, int, unsigned long);
217
218/* SuperH on-chip I/O functions */
219static inline unsigned char ctrl_inb(unsigned long addr)
220{
221 return *(volatile unsigned char*)addr;
222}
223
224static inline unsigned short ctrl_inw(unsigned long addr)
225{
226 return *(volatile unsigned short*)addr;
227}
228
229static inline unsigned int ctrl_inl(unsigned long addr)
230{
231 return *(volatile unsigned long*)addr;
232}
233
234static inline unsigned long long ctrl_inq(unsigned long addr)
235{
236 return *(volatile unsigned long long*)addr;
237}
238
239static inline void ctrl_outb(unsigned char b, unsigned long addr)
240{
241 *(volatile unsigned char*)addr = b;
242}
243
244static inline void ctrl_outw(unsigned short b, unsigned long addr)
245{
246 *(volatile unsigned short*)addr = b;
247}
248
249static inline void ctrl_outl(unsigned int b, unsigned long addr)
250{
251 *(volatile unsigned long*)addr = b;
252}
253
254static inline void ctrl_outq(unsigned long long b, unsigned long addr)
255{
256 *(volatile unsigned long long*)addr = b;
257}
258
259static inline void ctrl_delay(void)
260{
261#ifdef P2SEG
262 ctrl_inw(P2SEG);
263#endif
264}
265 191
266/* Quad-word real-mode I/O, don't ask.. */ 192/* Quad-word real-mode I/O, don't ask.. */
267unsigned long long peek_real_address_q(unsigned long long addr); 193unsigned long long peek_real_address_q(unsigned long long addr);
@@ -347,9 +273,15 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
347 __ioremap_mode((offset), (size), _PAGE_CACHABLE) 273 __ioremap_mode((offset), (size), _PAGE_CACHABLE)
348#define p3_ioremap(offset, size, flags) \ 274#define p3_ioremap(offset, size, flags) \
349 __ioremap((offset), (size), (flags)) 275 __ioremap((offset), (size), (flags))
276#define ioremap_prot(offset, size, flags) \
277 __ioremap_mode((offset), (size), (flags))
350#define iounmap(addr) \ 278#define iounmap(addr) \
351 __iounmap((addr)) 279 __iounmap((addr))
352 280
281#define maybebadio(port) \
282 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
283 __func__, __LINE__, (port), (u32)__builtin_return_address(0))
284
353/* 285/*
354 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 286 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
355 * access 287 * access