diff options
Diffstat (limited to 'arch/sh/drivers/pci/pci-sh7780.h')
-rw-r--r-- | arch/sh/drivers/pci/pci-sh7780.h | 14 |
1 files changed, 2 insertions, 12 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h index dee069c3865d..205dcbefe275 100644 --- a/arch/sh/drivers/pci/pci-sh7780.h +++ b/arch/sh/drivers/pci/pci-sh7780.h | |||
@@ -26,12 +26,6 @@ | |||
26 | #define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */ | 26 | #define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */ |
27 | #define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */ | 27 | #define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */ |
28 | 28 | ||
29 | #define SH7780_PCI_MEMORY_BASE 0xFD000000 /* Memory space base addr */ | ||
30 | #define SH7780_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ | ||
31 | |||
32 | #define SH7780_PCI_IO_BASE 0xFE200000 /* IO space base address */ | ||
33 | #define SH7780_PCI_IO_SIZE 0x00400000 /* Size of IO window */ | ||
34 | |||
35 | #define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */ | 29 | #define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */ |
36 | 30 | ||
37 | /* SH7780 PCI Config Registers */ | 31 | /* SH7780 PCI Config Registers */ |
@@ -46,12 +40,8 @@ | |||
46 | #define SH7780_PCIPINT 0x1CC /* Power Mgmnt Int. Register */ | 40 | #define SH7780_PCIPINT 0x1CC /* Power Mgmnt Int. Register */ |
47 | #define SH7780_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */ | 41 | #define SH7780_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */ |
48 | 42 | ||
49 | #define SH7780_PCIMBR0 0x1E0 | 43 | #define SH7780_PCIMBR(x) (0x1E0 + ((x) * 8)) |
50 | #define SH7780_PCIMBMR0 0x1E4 | 44 | #define SH7780_PCIMBMR(x) (0x1E4 + ((x) * 8)) |
51 | #define SH7780_PCIMBR1 0x1E8 | ||
52 | #define SH7780_PCIMBMR1 0x1EC | ||
53 | #define SH7780_PCIMBR2 0x1F0 | ||
54 | #define SH7780_PCIMBMR2 0x1F4 | ||
55 | #define SH7780_PCIIOBR 0x1F8 | 45 | #define SH7780_PCIIOBR 0x1F8 |
56 | #define SH7780_PCIIOBMR 0x1FC | 46 | #define SH7780_PCIIOBMR 0x1FC |
57 | #define SH7780_PCICSCR0 0x210 /* Cache Snoop1 Cnt. Register */ | 47 | #define SH7780_PCICSCR0 0x210 /* Cache Snoop1 Cnt. Register */ |