diff options
Diffstat (limited to 'arch/sh/drivers/pci/pci-sh7751.c')
-rw-r--r-- | arch/sh/drivers/pci/pci-sh7751.c | 52 |
1 files changed, 23 insertions, 29 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c index 70c1999a0ec4..17811e5d287b 100644 --- a/arch/sh/drivers/pci/pci-sh7751.c +++ b/arch/sh/drivers/pci/pci-sh7751.c | |||
@@ -44,25 +44,25 @@ static int __init __area_sdram_check(struct pci_channel *chan, | |||
44 | return 1; | 44 | return 1; |
45 | } | 45 | } |
46 | 46 | ||
47 | static struct resource sh7751_io_resource = { | 47 | static struct resource sh7751_pci_resources[] = { |
48 | .name = "SH7751_IO", | 48 | { |
49 | .start = SH7751_PCI_IO_BASE, | 49 | .name = "SH7751_IO", |
50 | .end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1, | 50 | .start = SH7751_PCI_IO_BASE, |
51 | .flags = IORESOURCE_IO | 51 | .end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1, |
52 | }; | 52 | .flags = IORESOURCE_IO |
53 | 53 | }, { | |
54 | static struct resource sh7751_mem_resource = { | 54 | .name = "SH7751_mem", |
55 | .name = "SH7751_mem", | 55 | .start = SH7751_PCI_MEMORY_BASE, |
56 | .start = SH7751_PCI_MEMORY_BASE, | 56 | .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1, |
57 | .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1, | 57 | .flags = IORESOURCE_MEM |
58 | .flags = IORESOURCE_MEM | 58 | }, |
59 | }; | 59 | }; |
60 | 60 | ||
61 | static struct pci_channel sh7751_pci_controller = { | 61 | static struct pci_channel sh7751_pci_controller = { |
62 | .pci_ops = &sh4_pci_ops, | 62 | .pci_ops = &sh4_pci_ops, |
63 | .mem_resource = &sh7751_mem_resource, | 63 | .resources = sh7751_pci_resources, |
64 | .nr_resources = ARRAY_SIZE(sh7751_pci_resources), | ||
64 | .mem_offset = 0x00000000, | 65 | .mem_offset = 0x00000000, |
65 | .io_resource = &sh7751_io_resource, | ||
66 | .io_offset = 0x00000000, | 66 | .io_offset = 0x00000000, |
67 | .io_map_base = SH7751_PCI_IO_BASE, | 67 | .io_map_base = SH7751_PCI_IO_BASE, |
68 | }; | 68 | }; |
@@ -79,7 +79,6 @@ static int __init sh7751_pci_init(void) | |||
79 | struct pci_channel *chan = &sh7751_pci_controller; | 79 | struct pci_channel *chan = &sh7751_pci_controller; |
80 | unsigned int id; | 80 | unsigned int id; |
81 | u32 word, reg; | 81 | u32 word, reg; |
82 | int ret; | ||
83 | 82 | ||
84 | printk(KERN_NOTICE "PCI: Starting intialization.\n"); | 83 | printk(KERN_NOTICE "PCI: Starting intialization.\n"); |
85 | 84 | ||
@@ -93,13 +92,10 @@ static int __init sh7751_pci_init(void) | |||
93 | return -ENODEV; | 92 | return -ENODEV; |
94 | } | 93 | } |
95 | 94 | ||
96 | if ((ret = sh4_pci_check_direct(chan)) != 0) | ||
97 | return ret; | ||
98 | |||
99 | /* Set the BCR's to enable PCI access */ | 95 | /* Set the BCR's to enable PCI access */ |
100 | reg = ctrl_inl(SH7751_BCR1); | 96 | reg = __raw_readl(SH7751_BCR1); |
101 | reg |= 0x80000; | 97 | reg |= 0x80000; |
102 | ctrl_outl(reg, SH7751_BCR1); | 98 | __raw_writel(reg, SH7751_BCR1); |
103 | 99 | ||
104 | /* Turn the clocks back on (not done in reset)*/ | 100 | /* Turn the clocks back on (not done in reset)*/ |
105 | pci_write_reg(chan, 0, SH4_PCICLKR); | 101 | pci_write_reg(chan, 0, SH4_PCICLKR); |
@@ -132,13 +128,13 @@ static int __init sh7751_pci_init(void) | |||
132 | /* Set the local 16MB PCI memory space window to | 128 | /* Set the local 16MB PCI memory space window to |
133 | * the lowest PCI mapped address | 129 | * the lowest PCI mapped address |
134 | */ | 130 | */ |
135 | word = chan->mem_resource->start & SH4_PCIMBR_MASK; | 131 | word = chan->resources[1].start & SH4_PCIMBR_MASK; |
136 | pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word); | 132 | pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word); |
137 | pci_write_reg(chan, word , SH4_PCIMBR); | 133 | pci_write_reg(chan, word , SH4_PCIMBR); |
138 | 134 | ||
139 | /* Make sure the MSB's of IO window are set to access PCI space | 135 | /* Make sure the MSB's of IO window are set to access PCI space |
140 | * correctly */ | 136 | * correctly */ |
141 | word = chan->io_resource->start & SH4_PCIIOBR_MASK; | 137 | word = chan->resources[0].start & SH4_PCIIOBR_MASK; |
142 | pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word); | 138 | pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word); |
143 | pci_write_reg(chan, word, SH4_PCIIOBR); | 139 | pci_write_reg(chan, word, SH4_PCIIOBR); |
144 | 140 | ||
@@ -159,13 +155,13 @@ static int __init sh7751_pci_init(void) | |||
159 | return -1; | 155 | return -1; |
160 | 156 | ||
161 | /* configure the wait control registers */ | 157 | /* configure the wait control registers */ |
162 | word = ctrl_inl(SH7751_WCR1); | 158 | word = __raw_readl(SH7751_WCR1); |
163 | pci_write_reg(chan, word, SH4_PCIWCR1); | 159 | pci_write_reg(chan, word, SH4_PCIWCR1); |
164 | word = ctrl_inl(SH7751_WCR2); | 160 | word = __raw_readl(SH7751_WCR2); |
165 | pci_write_reg(chan, word, SH4_PCIWCR2); | 161 | pci_write_reg(chan, word, SH4_PCIWCR2); |
166 | word = ctrl_inl(SH7751_WCR3); | 162 | word = __raw_readl(SH7751_WCR3); |
167 | pci_write_reg(chan, word, SH4_PCIWCR3); | 163 | pci_write_reg(chan, word, SH4_PCIWCR3); |
168 | word = ctrl_inl(SH7751_MCR); | 164 | word = __raw_readl(SH7751_MCR); |
169 | pci_write_reg(chan, word, SH4_PCIMCR); | 165 | pci_write_reg(chan, word, SH4_PCIMCR); |
170 | 166 | ||
171 | /* NOTE: I'm ignoring the PCI error IRQs for now.. | 167 | /* NOTE: I'm ignoring the PCI error IRQs for now.. |
@@ -180,8 +176,6 @@ static int __init sh7751_pci_init(void) | |||
180 | word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM; | 176 | word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM; |
181 | pci_write_reg(chan, word, SH4_PCICR); | 177 | pci_write_reg(chan, word, SH4_PCICR); |
182 | 178 | ||
183 | register_pci_controller(chan); | 179 | return register_pci_controller(chan); |
184 | |||
185 | return 0; | ||
186 | } | 180 | } |
187 | arch_initcall(sh7751_pci_init); | 181 | arch_initcall(sh7751_pci_init); |